/* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
- Copyright (C) 1988-2022 Free Software Foundation, Inc.
+ Copyright (C) 1988-2023 Free Software Foundation, Inc.
Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
CORE_ADDR addr, int mustbe32);
static void mips_print_float_info (struct gdbarch *, struct ui_file *,
- struct frame_info *, const char *);
+ frame_info_ptr, const char *);
/* A useful bit in the CP0 status register (MIPS_PS_REGNUM). */
/* This bit is set if we are emulating 32-bit FPRs on a 64-bit chip. */
case MIPS_ABI_UNKNOWN:
case MIPS_ABI_LAST:
default:
- internal_error (__FILE__, __LINE__, _("bad switch"));
+ internal_error (_("bad switch"));
}
}
reg_offset = 0;
break;
default:
- internal_error (__FILE__, __LINE__, _("bad switch"));
+ internal_error (_("bad switch"));
}
if (mips_debug)
gdb_printf (gdb_stderr,
physical 64-bit registers, but should treat them as 32-bit registers. */
static int
-mips2_fp_compat (struct frame_info *frame)
+mips2_fp_compat (frame_info_ptr frame)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
/* MIPS1 and MIPS2 have only 32 bit FPRs, and the FR bit is not
return "";
}
else
- internal_error (__FILE__, __LINE__,
- _("mips_register_name: bad register number %d"), rawnum);
+ internal_error (_("mips_register_name: bad register number %d"), rawnum);
}
/* Return the groups that a MIPS register can be categorised into. */
}
}
else
- internal_error (__FILE__, __LINE__, _("bad register size"));
+ internal_error (_("bad register size"));
}
static void
}
}
else
- internal_error (__FILE__, __LINE__, _("bad register size"));
+ internal_error (_("bad register size"));
}
static int
}
}
else
- internal_error (__FILE__, __LINE__, _("bad register size"));
+ internal_error (_("bad register size"));
return 0;
}
}
static int
-mips_register_to_value (struct frame_info *frame, int regnum,
+mips_register_to_value (frame_info_ptr frame, int regnum,
struct type *type, gdb_byte *to,
int *optimizedp, int *unavailablep)
{
}
else
{
- internal_error (__FILE__, __LINE__,
- _("mips_register_to_value: unrecognized case"));
+ internal_error (_("mips_register_to_value: unrecognized case"));
}
}
static void
-mips_value_to_register (struct frame_info *frame, int regnum,
+mips_value_to_register (frame_info_ptr frame, int regnum,
struct type *type, const gdb_byte *from)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
}
else
{
- internal_error (__FILE__, __LINE__,
- _("mips_value_to_register: unrecognized case"));
+ internal_error (_("mips_value_to_register: unrecognized case"));
}
}
case AUTO_BOOLEAN_AUTO:
return tdep->default_mask_address_p;
default:
- internal_error (__FILE__, __LINE__,
- _("mips_mask_address_p: bad switch"));
+ internal_error (_("mips_mask_address_p: bad switch"));
return -1;
}
}
}
static CORE_ADDR
-mips_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
+mips_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame)
{
CORE_ADDR pc;
}
static CORE_ADDR
-mips_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
+mips_unwind_sp (struct gdbarch *gdbarch, frame_info_ptr next_frame)
{
return frame_unwind_register_signed
(next_frame, gdbarch_num_regs (gdbarch) + MIPS_SP_REGNUM);
breakpoint. */
static struct frame_id
-mips_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
+mips_dummy_id (struct gdbarch *gdbarch, frame_info_ptr this_frame)
{
return frame_id_build
(get_frame_register_signed (this_frame,
instlen = MIPS_INSN32_SIZE;
break;
default:
- internal_error (__FILE__, __LINE__, _("invalid ISA"));
+ internal_error (_("invalid ISA"));
break;
}
err = target_read_memory (addr, buf, instlen);
case ISA_MIPS:
return MIPS_INSN32_SIZE;
}
- internal_error (__FILE__, __LINE__, _("invalid ISA"));
+ internal_error (_("invalid ISA"));
}
static LONGEST
break;
}
default:
- internal_error (__FILE__, __LINE__, _("bad switch"));
+ internal_error (_("bad switch"));
}
upk->offset = offset;
upk->regx = regx;
static CORE_ADDR
mips16_scan_prologue (struct gdbarch *gdbarch,
CORE_ADDR start_pc, CORE_ADDR limit_pc,
- struct frame_info *this_frame,
+ frame_info_ptr this_frame,
struct mips_frame_cache *this_cache)
{
int prev_non_prologue_insn = 0;
mips_insn32 unwinder. */
static struct mips_frame_cache *
-mips_insn16_frame_cache (struct frame_info *this_frame, void **this_cache)
+mips_insn16_frame_cache (frame_info_ptr this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct mips_frame_cache *cache;
}
static void
-mips_insn16_frame_this_id (struct frame_info *this_frame, void **this_cache,
+mips_insn16_frame_this_id (frame_info_ptr this_frame, void **this_cache,
struct frame_id *this_id)
{
struct mips_frame_cache *info = mips_insn16_frame_cache (this_frame,
}
static struct value *
-mips_insn16_frame_prev_register (struct frame_info *this_frame,
+mips_insn16_frame_prev_register (frame_info_ptr this_frame,
void **this_cache, int regnum)
{
struct mips_frame_cache *info = mips_insn16_frame_cache (this_frame,
static int
mips_insn16_frame_sniffer (const struct frame_unwind *self,
- struct frame_info *this_frame, void **this_cache)
+ frame_info_ptr this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
CORE_ADDR pc = get_frame_pc (this_frame);
};
static CORE_ADDR
-mips_insn16_frame_base_address (struct frame_info *this_frame,
+mips_insn16_frame_base_address (frame_info_ptr this_frame,
void **this_cache)
{
struct mips_frame_cache *info = mips_insn16_frame_cache (this_frame,
};
static const struct frame_base *
-mips_insn16_frame_base_sniffer (struct frame_info *this_frame)
+mips_insn16_frame_base_sniffer (frame_info_ptr this_frame)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
CORE_ADDR pc = get_frame_pc (this_frame);
static CORE_ADDR
micromips_scan_prologue (struct gdbarch *gdbarch,
CORE_ADDR start_pc, CORE_ADDR limit_pc,
- struct frame_info *this_frame,
+ frame_info_ptr this_frame,
struct mips_frame_cache *this_cache)
{
CORE_ADDR end_prologue_addr;
mips_insn32 unwinder. Likewise MIPS16 and the mips_insn16 unwinder. */
static struct mips_frame_cache *
-mips_micro_frame_cache (struct frame_info *this_frame, void **this_cache)
+mips_micro_frame_cache (frame_info_ptr this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct mips_frame_cache *cache;
}
static void
-mips_micro_frame_this_id (struct frame_info *this_frame, void **this_cache,
+mips_micro_frame_this_id (frame_info_ptr this_frame, void **this_cache,
struct frame_id *this_id)
{
struct mips_frame_cache *info = mips_micro_frame_cache (this_frame,
}
static struct value *
-mips_micro_frame_prev_register (struct frame_info *this_frame,
+mips_micro_frame_prev_register (frame_info_ptr this_frame,
void **this_cache, int regnum)
{
struct mips_frame_cache *info = mips_micro_frame_cache (this_frame,
static int
mips_micro_frame_sniffer (const struct frame_unwind *self,
- struct frame_info *this_frame, void **this_cache)
+ frame_info_ptr this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
CORE_ADDR pc = get_frame_pc (this_frame);
};
static CORE_ADDR
-mips_micro_frame_base_address (struct frame_info *this_frame,
+mips_micro_frame_base_address (frame_info_ptr this_frame,
void **this_cache)
{
struct mips_frame_cache *info = mips_micro_frame_cache (this_frame,
};
static const struct frame_base *
-mips_micro_frame_base_sniffer (struct frame_info *this_frame)
+mips_micro_frame_base_sniffer (frame_info_ptr this_frame)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
CORE_ADDR pc = get_frame_pc (this_frame);
static CORE_ADDR
mips32_scan_prologue (struct gdbarch *gdbarch,
CORE_ADDR start_pc, CORE_ADDR limit_pc,
- struct frame_info *this_frame,
+ frame_info_ptr this_frame,
struct mips_frame_cache *this_cache)
{
int prev_non_prologue_insn;
unwinder. Likewise microMIPS and the mips_micro unwinder. */
static struct mips_frame_cache *
-mips_insn32_frame_cache (struct frame_info *this_frame, void **this_cache)
+mips_insn32_frame_cache (frame_info_ptr this_frame, void **this_cache)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct mips_frame_cache *cache;
}
static void
-mips_insn32_frame_this_id (struct frame_info *this_frame, void **this_cache,
+mips_insn32_frame_this_id (frame_info_ptr this_frame, void **this_cache,
struct frame_id *this_id)
{
struct mips_frame_cache *info = mips_insn32_frame_cache (this_frame,
}
static struct value *
-mips_insn32_frame_prev_register (struct frame_info *this_frame,
+mips_insn32_frame_prev_register (frame_info_ptr this_frame,
void **this_cache, int regnum)
{
struct mips_frame_cache *info = mips_insn32_frame_cache (this_frame,
static int
mips_insn32_frame_sniffer (const struct frame_unwind *self,
- struct frame_info *this_frame, void **this_cache)
+ frame_info_ptr this_frame, void **this_cache)
{
CORE_ADDR pc = get_frame_pc (this_frame);
if (mips_pc_is_mips (pc))
};
static CORE_ADDR
-mips_insn32_frame_base_address (struct frame_info *this_frame,
+mips_insn32_frame_base_address (frame_info_ptr this_frame,
void **this_cache)
{
struct mips_frame_cache *info = mips_insn32_frame_cache (this_frame,
};
static const struct frame_base *
-mips_insn32_frame_base_sniffer (struct frame_info *this_frame)
+mips_insn32_frame_base_sniffer (frame_info_ptr this_frame)
{
CORE_ADDR pc = get_frame_pc (this_frame);
if (mips_pc_is_mips (pc))
}
static struct trad_frame_cache *
-mips_stub_frame_cache (struct frame_info *this_frame, void **this_cache)
+mips_stub_frame_cache (frame_info_ptr this_frame, void **this_cache)
{
CORE_ADDR pc;
CORE_ADDR start_addr;
}
static void
-mips_stub_frame_this_id (struct frame_info *this_frame, void **this_cache,
+mips_stub_frame_this_id (frame_info_ptr this_frame, void **this_cache,
struct frame_id *this_id)
{
struct trad_frame_cache *this_trad_cache
}
static struct value *
-mips_stub_frame_prev_register (struct frame_info *this_frame,
+mips_stub_frame_prev_register (frame_info_ptr this_frame,
void **this_cache, int regnum)
{
struct trad_frame_cache *this_trad_cache
static int
mips_stub_frame_sniffer (const struct frame_unwind *self,
- struct frame_info *this_frame, void **this_cache)
+ frame_info_ptr this_frame, void **this_cache)
{
gdb_byte dummy[4];
CORE_ADDR pc = get_frame_address_in_block (this_frame);
};
static CORE_ADDR
-mips_stub_frame_base_address (struct frame_info *this_frame,
+mips_stub_frame_base_address (frame_info_ptr this_frame,
void **this_cache)
{
struct trad_frame_cache *this_trad_cache
};
static const struct frame_base *
-mips_stub_frame_base_sniffer (struct frame_info *this_frame)
+mips_stub_frame_base_sniffer (frame_info_ptr this_frame)
{
if (mips_stub_frame_sniffer (&mips_stub_frame_unwind, this_frame, NULL))
return &mips_stub_frame_base;
than necessary for EABI, because the first few arguments are
passed in registers, but that's OK. */
for (argnum = 0; argnum < nargs; argnum++)
- arg_space += align_up (value_type (args[argnum])->length (),
+ arg_space += align_up (args[argnum]->type ()->length (),
abi_regsize);
sp -= align_up (arg_space, 16);
reference. */
gdb_byte ref_valbuf[MAX_MIPS_ABI_REGSIZE];
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (value_type (arg));
+ struct type *arg_type = check_typedef (arg->type ());
int len = arg_type->length ();
enum type_code typecode = arg_type->code ();
{
gdb_assert (abi_regsize <= ARRAY_SIZE (ref_valbuf));
store_unsigned_integer (ref_valbuf, abi_regsize, byte_order,
- value_address (arg));
+ arg->address ());
typecode = TYPE_CODE_PTR;
len = abi_regsize;
val = ref_valbuf;
gdb_printf (gdb_stdlog, " push");
}
else
- val = value_contents (arg).data ();
+ val = arg->contents ().data ();
/* 32-bit ABIs always start floating point arguments in an
even-numbered floating point register. Round the FP register
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
- arg_space += align_up (value_type (args[argnum])->length (),
+ arg_space += align_up (args[argnum]->type ()->length (),
MIPS64_REGSIZE);
sp -= align_up (arg_space, 16);
{
const gdb_byte *val;
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (value_type (arg));
+ struct type *arg_type = check_typedef (arg->type ());
int len = arg_type->length ();
enum type_code typecode = arg_type->code ();
"mips_n32n64_push_dummy_call: %d len=%d type=%d",
argnum + 1, len, (int) typecode);
- val = value_contents (arg).data ();
+ val = arg->contents ().data ();
/* A 128-bit long double value requires an even-odd pair of
floating-point registers. */
From MIPSpro Assembly Language Programmer's Guide, Document Number:
007-2418-004
- Software
+ Software
Register Name(from
Name fgregdef.h) Use and Linkage
-----------------------------------------------------------------
$f0, $f2 fv0, fv1 Hold results of floating-point type function
- ($f0) and complex type function ($f0 has the
- real part, $f2 has the imaginary part.) */
+ ($f0) and complex type function ($f0 has the
+ real part, $f2 has the imaginary part.) */
if (type->length () > 2 * MIPS64_REGSIZE)
return RETURN_VALUE_STRUCT_CONVENTION;
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
{
- struct type *arg_type = check_typedef (value_type (args[argnum]));
+ struct type *arg_type = check_typedef (args[argnum]->type ());
/* Align to double-word if necessary. */
if (mips_type_needs_double_align (arg_type))
{
const gdb_byte *val;
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (value_type (arg));
+ struct type *arg_type = check_typedef (arg->type ());
int len = arg_type->length ();
enum type_code typecode = arg_type->code ();
"mips_o32_push_dummy_call: %d len=%d type=%d",
argnum + 1, len, (int) typecode);
- val = value_contents (arg).data ();
+ val = arg->contents ().data ();
/* 32-bit ABIs always start floating point arguments in an
even-numbered floating point register. Round the FP register
readbuf, writebuf, 4);
break;
default:
- internal_error (__FILE__, __LINE__, _("bad switch"));
+ internal_error (_("bad switch"));
}
}
if (fval_reg != mips_fval_fpr)
/* Now make space on the stack for the args. */
for (argnum = 0; argnum < nargs; argnum++)
{
- struct type *arg_type = check_typedef (value_type (args[argnum]));
+ struct type *arg_type = check_typedef (args[argnum]->type ());
/* Allocate space on the stack. */
arg_space += align_up (arg_type->length (), MIPS64_REGSIZE);
{
const gdb_byte *val;
struct value *arg = args[argnum];
- struct type *arg_type = check_typedef (value_type (arg));
+ struct type *arg_type = check_typedef (arg->type ());
int len = arg_type->length ();
enum type_code typecode = arg_type->code ();
"mips_o64_push_dummy_call: %d len=%d type=%d",
argnum + 1, len, (int) typecode);
- val = value_contents (arg).data ();
+ val = arg->contents ().data ();
/* Floating point arguments passed in registers have to be
treated specially. On 32-bit architectures, doubles are
into rare_buffer. */
static void
-mips_read_fp_register_single (struct frame_info *frame, int regno,
+mips_read_fp_register_single (frame_info_ptr frame, int regno,
gdb_byte *rare_buffer)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
register. */
static void
-mips_read_fp_register_double (struct frame_info *frame, int regno,
+mips_read_fp_register_double (frame_info_ptr frame, int regno,
gdb_byte *rare_buffer)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
int rawnum = regno % gdbarch_num_regs (gdbarch);
if ((rawnum - mips_regnum (gdbarch)->fp0) & 1)
- internal_error (__FILE__, __LINE__,
- _("mips_read_fp_register_double: bad access to "
+ internal_error (_("mips_read_fp_register_double: bad access to "
"odd-numbered FP register"));
/* mips_read_fp_register_single will find the correct 32 bits from
}
static void
-mips_print_fp_register (struct ui_file *file, struct frame_info *frame,
+mips_print_fp_register (struct ui_file *file, frame_info_ptr frame,
int regnum)
{ /* Do values for FP (float) regs. */
struct gdbarch *gdbarch = get_frame_arch (frame);
}
static void
-mips_print_register (struct ui_file *file, struct frame_info *frame,
+mips_print_register (struct ui_file *file, frame_info_ptr frame,
int regnum)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
static void
mips_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
- struct frame_info *frame, const char *args)
+ frame_info_ptr frame, const char *args)
{
int fcsr = mips_regnum (gdbarch)->fp_control_status;
enum mips_fpu_type type = mips_get_fpu_type (gdbarch);
Print regs in pretty columns. */
static int
-print_fp_register_row (struct ui_file *file, struct frame_info *frame,
+print_fp_register_row (struct ui_file *file, frame_info_ptr frame,
int regnum)
{
gdb_printf (file, " ");
/* Print a row's worth of GP (int) registers, with name labels above. */
static int
-print_gp_register_row (struct ui_file *file, struct frame_info *frame,
+print_gp_register_row (struct ui_file *file, frame_info_ptr frame,
int start_regnum)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
/* OK: get the data in raw format. */
value = get_frame_register_value (frame, regnum);
- if (value_optimized_out (value)
- || !value_entirely_available (value))
+ if (value->optimized_out ()
+ || !value->entirely_available ())
{
gdb_printf (file, "%*s ",
(int) mips_abi_regsize (gdbarch) * 2,
col++;
continue;
}
- raw_buffer = value_contents_all (value).data ();
+ raw_buffer = value->contents_all ().data ();
/* pad small registers */
for (byte = 0;
byte < (mips_abi_regsize (gdbarch)
static void
mips_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
- struct frame_info *frame, int regnum, int all)
+ frame_info_ptr frame, int regnum, int all)
{
if (regnum != -1) /* Do one specified register. */
{
static int
mips_single_step_through_delay (struct gdbarch *gdbarch,
- struct frame_info *frame)
+ frame_info_ptr frame)
{
CORE_ADDR pc = get_frame_pc (frame);
enum mips_isa isa;
fpu = "absent (none)";
break;
default:
- internal_error (__FILE__, __LINE__, _("bad switch"));
+ internal_error (_("bad switch"));
}
if (mips_fpu_type_auto)
gdb_printf ("The MIPS floating-point coprocessor "
instead of relying on globals. Doing that would let generic code
handle the search for this specific architecture. */
if (!gdbarch_update_p (info))
- internal_error (__FILE__, __LINE__, _("set mipsfpu failed"));
+ internal_error (_("set mipsfpu failed"));
}
static void
instead of relying on globals. Doing that would let generic code
handle the search for this specific architecture. */
if (!gdbarch_update_p (info))
- internal_error (__FILE__, __LINE__, _("set mipsfpu failed"));
+ internal_error (_("set mipsfpu failed"));
}
static void
instead of relying on globals. Doing that would let generic code
handle the search for this specific architecture. */
if (!gdbarch_update_p (info))
- internal_error (__FILE__, __LINE__, _("set mipsfpu failed"));
+ internal_error (_("set mipsfpu failed"));
}
static void
The limit on the search is arbitrarily set to 20 instructions. FIXME. */
static CORE_ADDR
-mips_get_mips16_fn_stub_pc (struct frame_info *frame, CORE_ADDR pc)
+mips_get_mips16_fn_stub_pc (frame_info_ptr frame, CORE_ADDR pc)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gory details. */
static CORE_ADDR
-mips_skip_mips16_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
+mips_skip_mips16_trampoline_code (frame_info_ptr frame, CORE_ADDR pc)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
CORE_ADDR start_addr;
so that $t9 has the correct value at function entry. */
static CORE_ADDR
-mips_skip_pic_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
+mips_skip_pic_trampoline_code (frame_info_ptr frame, CORE_ADDR pc)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
}
static CORE_ADDR
-mips_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
+mips_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR pc)
{
CORE_ADDR requested_pc = pc;
CORE_ADDR target_pc;
if (mips_abi_strings[i] == mips_abi_string)
return (enum mips_abi) i;
- internal_error (__FILE__, __LINE__, _("unknown ABI string"));
+ internal_error (_("unknown ABI string"));
}
/* Return the default compressed instruction set, either of MIPS16
if (mips_compression_strings[i] == mips_compression_string)
return (enum mips_isa) i;
- internal_error (__FILE__, __LINE__, _("unknown compressed ISA string"));
+ internal_error (_("unknown compressed ISA string"));
}
static void
}
static struct value *
-value_of_mips_user_reg (struct frame_info *frame, const void *baton)
+value_of_mips_user_reg (frame_info_ptr frame, const void *baton)
{
const int *reg_p = (const int *) baton;
return value_of_register (*reg_p, frame);
static struct gdbarch *
mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
- struct gdbarch *gdbarch;
int elf_flags;
enum mips_abi mips_abi, found_abi, wanted_abi;
int i, num_regs;
}
/* Need a new architecture. Fill in a target specific vector. */
- mips_gdbarch_tdep *tdep = new mips_gdbarch_tdep;
- gdbarch = gdbarch_alloc (&info, tdep);
+ gdbarch *gdbarch
+ = gdbarch_alloc (&info, gdbarch_tdep_up (new mips_gdbarch_tdep));
+ mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
+
tdep->elf_flags = elf_flags;
tdep->mips64_transfers_32bit_regs_p = mips64_transfers_32bit_regs_p;
tdep->found_abi = found_abi;
set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
break;
default:
- internal_error (__FILE__, __LINE__, _("unknown ABI in switch"));
+ internal_error (_("unknown ABI in switch"));
}
/* GCC creates a pseudo-section whose name specifies the size of
set_gdbarch_ptr_bit (gdbarch, long_bit);
break;
default:
- internal_error (__FILE__, __LINE__, _("unknown ABI in switch"));
+ internal_error (_("unknown ABI in switch"));
}
}
}
mips_abi_string = mips_abi_strings[MIPS_ABI_UNKNOWN];
if (MIPS_ABI_LAST + 1
!= sizeof (mips_abi_strings) / sizeof (mips_abi_strings[0]))
- internal_error (__FILE__, __LINE__, _("mips_abi_strings out of sync"));
+ internal_error (_("mips_abi_strings out of sync"));
gdbarch_register (bfd_arch_mips, mips_gdbarch_init, mips_dump_tdep);
projects / binutils-gdb.git / blobdiff