/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
- Copyright (C) 1996-2016 Free Software Foundation, Inc.
+ Copyright (C) 1996-2022 Free Software Foundation, Inc.
This file is part of GDB.
#include "frame-unwind.h"
#include "frame-base.h"
#include "symtab.h"
-#include "dwarf2-frame.h"
+#include "dwarf2/frame.h"
#include "osabi.h"
#include "infcall.h"
#include "prologue-value.h"
/* The am33-2 has 64 registers. */
#define MN10300_MAX_NUM_REGS 64
+/* Big enough to hold the size of the largest register in bytes. */
+#define MN10300_MAX_REGISTER_SIZE 64
+
/* This structure holds the results of a prologue analysis. */
struct mn10300_prologue
{
{
int i, align = 1;
- switch (TYPE_CODE (type))
+ switch (type->code ())
{
case TYPE_CODE_INT:
case TYPE_CODE_ENUM:
case TYPE_CODE_FLT:
case TYPE_CODE_PTR:
case TYPE_CODE_REF:
+ case TYPE_CODE_RVALUE_REF:
return TYPE_LENGTH (type);
case TYPE_CODE_COMPLEX:
case TYPE_CODE_STRUCT:
case TYPE_CODE_UNION:
- for (i = 0; i < TYPE_NFIELDS (type); i++)
+ for (i = 0; i < type->num_fields (); i++)
{
- int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
+ int falign = mn10300_type_align (type->field (i).type ());
while (align < falign)
align <<= 1;
}
case TYPE_CODE_ARRAY:
/* HACK! Structures containing arrays, even small ones, are not
- elligible for returning in registers. */
+ eligible for returning in registers. */
return 256;
case TYPE_CODE_TYPEDEF:
if (TYPE_LENGTH (type) > 8)
return 1;
- switch (TYPE_CODE (type))
+ switch (type->code ())
{
case TYPE_CODE_STRUCT:
case TYPE_CODE_UNION:
/* Structures with a single field are handled as the field
itself. */
- if (TYPE_NFIELDS (type) == 1)
- return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
+ if (type->num_fields () == 1)
+ return mn10300_use_struct_convention (type->field (0).type ());
/* Structures with word or double-word size are passed in memory, as
long as they require at least word alignment. */
int len = TYPE_LENGTH (type);
int reg, regsz;
- if (TYPE_CODE (type) == TYPE_CODE_PTR)
+ if (type->code () == TYPE_CODE_PTR)
reg = 4;
else
reg = 0;
regsz = register_size (gdbarch, reg);
if (len <= regsz)
- regcache_raw_write_part (regcache, reg, 0, len, valbuf);
+ regcache->raw_write_part (reg, 0, len, valbuf);
else if (len <= 2 * regsz)
{
- regcache_raw_write (regcache, reg, valbuf);
+ regcache->raw_write (reg, valbuf);
gdb_assert (regsz == register_size (gdbarch, reg + 1));
- regcache_raw_write_part (regcache, reg+1, 0,
- len - regsz, valbuf + regsz);
+ regcache->raw_write_part (reg + 1, 0, len - regsz, valbuf + regsz);
}
else
internal_error (__FILE__, __LINE__,
mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
struct regcache *regcache, void *valbuf)
{
- gdb_byte buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[MN10300_MAX_REGISTER_SIZE];
int len = TYPE_LENGTH (type);
int reg, regsz;
- if (TYPE_CODE (type) == TYPE_CODE_PTR)
+ if (type->code () == TYPE_CODE_PTR)
reg = 4;
else
reg = 0;
regsz = register_size (gdbarch, reg);
+ gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE);
if (len <= regsz)
{
- regcache_raw_read (regcache, reg, buf);
+ regcache->raw_read (reg, buf);
memcpy (valbuf, buf, len);
}
else if (len <= 2 * regsz)
{
- regcache_raw_read (regcache, reg, buf);
+ regcache->raw_read (reg, buf);
memcpy (valbuf, buf, regsz);
gdb_assert (regsz == register_size (gdbarch, reg + 1));
- regcache_raw_read (regcache, reg + 1, buf);
+ regcache->raw_read (reg + 1, buf);
memcpy ((char *) valbuf + regsz, buf, len - regsz);
}
else
return RETURN_VALUE_REGISTER_CONVENTION;
}
-static char *
-register_name (int reg, char **regs, long sizeof_regs)
+static const char *
+register_name (int reg, const char **regs, long sizeof_regs)
{
if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
return NULL;
static const char *
mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "", "",
"", "", "", "", "", "", "", "",
static const char *
am33_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "",
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
static const char *
am33_2_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{
"d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
return builtin_type (gdbarch)->builtin_int;
}
-static CORE_ADDR
-mn10300_read_pc (struct regcache *regcache)
-{
- ULONGEST val;
- regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
- return val;
-}
-
-static void
-mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
-{
- regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
-}
-
/* The breakpoint instruction must be the same size as the smallest
instruction in the instruction set.
The Matsushita mn10x00 processors have single byte instructions
so we need a single byte breakpoint. Matsushita hasn't defined
one, so we defined it ourselves. */
+constexpr gdb_byte mn10300_break_insn[] = {0xff};
-static const unsigned char *
-mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
- int *bp_size)
-{
- static gdb_byte breakpoint[] = {0xff};
- *bp_size = 1;
- return breakpoint;
-}
+typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
/* Model the semantics of pushing a register onto the stack. This
is a helper function for mn10300_analyze_prologue, below. */
push_reg (pv_t *regs, struct pv_area *stack, int regnum)
{
regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
+ stack->store (regs[E_SP_REGNUM], 4, regs[regnum]);
}
/* Translate an "r" register number extracted from an instruction encoding
return E_E0_REGNUM + rreg;
}
-/* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
+/* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
If VALUE is a saved register, ADDR says it was saved at a constant
offset from the frame base, and SIZE indicates that the whole
information. */
static void
mn10300_analyze_prologue (struct gdbarch *gdbarch,
- CORE_ADDR start_pc, CORE_ADDR limit_pc,
- struct mn10300_prologue *result)
+ CORE_ADDR start_pc, CORE_ADDR limit_pc,
+ struct mn10300_prologue *result)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR pc;
int rn;
pv_t regs[MN10300_MAX_NUM_REGS];
- struct pv_area *stack;
- struct cleanup *back_to;
CORE_ADDR after_last_frame_setup_insn = start_pc;
- int am33_mode = AM33_MODE (gdbarch);
+ int am33_mode = get_am33_mode (gdbarch);
memset (result, 0, sizeof (*result));
result->gdbarch = gdbarch;
regs[rn] = pv_register (rn, 0);
result->reg_offset[rn] = 1;
}
- stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- back_to = make_cleanup_free_pv_area (stack);
+ pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- /* The typical call instruction will have saved the return address on the
- stack. Space for the return address has already been preallocated in
- the caller's frame. It's possible, such as when using -mrelax with gcc
- that other registers were saved as well. If this happens, we really
- have no chance of deciphering the frame. DWARF info can save the day
- when this happens. */
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
+ /* The typical call instruction will have saved the return address on the
+ stack. Space for the return address has already been preallocated in
+ the caller's frame. It's possible, such as when using -mrelax with gcc
+ that other registers were saved as well. If this happens, we really
+ have no chance of deciphering the frame. DWARF info can save the day
+ when this happens. */
+ stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
pc = start_pc;
while (pc < limit_pc)
gdb_byte instr[2];
/* Instructions can be as small as one byte; however, we usually
- need at least two bytes to do the decoding, so fetch that many
+ need at least two bytes to do the decoding, so fetch that many
to begin with. */
status = target_read_memory (pc, instr, 2);
if (status != 0)
if ((save_mask & movm_exreg0_bit) && am33_mode)
{
- push_reg (regs, stack, E_E2_REGNUM);
- push_reg (regs, stack, E_E3_REGNUM);
+ push_reg (regs, &stack, E_E2_REGNUM);
+ push_reg (regs, &stack, E_E3_REGNUM);
}
if ((save_mask & movm_exreg1_bit) && am33_mode)
{
- push_reg (regs, stack, E_E4_REGNUM);
- push_reg (regs, stack, E_E5_REGNUM);
- push_reg (regs, stack, E_E6_REGNUM);
- push_reg (regs, stack, E_E7_REGNUM);
+ push_reg (regs, &stack, E_E4_REGNUM);
+ push_reg (regs, &stack, E_E5_REGNUM);
+ push_reg (regs, &stack, E_E6_REGNUM);
+ push_reg (regs, &stack, E_E7_REGNUM);
}
if ((save_mask & movm_exother_bit) && am33_mode)
{
- push_reg (regs, stack, E_E0_REGNUM);
- push_reg (regs, stack, E_E1_REGNUM);
- push_reg (regs, stack, E_MDRQ_REGNUM);
- push_reg (regs, stack, E_MCRH_REGNUM);
- push_reg (regs, stack, E_MCRL_REGNUM);
- push_reg (regs, stack, E_MCVF_REGNUM);
+ push_reg (regs, &stack, E_E0_REGNUM);
+ push_reg (regs, &stack, E_E1_REGNUM);
+ push_reg (regs, &stack, E_MDRQ_REGNUM);
+ push_reg (regs, &stack, E_MCRH_REGNUM);
+ push_reg (regs, &stack, E_MCRL_REGNUM);
+ push_reg (regs, &stack, E_MCVF_REGNUM);
}
if (save_mask & movm_d2_bit)
- push_reg (regs, stack, E_D2_REGNUM);
+ push_reg (regs, &stack, E_D2_REGNUM);
if (save_mask & movm_d3_bit)
- push_reg (regs, stack, E_D3_REGNUM);
+ push_reg (regs, &stack, E_D3_REGNUM);
if (save_mask & movm_a2_bit)
- push_reg (regs, stack, E_A2_REGNUM);
+ push_reg (regs, &stack, E_A2_REGNUM);
if (save_mask & movm_a3_bit)
- push_reg (regs, stack, E_A3_REGNUM);
+ push_reg (regs, &stack, E_A3_REGNUM);
if (save_mask & movm_other_bit)
{
- push_reg (regs, stack, E_D0_REGNUM);
- push_reg (regs, stack, E_D1_REGNUM);
- push_reg (regs, stack, E_A0_REGNUM);
- push_reg (regs, stack, E_A1_REGNUM);
- push_reg (regs, stack, E_MDR_REGNUM);
- push_reg (regs, stack, E_LIR_REGNUM);
- push_reg (regs, stack, E_LAR_REGNUM);
+ push_reg (regs, &stack, E_D0_REGNUM);
+ push_reg (regs, &stack, E_D1_REGNUM);
+ push_reg (regs, &stack, E_A0_REGNUM);
+ push_reg (regs, &stack, E_A1_REGNUM);
+ push_reg (regs, &stack, E_MDR_REGNUM);
+ push_reg (regs, &stack, E_LIR_REGNUM);
+ push_reg (regs, &stack, E_LAR_REGNUM);
/* The `other' bit leaves a blank area of four bytes at
the beginning of its block of saved registers, making
it 32 bytes long in total. */
}
/* mov aM, aN */
else if ((instr[0] & 0xf0) == 0x90
- && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
+ && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
{
int aN = instr[0] & 0x03;
int aM = (instr[0] & 0x0c) >> 2;
}
/* mov dM, dN */
else if ((instr[0] & 0xf0) == 0x80
- && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
+ && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
{
int dN = instr[0] & 0x03;
int dM = (instr[0] & 0x0c) >> 2;
imm8 = extract_signed_integer (&instr[1], 1, byte_order);
regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
- imm8);
+ imm8);
pc += 2;
}
imm16 = extract_signed_integer (buf, 2, byte_order);
regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
- imm16);
+ imm16);
pc += 4;
}
imm32 = extract_signed_integer (buf, 2, byte_order);
regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
- imm32);
+ imm32);
pc += 6;
}
/* fmov fsM, (rN) */
rN = buf[0] & 0x0f;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[translate_rreg (rN)], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[translate_rreg (rN)], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
sM = (buf[0] & 0xf0) >> 4;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[E_SP_REGNUM], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[E_SP_REGNUM], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
Z = (buf[1] & 0x02) >> 1;
fsM = (Z << 4) | sM;
- pv_area_store (stack,
- pv_add (regs[translate_rreg (rN)],
- regs[translate_rreg (rI)]),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add (regs[translate_rreg (rN)],
+ regs[translate_rreg (rI)]),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4,
+ regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
pc += 3;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
pc += 4;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
pc += 6;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
pc += 7;
}
/* mov imm8, aN */
else if ((instr[0] & 0xf0) == 0x90)
- {
+ {
int aN = instr[0] & 0x03;
LONGEST imm8;
}
/* mov imm16, aN */
else if ((instr[0] & 0xfc) == 0x24)
- {
+ {
int aN = instr[0] & 0x03;
gdb_byte buf[2];
LONGEST imm16;
}
/* mov imm32, aN */
else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
- {
+ {
int aN = instr[1] & 0x03;
gdb_byte buf[4];
LONGEST imm32;
}
/* mov imm8, dN */
else if ((instr[0] & 0xf0) == 0x80)
- {
+ {
int dN = instr[0] & 0x03;
LONGEST imm8;
}
/* mov imm16, dN */
else if ((instr[0] & 0xfc) == 0x2c)
- {
+ {
int dN = instr[0] & 0x03;
gdb_byte buf[2];
LONGEST imm16;
}
/* mov imm32, dN */
else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
- {
+ {
int dN = instr[1] & 0x03;
gdb_byte buf[4];
LONGEST imm32;
}
/* Record where all the registers were saved. */
- pv_area_scan (stack, check_for_saved, (void *) result);
+ stack.scan (check_for_saved, (void *) result);
result->prologue_end = after_last_frame_setup_insn;
-
- do_cleanups (back_to);
}
/* Function: skip_prologue
stop_addr = get_frame_pc (this_frame);
/* If we couldn't find any function containing the PC, then
- just initialize the prologue cache, but don't do anything. */
+ just initialize the prologue cache, but don't do anything. */
if (!func_start)
- stop_addr = func_start;
+ stop_addr = func_start;
mn10300_analyze_prologue (get_frame_arch (this_frame),
func_start, stop_addr,
}
}
-/* Here is a dummy implementation. */
-static struct frame_id
-mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
-{
- CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
- CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
- return frame_id_build (sp, pc);
-}
-
static void
mn10300_frame_this_id (struct frame_info *this_frame,
void **this_prologue_cache,
static struct value *
mn10300_frame_prev_register (struct frame_info *this_frame,
- void **this_prologue_cache, int regnum)
+ void **this_prologue_cache, int regnum)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
struct mn10300_prologue *p
= mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
- int reg_size = register_size (get_frame_arch (this_frame), regnum);
if (regnum == E_SP_REGNUM)
return frame_unwind_got_constant (this_frame, regnum, frame_base);
return a description of the stack slot holding it. */
if (p->reg_offset[regnum] != 1)
return frame_unwind_got_memory (this_frame, regnum,
- frame_base + p->reg_offset[regnum]);
+ frame_base + p->reg_offset[regnum]);
/* Otherwise, presume we haven't changed the value of this
register, and get it from the next frame. */
}
static const struct frame_unwind mn10300_frame_unwind = {
+ "mn10300 prologue",
NORMAL_FRAME,
default_frame_unwind_stop_reason,
mn10300_frame_this_id,
default_frame_sniffer
};
-static CORE_ADDR
-mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
-{
- ULONGEST pc;
-
- pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
- return pc;
-}
-
-static CORE_ADDR
-mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
-{
- ULONGEST sp;
-
- sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
- return sp;
-}
-
static void
mn10300_frame_unwind_init (struct gdbarch *gdbarch)
{
dwarf2_append_unwinders (gdbarch);
frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
- set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
- set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
- set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
}
/* Function: push_dummy_call
CORE_ADDR bp_addr,
int nargs, struct value **args,
CORE_ADDR sp,
- int struct_return,
+ function_call_return_method return_method,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_offset = 0;
int argnum;
const gdb_byte *val;
- gdb_byte valbuf[MAX_REGISTER_SIZE];
+ gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE];
/* This should be a nop, but align the stack just in case something
went wrong. Stacks are four byte aligned on the mn10300. */
XXX This doesn't appear to handle pass-by-invisible reference
arguments. */
- regs_used = struct_return ? 1 : 0;
+ regs_used = (return_method == return_method_struct) ? 1 : 0;
for (len = 0, argnum = 0; argnum < nargs; argnum++)
{
arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
/* Allocate stack space. */
sp -= len;
- if (struct_return)
+ if (return_method == return_method_struct)
{
regs_used = 1;
regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
for (argnum = 0; argnum < nargs; argnum++)
{
/* FIXME what about structs? Unions? */
- if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
+ if (value_type (*args)->code () == TYPE_CODE_STRUCT
&& TYPE_LENGTH (value_type (*args)) > 8)
{
/* Change to pointer-to-type. */
arg_len = push_size;
+ gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE);
store_unsigned_integer (valbuf, push_size, byte_order,
value_address (*args));
val = &valbuf[0];
else
{
arg_len = TYPE_LENGTH (value_type (*args));
- val = value_contents (*args);
+ val = value_contents (*args).data ();
}
while (regs_used < 2 && arg_len > 0)
{
CORE_ADDR func_addr = find_function_addr (target_func, NULL);
CORE_ADDR unwound_sp
- = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
+ = gdbarch_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
if (sp != unwound_sp)
regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
- sp - (unwound_sp - sp));
+ sp - (unwound_sp - sp));
}
return sp;
struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
- struct gdbarch_tdep *tdep;
int num_regs;
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
- tdep = XNEW (struct gdbarch_tdep);
+ mn10300_gdbarch_tdep *tdep = new mn10300_gdbarch_tdep;
gdbarch = gdbarch_alloc (&info, tdep);
switch (info.bfd_arch_info->mach)
set_gdbarch_num_regs (gdbarch, num_regs);
set_gdbarch_register_type (gdbarch, mn10300_register_type);
set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
- set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
- set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
/* Stack unwinding. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
/* Breakpoints. */
- set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+ mn10300_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ mn10300_breakpoint::bp_from_kind);
/* decr_pc_after_break? */
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
/* Stage 2 */
set_gdbarch_return_value (gdbarch, mn10300_return_value);
static void
mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
- tdep->am33_mode);
+ mn10300_gdbarch_tdep *tdep = (mn10300_gdbarch_tdep *) gdbarch_tdep (gdbarch);
+ fprintf_filtered (file, "mn10300_dump_tdep: am33_mode = %d\n",
+ tdep->am33_mode);
}
-/* Provide a prototype to silence -Wmissing-prototypes. */
-extern initialize_file_ftype _initialize_mn10300_tdep;
-
+void _initialize_mn10300_tdep ();
void
-_initialize_mn10300_tdep (void)
+_initialize_mn10300_tdep ()
{
gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
}