gdb/mi: make current_token a field of mi_interp

[binutils-gdb.git] / gdb / riscv-tdep.c

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 144eb7e0132737dddd83f5f25d7317e7b33f14b3..3a2891c2c9201510e653870e241bd1614df6104e 100644 (file)
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -56,7 +56,7 @@
 #include "prologue-value.h"
 #include "arch/riscv.h"
 #include "riscv-ravenscar-thread.h"
-#include "safe-ctype.h"
+#include "gdbsupport/gdb-safe-ctype.h"
 
 /* The stack must be 16-byte aligned.  */
 #define SP_ALIGNMENT 16
@@ -1145,7 +1145,7 @@ riscv_print_one_register_info (struct gdbarch *gdbarch,
   enum tab_stops { value_column_1 = 15 };
 
   gdb_puts (name, file);
-  print_spaces (value_column_1 - strlen (name), file);
+  print_spaces (std::max<int> (1, value_column_1 - strlen (name)), file);
 
   try
     {
@@ -1812,7 +1812,6 @@ ULONGEST
 riscv_insn::fetch_instruction (struct gdbarch *gdbarch,
                               CORE_ADDR addr, int *len)
 {
-  enum bfd_endian byte_order = gdbarch_byte_order_for_code (gdbarch);
   gdb_byte buf[RISCV_MAX_INSN_LEN];
   int instlen, status;
 
@@ -1833,7 +1832,8 @@ riscv_insn::fetch_instruction (struct gdbarch *gdbarch,
        memory_error (TARGET_XFER_E_IO, addr + 2);
     }
 
-  return extract_unsigned_integer (buf, instlen, byte_order);
+  /* RISC-V Specification states instructions are always little endian */
+  return extract_unsigned_integer (buf, instlen, BFD_ENDIAN_LITTLE);
 }
 
 /* Fetch from target memory an instruction at PC and decode it.  This can