code that can handle both. The 64-bit specific code lives in
sparc64-tdep.c; don't add any here. */
-/* The SPARC Floating-Point Quad-Precision format is similar to
- big-endian IA-64 Quad-Precision format. */
-#define floatformats_sparc_quad floatformats_ia64_quad
-
/* The stack pointer is offset from the stack frame by a BIAS of 2047
(0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
hosts, so undefine it first. */
static CORE_ADDR
sparc32_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
{
- struct symtab_and_line sal;
CORE_ADDR func_addr;
struct sparc_frame_cache cache;
static int
sparc32_struct_return_from_sym (struct symbol *sym)
{
- struct type *type = check_typedef (SYMBOL_TYPE (sym));
+ struct type *type = check_typedef (sym->type ());
enum type_code code = type->code ();
if (code == TYPE_CODE_FUNC || code == TYPE_CODE_METHOD)
tdep->cp0_registers_num = ARRAY_SIZE (sparc32_cp0_register_names);
set_gdbarch_long_double_bit (gdbarch, 128);
- set_gdbarch_long_double_format (gdbarch, floatformats_sparc_quad);
+ set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
set_gdbarch_wchar_bit (gdbarch, 16);
set_gdbarch_wchar_signed (gdbarch, 1);