Remove target_has_execution macro

[binutils-gdb.git] / gdb / sparc64-tdep.c

diff --git a/gdb/sparc64-tdep.c b/gdb/sparc64-tdep.c
index 5d6ef071099fe5ef97c35c22ca2d8e16919d521f..a6e46570437c369c33a75f54e6da072922363100 100644 (file)
--- a/gdb/sparc64-tdep.c
+++ b/gdb/sparc64-tdep.c
@@ -33,8 +33,8 @@
 #include "target-descriptions.h"
 #include "target.h"
 #include "value.h"
-
 #include "sparc64-tdep.h"
+#include <forward_list>
 
 /* This file implements the SPARC 64-bit ABI as defined by the
    section "Low-Level System Information" of the SPARC Compliance
@@ -448,7 +448,7 @@ static void
 adi_examine_command (const char *args, int from_tty)
 {
   /* make sure program is active and adi is available */
-  if (!target_has_execution)
+  if (!target_has_execution ())
     error (_("ADI command requires a live process/thread"));
 
   if (!adi_available ())
@@ -484,7 +484,7 @@ adi_assign_command (const char *args, int from_tty)
     = N_("Usage: adi assign|a[/COUNT] ADDR = VERSION");
 
   /* make sure program is active and adi is available */
-  if (!target_has_execution)
+  if (!target_has_execution ())
     error (_("ADI command requires a live process/thread"));
 
   if (!adi_available ())
@@ -764,10 +764,14 @@ sparc64_fprs_type (struct gdbarch *gdbarch)
   "fprs",                                                                 \
   "y"
 
-static const char *sparc64_fpu_register_names[] = { SPARC64_FPU_REGISTERS };
-static const char *sparc64_cp0_register_names[] = { SPARC64_CP0_REGISTERS };
+static const char * const sparc64_fpu_register_names[] = {
+  SPARC64_FPU_REGISTERS
+};
+static const char * const sparc64_cp0_register_names[] = {
+  SPARC64_CP0_REGISTERS
+};
 
-static const char *sparc64_register_names[] =
+static const char * const sparc64_register_names[] =
 {
   SPARC_CORE_REGISTERS,
   SPARC64_FPU_REGISTERS,
@@ -780,7 +784,7 @@ static const char *sparc64_register_names[] =
 /* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
    registers as "psuedo" registers.  */
 
-static const char *sparc64_pseudo_register_names[] =
+static const char * const sparc64_pseudo_register_names[] =
 {
   "cwp", "pstate", "asi", "ccr",
 
@@ -1181,7 +1185,7 @@ sparc64_16_byte_align_p (struct type *type)
 
       for (i = 0; i < type->num_fields (); i++)
        {
-         struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
+         struct type *subtype = check_typedef (type->field (i).type ());
 
          if (sparc64_16_byte_align_p (subtype))
            return 1;
@@ -1258,7 +1262,7 @@ sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
 
       for (i = 0; i < type->num_fields (); i++)
        {
-         struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
+         struct type *subtype = check_typedef (type->field (i).type ());
          int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
 
          sparc64_store_floating_fields (regcache, subtype, valbuf,
@@ -1276,7 +1280,7 @@ sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
          value in %f1 too (we already have stored in %f0).  */
       if (type->num_fields () == 1)
        {
-         struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
+         struct type *subtype = check_typedef (type->field (0).type ());
 
          if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
            regcache->cooked_write (SPARC_F1_REGNUM, valbuf);
@@ -1346,7 +1350,7 @@ sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
 
       for (i = 0; i < type->num_fields (); i++)
        {
-         struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
+         struct type *subtype = check_typedef (type->field (i).type ());
          int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
 
          sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);