arc: Construct disassembler options dynamically
[binutils-gdb.git] / include / ChangeLog
index e22f3e85452ba1282ffaefccf520ddc3e7664452..27c5e29449707604548ba66a87e5992718456a55 100644 (file)
@@ -1,3 +1,50 @@
+2021-06-02  Shahab Vahedi  <shahab@synopsys.com>
+
+       * dis-asm.h (disassembler_options_arc): New prototype.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h (cpu_is_member): Remove code for MIPSr6 ISA
+       exclusion.
+       (opcode_is_member): Handle ISA level exclusion.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h (isa_is_member): New inline function, factored
+       out from...
+       (opcode_is_member): ... here.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h: Document `g' and `y' operand codes.
+       (mips_reg_operand_type): Add OP_REG_CONTROL enumeration
+       constant.
+
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * opcode/mips.h: Complement change made to opcodes and remove
+       references to the `g' regular MIPS ISA operand code.
+
+2021-05-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/27905
+       * elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): Removed.
+
+2021-05-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/27905
+       * elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): New.
+
+2021-05-23  Tiezhu Yang  <yangtiezhu@loongson.cn>
+
+       * elf/common.h (EM_LOONGARCH): Change Loongson Loongarch to
+       LoongArch.
+
+2021-05-21  Luis Machado  <luis.machado@linaro.org>
+
+       * elf/common.h (NT_MEMTAG): New constant.
+       (NT_MEMTAG_TYPE_AARCH_MTE): New constant.
+
 2021-05-07  ClĂ©ment Chigot  <clement.chigot@atos.net>
 
        * coff/internal.h (C_DWARF): New define.