2002-11-18 Klee Dienes <kdienes@apple.com>

[binutils-gdb.git] / include / opcode / ChangeLog

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 100c886a7aa2687cb6bec636a1552e33c75fa9c8..06ded1db1eb52d63f42dc048ad6d724cab9bbe1a 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,87 @@
+2002-11-18  Klee Dienes  <kdienes@apple.com>
+
+       * arc.h (arc_ext_opcodes): Declare as extern.
+       (arc_ext_operands): Declare as extern.
+       * i860.h (i860_opcodes): Declare as const.
+
+2002-11-18  Svein E. Seldal  <Svein.Seldal@solidas.com>
+
+       * tic4x.h: File reordering. Added enhanced opcodes.
+
+2002-11-16  Svein E. Seldal  <Svein.Seldal@solidas.com>
+
+       * tic4x.h: Major rewrite of entire file. Define instruction
+         classes, and put each instruction into a class.
+
+2002-11-11  Svein E. Seldal  <Svein.Seldal@solidas.com>
+
+       * tic4x.h: Added new opcodes and corrected some bugs.  Add support
+       for new DSP types.
+
+2002-10-14  Alan Modra  <amodra@bigpond.net.au>
+
+       * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
+
+2002-09-30  Gavin Romig-Koch  <gavin@redhat.com>
+            Ken Raeburn  <raeburn@cygnus.com>
+            Aldy Hernandez  <aldyh@redhat.com>
+            Eric Christopher  <echristo@redhat.com>
+            Richard Sandiford  <rsandifo@redhat.com>
+
+       * mips.h: Update comment for new opcodes.
+       (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
+       (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
+       (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
+       (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
+       (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
+       Don't match CPU_R4111 with INSN_4100.
+
+2002-08-19  Elena Zannoni <ezannoni@redhat.com>
+ 
+        From matthew green  <mrg@redhat.com>
+
+        * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
+       instructions.
+        (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
+       PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
+       e500x2 Integer select, branch locking, performance monitor,
+       cache locking and machine check APUs, respectively.
+       (PPC_OPCODE_EFS): New opcode type for efs* instructions.
+       (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
+
+2002-08-13  Stephane Carrez  <stcarrez@nerim.fr>
+
+       * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
+       (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
+       M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
+       memory banks.
+       (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
+
+2002-07-09  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+       * mips.h (INSN_MIPS16): New define.
+
+2002-07-08  Alan Modra  <amodra@bigpond.net.au>
+
+       * i386.h: Remove IgnoreSize from movsx and movzx.
+
+2002-06-08  Alan Modra  <amodra@bigpond.net.au>
+
+       * a29k.h: Replace CONST with const.
+       (CONST): Don't define.
+       * convex.h: Replace CONST with const.
+       (CONST): Don't define.
+       * dlx.h: Replace CONST with const.
+       * or32.h (CONST): Don't define.
+
+2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
+
+       * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
+       (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
+       (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
+       (INSN_MDMX): New constants, for MDMX support.
+       (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
+
 2002-05-28  Kuang Hwa Lin <kuang@sbcglobal.net>
 
        * dlx.h: New file.