+2002-11-18 Klee Dienes <kdienes@apple.com>
+
+ * arc.h (arc_ext_opcodes): Declare as extern.
+ (arc_ext_operands): Declare as extern.
+ * i860.h (i860_opcodes): Declare as const.
+
+2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
+
+ * tic4x.h: File reordering. Added enhanced opcodes.
+
+2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
+
+ * tic4x.h: Major rewrite of entire file. Define instruction
+ classes, and put each instruction into a class.
+
+2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
+
+ * tic4x.h: Added new opcodes and corrected some bugs. Add support
+ for new DSP types.
+
+2002-10-14 Alan Modra <amodra@bigpond.net.au>
+
+ * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
+
+2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
+ Ken Raeburn <raeburn@cygnus.com>
+ Aldy Hernandez <aldyh@redhat.com>
+ Eric Christopher <echristo@redhat.com>
+ Richard Sandiford <rsandifo@redhat.com>
+
+ * mips.h: Update comment for new opcodes.
+ (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
+ (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
+ (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
+ (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
+ (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
+ Don't match CPU_R4111 with INSN_4100.
+
+2002-08-19 Elena Zannoni <ezannoni@redhat.com>
+
+ From matthew green <mrg@redhat.com>
+
+ * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
+ instructions.
+ (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
+ PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
+ e500x2 Integer select, branch locking, performance monitor,
+ cache locking and machine check APUs, respectively.
+ (PPC_OPCODE_EFS): New opcode type for efs* instructions.
+ (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
+
+2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
+
+ * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
+ (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
+ M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
+ memory banks.
+ (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
+
+2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * mips.h (INSN_MIPS16): New define.
+
+2002-07-08 Alan Modra <amodra@bigpond.net.au>
+
+ * i386.h: Remove IgnoreSize from movsx and movzx.
+
+2002-06-08 Alan Modra <amodra@bigpond.net.au>
+
+ * a29k.h: Replace CONST with const.
+ (CONST): Don't define.
+ * convex.h: Replace CONST with const.
+ (CONST): Don't define.
+ * dlx.h: Replace CONST with const.
+ * or32.h (CONST): Don't define.
+
+2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
+
+ * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
+ (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
+ (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
+ (INSN_MDMX): New constants, for MDMX support.
+ (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
+
+2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
+
+ * dlx.h: New file.
+
+2002-05-25 Alan Modra <amodra@bigpond.net.au>
+
+ * ia64.h: Use #include "" instead of <> for local header files.
+ * sparc.h: Likewise.
+
+2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
+2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
+
+ * h8300.h: Corrected defs of all control regs
+ and eepmov instr.
+
+2002-04-11 Alan Modra <amodra@bigpond.net.au>
+
+ * i386.h: Add intel mode cmpsd and movsd.
+ Put them before SSE2 insns, so that rep prefix works.
+
+2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
+
+ * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
+ instructions.
+ (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
+ may be passed along with the ISA bitmask.
+
+2002-03-05 Paul Koning <pkoning@equallogic.com>
+
+ * pdp11.h: Add format codes for float instruction formats.
+
+2002-02-25 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
+
+Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
+
+ * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
+
+Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
+
+ * i386.h (push,pop): Allow 16bit operands in 64bit mode.
+ (xchg): Fix.
+ (in, out): Disable 64bit operands.
+ (call, jmp): Avoid REX prefixes.
+ (jcxz): Prohibit in 64bit mode
+ (jrcxz, loop): Add 64bit variants.
+ (movq): Fix patterns.
+ (movmskps, pextrw, pinstrw): Add 64bit variants.
+
+2002-01-31 Ivan Guzvinec <ivang@opencores.org>
+
+ * or32.h: New file.
+
+2002-01-22 Graydon Hoare <graydon@redhat.com>
+
+ * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
+ (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
+
+2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
+
+ * h8300.h: Comment typo fix.
+
+2002-01-03 matthew green <mrg@redhat.com>
+
+ * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
+ (PPC_OPCODE_BOOKE64): Likewise.
+
+Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
+
+ * hppa.h (call, ret): Move to end of table.
+ (addb, addib): PA2.0 variants should have been PA2.0W.
+ (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
+ happy.
+ (fldw, fldd, fstw, fstd, bb): Likewise.
+ (short loads/stores): Tweak format specifier slightly to keep
+ disassembler happy.
+ (indexed loads/stores): Likewise.
+ (absolute loads/stores): Likewise.
+
+2001-12-04 Alexandre Oliva <aoliva@redhat.com>
+
+ * d10v.h (OPERAND_NOSP): New macro.
+
+2001-11-29 Alexandre Oliva <aoliva@redhat.com>
+
+ * d10v.h (OPERAND_SP): New macro.
+
+2001-11-15 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
+
+2001-11-11 Timothy Wall <twall@alum.mit.edu>
+
+ * tic54x.h: Revise opcode layout; don't really need a separate
+ structure for parallel opcodes.
+
+2001-11-13 Zack Weinberg <zack@codesourcery.com>
+ Alan Modra <amodra@bigpond.net.au>
+
+ * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
+ accept WordReg.
+
+2001-11-04 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.h (OPCODE_IS_MEMBER): Remove extra space.
+
+2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * mmix.h: New file.
+
+2001-10-18 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
+ of the expression, to make source code merging easier.
+
+2001-10-17 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.h: Sort coprocessor instruction argument characters
+ in comment, add a few more words of description for "H".
+
+2001-10-17 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.h (INSN_SB1): New cpu-specific instruction bit.
+ (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
+ if cpu is CPU_SB1.
+
+2001-10-17 matthew green <mrg@redhat.com>
+
+ * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
+
+2001-10-12 matthew green <mrg@redhat.com>
+
+ * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
+ opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
+ instructions, respectively.
+
+2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * v850.h: Remove spurious comment.
+
+2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * h8300.h: Fix compile time warning messages
+
2001-09-04 Richard Henderson <rth@redhat.com>
* alpha.h (struct alpha_operand): Pack elements into bitfields.
* ppc.h: Revert 2001-08-08.
+2001-08-10 Richard Sandiford <rsandifo@redhat.com>
+
+ * mips.h (INSN_GP32): Remove.
+ (OPCODE_IS_MEMBER): Remove gp32 parameter.
+ (M_MOVE): New macro identifier.
+
2001-08-08 Alan Modra <amodra@one.net.au>
1999-10-25 Torbjorn Granlund <tege@swox.com>
* ppc.h (struct powerpc_operand): New field `reloc'.
+2001-08-01 Aldy Hernandez <aldyh@redhat.com>
+
+ * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
+
+2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
+
+ * cgen.h (CGEN_INSN): Add regex support.
+ (build_insn_regex): Declare.
+
2001-07-11 Frank Ch. Eigler <fche@redhat.com>
* cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
projects / binutils-gdb.git / blobdiff