RISC-V: Support debug and float CSR as the unprivileged ones.

[binutils-gdb.git] / include / opcode / arc.h

diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index cd8b1a8880ba73676965549aa9f45f2537319658..3a05cd893320592f197421d7041ff6bda786f19d 100644 (file)
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -1,5 +1,5 @@
 /* Opcode table for the ARC.
-   Copyright (C) 1994-2017 Free Software Foundation, Inc.
+   Copyright (C) 1994-2020 Free Software Foundation, Inc.
 
    Contributed by Claudiu Zissulescu (claziss@synopsys.com)
 
@@ -64,6 +64,7 @@ typedef enum
   JUMP,
   KERNEL,
   LEAVE,
+  LLOCK,
   LOAD,
   LOGICAL,
   LOOP,
@@ -76,9 +77,11 @@ typedef enum
   PMU,
   POP,
   PUSH,
+  SCOND,
   SJLI,
   STORE,
   SUB,
+  SWITCH,
   ULTRAIP,
   XY
 } insn_class_t;
@@ -97,6 +100,7 @@ typedef enum
   DP       = (1U << 6),
   DPA      = (1U << 7),
   DPX      = (1U << 8),
+  FASTMATH = (1U << 23),
   LL64     = (1U << 9),
   MPY1E    = (1U << 10),
   MPY6E    = (1U << 11),
@@ -200,6 +204,7 @@ extern int arc_opcode_len (const struct arc_opcode *opcode);
 #define ARC_OPCODE_ARCALL  (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700      \
                            | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
 #define ARC_OPCODE_ARCFPX  (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM)
+#define ARC_OPCODE_ARCV1   (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700)
 #define ARC_OPCODE_ARCV2   (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
 #define ARC_OPCODE_ARCMPY6E  (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCV2)