PR26493 UBSAN: elfnn-riscv.c left shift of negative value

[binutils-gdb.git] / include / opcode / cr16.h

diff --git a/include/opcode/cr16.h b/include/opcode/cr16.h
index ad42d14c04ff30546df7f5c7be0c6742c813e7cd..78053e4396dd85feb54e4ac577fd8aebab5eab4a 100644 (file)
--- a/include/opcode/cr16.h
+++ b/include/opcode/cr16.h
@@ -1,5 +1,5 @@
 /* cr16.h -- Header file for CR16 opcode and register tables.
-   Copyright (C) 2007-2015 Free Software Foundation, Inc.
+   Copyright (C) 2007-2020 Free Software Foundation, Inc.
    Contributed by M R Swami Reddy
 
    This file is part of GAS, GDB and the GNU binutils.
@@ -404,9 +404,6 @@ extern const unsigned int cr16_num_cc;
 /* Table of instructions with no operands.  */
 extern const char * cr16_no_op_insn[];
 
-/* Current instruction we're assembling.  */
-extern const inst *instruction;
-
 /* A macro for representing the instruction "constant" opcode, that is,
    the FIXED part of the instruction. The "constant" opcode is represented
    as a 32-bit unsigned long, where OPC is expanded (by a left SHIFT)
@@ -439,11 +436,6 @@ typedef unsigned long long ULONGLONG;
 typedef unsigned long dwordU;
 typedef unsigned short wordU;
 
-/* Globals to store opcode data and build the instruction.  */
-extern wordU cr16_words[3];
-extern ULONGLONG cr16_allWords;
-extern ins cr16_currInsn;
-
 /* Prototypes for function in cr16-dis.c.  */
 extern void cr16_make_instruction (void);
 extern int  cr16_match_opcode (void);