RISC-V: Support to add implicit extensions for G.

[binutils-gdb.git] / include / opcode / riscv.h

diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index d57f45beb1390360d9cc14bf4cf2e965c3052407..680780a664e28e983900b9dc2e933ce3664e8f81 100644 (file)
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -1,5 +1,5 @@
 /* riscv.h.  RISC-V opcode list for GDB, the GNU debugger.
-   Copyright (C) 2011-2018 Free Software Foundation, Inc.
+   Copyright (C) 2011-2020 Free Software Foundation, Inc.
    Contributed by Andrew Waterman
 
    This file is part of GDB, GAS, and the GNU binutils.
@@ -204,7 +204,7 @@ static const char * const riscv_pred_succ[16] =
 #define OP_SH_RS2              20
 #define OP_MASK_RS1            0x1f
 #define OP_SH_RS1              15
-#define OP_MASK_RS3            0x1f
+#define OP_MASK_RS3            0x1fU
 #define OP_SH_RS3              27
 #define OP_MASK_RD             0x1f
 #define OP_SH_RD               7
@@ -223,14 +223,14 @@ static const char * const riscv_pred_succ[16] =
 #define OP_MASK_RL             0x1
 #define OP_SH_RL               25
 
-#define OP_MASK_CUSTOM_IMM     0x7f
+#define OP_MASK_CUSTOM_IMM     0x7fU
 #define OP_SH_CUSTOM_IMM       25
-#define OP_MASK_CSR            0xfff
+#define OP_MASK_CSR            0xfffU
 #define OP_SH_CSR              20
 
 #define OP_MASK_FUNCT3         0x7
 #define OP_SH_FUNCT3           12
-#define OP_MASK_FUNCT7         0x7f
+#define OP_MASK_FUNCT7         0x7fU
 #define OP_SH_FUNCT7           25
 #define OP_MASK_FUNCT2         0x3
 #define OP_SH_FUNCT2           25
@@ -294,6 +294,23 @@ static const char * const riscv_pred_succ[16] =
 /* The maximal number of subset can be required. */
 #define MAX_SUBSET_NUM 4
 
+/* All RISC-V instructions belong to at least one of these classes.  */
+
+enum riscv_insn_class
+  {
+   INSN_CLASS_NONE,
+
+   INSN_CLASS_I,
+   INSN_CLASS_C,
+   INSN_CLASS_A,
+   INSN_CLASS_M,
+   INSN_CLASS_F,
+   INSN_CLASS_D,
+   INSN_CLASS_D_AND_C,
+   INSN_CLASS_F_AND_C,
+   INSN_CLASS_Q,
+  };
+
 /* This structure holds information for a particular instruction.  */
 
 struct riscv_opcode
@@ -302,9 +319,9 @@ struct riscv_opcode
   const char *name;
   /* The requirement of xlen for the instruction, 0 if no requirement.  */
   unsigned xlen_requirement;
-  /* An array of ISA subset name (I, M, A, F, D, Xextension), must ended
-     with a NULL pointer sential.  */
-  const char *subset[MAX_SUBSET_NUM];
+  /* Class to which this instruction belongs.  Used to decide whether or
+     not this instruction is legal in the current -march context.  */
+  enum riscv_insn_class insn_class;
   /* A string describing the arguments for this instruction.  */
   const char *args;
   /* The basic opcode for the instruction.  When assembling, this
@@ -326,6 +343,75 @@ struct riscv_opcode
   unsigned long pinfo;
 };
 
+/* The current supported ISA spec versions.  */
+
+enum riscv_isa_spec_class
+{
+  ISA_SPEC_CLASS_NONE,
+
+  ISA_SPEC_CLASS_2P2,
+  ISA_SPEC_CLASS_20190608,
+  ISA_SPEC_CLASS_20191213
+};
+
+#define RISCV_UNKNOWN_VERSION -1
+
+/* This structure holds version information for specific ISA.  */
+
+struct riscv_ext_version
+{
+  const char *name;
+  enum riscv_isa_spec_class isa_spec_class;
+  int major_version;
+  int minor_version;
+};
+
+/* All RISC-V CSR belong to one of these classes.  */
+
+enum riscv_csr_class
+{
+  CSR_CLASS_NONE,
+
+  CSR_CLASS_I,
+  CSR_CLASS_I_32,      /* rv32 only */
+  CSR_CLASS_F,         /* f-ext only */
+  CSR_CLASS_DEBUG      /* debug CSR */
+};
+
+/* The current supported privilege spec versions.  */
+
+enum riscv_priv_spec_class
+{
+  PRIV_SPEC_CLASS_NONE,
+
+  PRIV_SPEC_CLASS_1P9P1,
+  PRIV_SPEC_CLASS_1P10,
+  PRIV_SPEC_CLASS_1P11,
+  PRIV_SPEC_CLASS_DRAFT
+};
+
+/* This structure holds all restricted conditions for a CSR.  */
+
+struct riscv_csr_extra
+{
+  /* Class to which this CSR belongs.  Used to decide whether or
+     not this CSR is legal in the current -march context.  */
+  enum riscv_csr_class csr_class;
+
+  /* CSR may have differnet numbers in the previous priv spec.  */
+  unsigned address;
+
+  /* Record the CSR is defined/valid in which versions.  */
+  enum riscv_priv_spec_class define_version;
+
+  /* Record the CSR is aborted/invalid from which versions.  If it isn't
+     aborted in the current version, then it should be CSR_CLASS_VDRAFT.  */
+  enum riscv_priv_spec_class abort_version;
+
+  /* The CSR may have more than one setting.  */
+  struct riscv_csr_extra *next;
+};
+
 /* Instruction is a simple alias (e.g. "mv" for "addi").  */
 #define        INSN_ALIAS              0x00000001
 
@@ -403,5 +489,9 @@ extern const char * const riscv_fpr_names_abi[NFPR];
 
 extern const struct riscv_opcode riscv_opcodes[];
 extern const struct riscv_opcode riscv_insn_types[];
+extern const struct riscv_ext_version riscv_ext_version_table[];
+
+extern int
+riscv_get_isa_spec_class (const char *, enum riscv_isa_spec_class *);
 
 #endif /* _RISCV_H_ */