etnaviv: implement ETC2 block patching for HALTI0

[mesa.git] / include / pci_ids / i915_pci_ids.h

diff --git a/include/pci_ids/i915_pci_ids.h b/include/pci_ids/i915_pci_ids.h
index 551c010a9a7101fc5906451d9fd922729b49568b..1c43c8ec7988305a504fc284a00d1be7c3a9747c 100644 (file)
--- a/include/pci_ids/i915_pci_ids.h
+++ b/include/pci_ids/i915_pci_ids.h
@@ -1,15 +1,15 @@
-CHIPSET(0x3577, I830_M, i8xx)
-CHIPSET(0x2562, 845_G, i8xx)
-CHIPSET(0x3582, I855_GM, i8xx)
-CHIPSET(0x2572, I865_G, i8xx)
-CHIPSET(0x2582, I915_G, i915)
-CHIPSET(0x258A, E7221_G, i915)
-CHIPSET(0x2592, I915_GM, i915)
-CHIPSET(0x2772, I945_G, i945)
-CHIPSET(0x27A2, I945_GM, i945)
-CHIPSET(0x27AE, I945_GME, i945)
-CHIPSET(0x29B2, Q35_G, i945)
-CHIPSET(0x29C2, G33_G, i945)
-CHIPSET(0x29D2, Q33_G, i945)
-CHIPSET(0xA011, IGD_GM, i945)
-CHIPSET(0xA001, IGD_G, i945)
+CHIPSET(0x3577, I830_M,   "Intel(R) 830M")
+CHIPSET(0x2562, 845_G,    "Intel(R) 845G")
+CHIPSET(0x3582, I855_GM,  "Intel(R) 852GM/855GM")
+CHIPSET(0x2572, I865_G,   "Intel(R) 865G")
+CHIPSET(0x2582, I915_G,   "Intel(R) 915G")
+CHIPSET(0x258A, E7221_G,  "Intel(R) E7221G (i915)")
+CHIPSET(0x2592, I915_GM,  "Intel(R) 915GM")
+CHIPSET(0x2772, I945_G,   "Intel(R) 945G")
+CHIPSET(0x27A2, I945_GM,  "Intel(R) 945GM")
+CHIPSET(0x27AE, I945_GME, "Intel(R) 945GME")
+CHIPSET(0x29B2, Q35_G,    "Intel(R) Q35")
+CHIPSET(0x29C2, G33_G,    "Intel(R) G33")
+CHIPSET(0x29D2, Q33_G,    "Intel(R) Q33")
+CHIPSET(0xA011, PNV_GM,   "Intel(R) Pineview M")
+CHIPSET(0xA001, PNV_G,    "Intel(R) Pineview")