-# Welcome to Libre-SoC!
+# Welcome to Libre-SOC
+(formerly Libre-RISCV)
-Libre-RISCV is an effort to develop an completely open/Libre SOC that is open to the bedrock!
+> We're building a chip. A fast chip. A safe chip. A trusted chip.
-This is a publicly editable wiki.
+> A chip with lots of peripherals. And a VPU. And a 3D GPU...
-All wikis are supposed to have a [[SandBox]], so this one does too.
+> Oh and here, have the source code...
-This wiki is powered by [[ikiwiki]].
+Sounds cool? Learn more about the [why](why_a_libresoc) behind Libre-SOC
+and [our mission](The_Mission).
-This is the sitemap: [[sitemap]]
+# Our Team
-----
+We are proud of our talented and diverse [team](about_us).
-# Joining/Onboarding Process
+# How Can I Help?
-This process probably needs some improvement, but the basic
-idea is to join the [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev), introduce yourself,
-and read through [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/).
+If you would like to fund us, see [[funding]]. We currently have some
+funding and always appreciate more! If you are a Corporation or an
+individual you can donate tax-free to NLNet, and they can in turn gift
+our developers. Contact lkcl@lkcl.net for more information.
-The next thing you should do is read through the [bugs list](http://bugs.libre-riscv.org) and see if there are any bugs that pique your interest.
+If you want to write code with us, keep reading. If you want to *learn* so that you can write code with us, see below.
-We do have funding available (see [[nlnet]]) upon completion of issues - we are also working on procuring more funding which gets the project to nanometre scale tapeout.
+1. First, join the
+[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
+introduce yourself, and read through
+[recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
+and the [[charter]].
+2. The next thing you should do is read through the [bugs
+list](http://bugs.libre-riscv.org) and see if there are any bugs that
+pique your interest.
+3. After that, go ahead and take a look at the resources section below.
+Try and clone a repository with
+``git clone https://git.libre-riscv.org/git/repositoryname.git``
+4. If you plan to do HDL work, you should familiarize yourself with our
+ [[HDL_workflow]].
+5. We do have funding available (see [[nlnet]]) upon completion of issues -
+we are also working on procuring more funding which gets the project to
+nanometre scale tapeout.
+6. After all this, if you feel that Libre-SOC is a something that
+you would like to contribute to, add yourself to the [current_members](about_us)
+page, fill in some information about yourself, and join the mailing list
+and say hello.
-## Needed Skills
+Also note that you can edit this wiki. See the last section of this page.
-Most labor is currently being applied to developing the GPU portion of the LibreSOC.
+## How can I learn?
-The highest priority needed at the moment is a c++ engineer to work on a MESA 3D driver. This will begin life as similar to SwiftShader however retaining the vectorisation and predication intrinsics.
+The whole purpose of this project is to be a learning environment as well as an actual business. If you want to learn how to do ASIC design, with a view to contributing or starting your own ASIC business, start here: [[3d_gpu/tutorial]]. Yes, really: do not let anyone tell you that you can't learn this stuff too.
-Long-term we mainly need HDL engineers at the moment. Particularly those familiar with nMigen or just python. Most of the techniques being used require software engineering skills (OO design, polymorphism) than they do more traditional HDL programming skills. See [[HDL_workflow]]
+Along the way, if you find any resources or links that you found particularly helpful, please add them to that page so that other people can also benefit.
-Also, individuals with experience in formal mathematical verification are quite welcome.
+## Needed Skills
-TODO: add a list of upcoming project tasks/milestones
+Most labor is currently being applied to developing the GPU portion of
+the Libre-SOC.
-# Resources
+The highest priority needed at the moment is a c++ engineer to work on
+a MESA 3D driver. This will begin life similar to SwiftShader however
+retaining the vectorisation and predication intrinsics as well as hardware
+accelerated opcodes (all of which SwiftShader lacks)
-* Mailing Lists <http://lists.libre-riscv.org> -
- Archives at <http://lists.libre-riscv.org/pipermail>
-* Git repositories <http://git.libre-riscv.org>
- may be cloned publicly with
- git clone https://git.libre-riscv.org/git/repositoryname.git
-* Bugzilla at <http://bugs.libre-riscv.org/>
-* Kazan (Vulkan driver) at <https://salsa.debian.org/Kazan-team/kazan>
-* Further Information [[resources]]
+Medium to long-term we need HDL engineers. Particularly those familiar
+with nMigen or just python. Most of the techniques being used require
+software engineering skills (OO design, polymorphism) than they do more
+traditional HDL programming skills. Basically if you have experience in 2
+of the following you'll do fine: python, nmigen, verilog/VHDL/gate-level
+design. See [[HDL_workflow]]
-# Main Pages
+Also, individuals with experience in formal mathematical verification
+are quite welcome.
-* Libre-RISCV [[charter]]
-* [[shakti/m_class]]
-* [[alt_rvp]]
-* [[3d_gpu]]
-* [[vpu]]
-* [[simple_v_extension]]
-* [[zfpacc_proposal]]
-* [[ztrans_proposal]]
-* [[simple_v_extension/specification/mv.x]]
-* [[simple_v_extension/specification/ld.x]]
-* Specifications and [[resources]]
+List of upcoming project tasks/milestones:
-# Spike Emulator
-* [Set-Up Instructions][1]
+* [Upcoming tasks][1]
+* [NLNet Milestones][2]
-[1]: https://libre-riscv.org/3d_gpu/spike_sv/
+[1]: http://bugs.libre-riscv.org/describecomponents.cgi?product=Libre%20Shakti%20M-Class
+[2]: http://bugs.libre-riscv.org/describecomponents.cgi?product=Libre%20Shakti%20M-Class
projects / libreriscv.git / blobdiff