add explanation / walkthrough of machine-readable files

[libreriscv.git] / index.mdwn

diff --git a/index.mdwn b/index.mdwn
index 62ce1c9f9efeea035f41d37a801d4a585ec54e15..5e8a4865e08962eb344e1957a4b4a7fd2893917f 100644 (file)
--- a/index.mdwn
+++ b/index.mdwn
@@ -5,7 +5,7 @@
 
   <p>A chip with lots of peripherals. And a VPU.  And a 3D GPU...</p>
 
-  <p>Oh and here, have the <a href="http://git.libre-riscv.org">source code</a>...</p>
+  <p>Oh and here, have the <a href="http://git.libre-soc.org">source code</a>...</p>
 </blockquote>
   <hr class="my-4">
 
@@ -64,6 +64,9 @@ We are proud of our talented and diverse [team](about_us).
   See the upcoming [Hackathon](https://www.youtube.com/embed/Px6eakWja3Q"),
   deadline May 15th
 * The [[PowerPC Notebook]] Project
+* [RED Semiconductor](http://redsemiconductor.com) is the commercial realisation of Libre-SOC technology that respects and actively supports Libre principles in its business objectives.
+* [[fed4fire]] for supercomputer access for verilator simulations,
+  with thanks to Ghent University / IMEC.
 
 # How Can I Help?
 
@@ -81,18 +84,21 @@ below.  If there is anything else,
 just get in touch on the list, there is plenty to do.
 
 1. First, join the
-  [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
-  introduce yourself (people will happily say "hello" back"). Read through
-  [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
-  and the [[charter]], and let everyone know, on the list that you're
-  happy with it and agree to it.
+  [mailing list](http://lists.libre-soc.org/mailman/listinfo/libre-soc-dev),
+  introduce yourself (people will happily say "hello" back") and
+  the Freenode IRC channel
+  [#libre-soc](https://libre-soc.org/irclog/latest.log.html).
+  Read through
+  [recent posts](http://lists.libre-soc.org/pipermail/libre-soc-dev/)
+  and the [[charter]], ask questions if you have any and let everyone know,
+  on the list that you're happy with it and agree to it.
 2. The next thing you should do is read through the
-  [bugs list](http://bugs.libre-riscv.org) and
+  [bugs list](http://bugs.libre-soc.org) and
   see if there are any bugs that pique your interest.
   A fascinating way to do that is to view the
   [dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR)
 3. After that, go ahead and take a look at the
-   [git repositories](https://git.libre-riscv.org).
+   [git repositories](https://git.libre-soc.org).
 4. If you plan to do HDL work, you should familiarize yourself with our
   [[HDL_workflow]].  If you would like to help with the ASIC layout,
   see [[HDL_workflow/coriolis2]]
@@ -108,7 +114,8 @@ Also note that you can edit this wiki.  You can experiment in the [[Sandbox]].
 
 ## Quick peek at the code
 
-Here is an example process of how to play with the soc code:
+Here is an example process of how to play with the soc code.  The last
+step you will have needed to install yosys:
 
     pip3 install virtualenv requests
     mkdir ~/.virtualenvs && cd ~/.virtualenvs
@@ -116,17 +123,29 @@ Here is an example process of how to play with the soc code:
     source ~/.virtualenvs/libresoc/bin/activate
     
     cd ~; mkdir libresoc; cd libresoc
+    git clone https://git.libre-soc.org/git/nmigen.git
+    git clone https://git.libre-soc.org/git/nmigen-soc.git
     git clone https://git.libre-soc.org/git/nmutil.git
+    git clone https://git.libre-soc.org/git/c4m-jtag.git
     git clone https://git.libre-soc.org/git/ieee754fpu.git
     git clone https://git.libre-soc.org/git/soc.git
     
+    cd nmigen; python setup.py develop; cd ..
+    cd nmigen-soc; python setup.py develop; cd ..
+    cd c4m-jtag; python setup.py develop; cd ..
     cd nmutil; make install; cd ..
     cd ieee754fpu; make install; cd ..
-    cd soc; make gitupdate; make install; cd ..
+    cd soc; make gitupdate; make develop
     
-    python3 soc/src/soc/decoder/power_decoder.py
+    python3 src/soc/decoder/power_decoder.py
     yosys -p "read_ilang decoder.il; show dec31" 
 
+The full install process may be automated using scripts found
+here: <https://git.libre-soc.org/?p=dev-env-setup.git;a=summary>
+which you can clone with:
+
+    git clone https://git.libre-soc.org/git/dev-env-setup.git
+
 ## How can I learn?
 
 The whole purpose of this project is to be a learning environment as well
@@ -154,10 +173,13 @@ design. See [[HDL_workflow]]
 
 We also need to find a c++ engineer with compiler experience to work on
 a MESA 3D driver. This will begin life similar to SwiftShader however
-retaining the vectorisation and predication intrinsics as well as hardware
-accelerated opcodes (all of which SwiftShader lacks)
+retaining the vectorisation and predication intrinsics then adding
+hardware accelerated opcodes (all of which SwiftShader lacks)
 
 Also, individuals with experience in formal mathematical verification
 are quite welcome.
 
-# [Documentation](/Documentation/index)
+# Documentation
+
+ - [Source Code](/docs/)
+ - [Architecture](3d_gpu/architecture)