-# Welcome to Libre-SoC ([provisionally renamed](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-January/003580.html) from Libre-RISCV)!
+# Welcome to LibreSOC
-Its quite hard to guarantee that a performant processors(think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com):
+> We're building a chip. A fast chip. A safe chip. A trusted chip.
-There are entire [dissertations](http://www.kroening.com/diss/diss-kroe.pdf) dedicated to the subject matter of merely functionally verifying a pipeline(this doesn’t even consider out of order execution).
+> A chip with lots of peripherals. And a VPU. And a 3D GPU...
-Given the fact that [high performing]bug free processors don’t exist anymore, how can you trust your processor? The next best thing is have access to a processor’s design files. Not only have access to them, you need to be able to study and improve them.
+> Oh and here, have the source code...
-Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve intelligence, media consumption, wireless connectivity, etc.
+Sounds cool? Learn more about the [why](why_a_libresoc) behind LibreSOC
+and [our mission](The_Mission).
-LibreSOC strives to deliver a fully capable and competitive Libre integrated System on Chip. We want to maximize the degree of trust a customer can place in his or her processor. We do this by providing the customer the freedom to study, modify, and redistribute the processor source from HDL to VLSI.
+# Our Team
-Right now, we're targeting an (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
+We are proud of our talented and diverse [team](about_us).
-# Wiki Structure
+# How Can I Help?
-This is a publicly editable wiki.
+If you would like to fund us, see [[funding]]. We currently have some
+funding and always appreciate more! If you are a Corporation or an
+individual you can donate tax-free to NLNet, and they can in turn gift
+our developers. Contact lkcl@lkcl.net for more information.
-All wikis are supposed to have a [[SandBox]], so this one does too.
+If you want to write code with us, keep reading.
-This wiki is powered by [[ikiwiki]].
-
-This is the sitemap: [[sitemap]]
-
-----
-
-# Why a Libre SOC?
-Glad you asked! Read about the business and practical benefits of a LibreSOC below.
-
-[[why_a_libresoc]]
-
-# Contact
-
-The main contact point is the
-[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev).
-If you need to contact the sysadmin please use webmaster@libre-riscv.org
-
-# Joining/Onboarding Process
-
-This process probably needs some improvement: the basic
-idea is to join the
+1. First, join the
[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
introduce yourself, and read through
[recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
and the [[charter]].
-
-The next thing you should do is read through the [bugs
+2. The next thing you should do is read through the [bugs
list](http://bugs.libre-riscv.org) and see if there are any bugs that
pique your interest.
-
-We do have funding available (see [[nlnet]]) upon completion of issues -
+3. After that, go ahead and take a look at the resources section below.
+Try and clone a repository with
+``git clone https://git.libre-riscv.org/git/repositoryname.git``
+4. If you plan to do HDL work, you should familiarize yourself with our
+ [[HDL_workflow]].
+5. We do have funding available (see [[nlnet]]) upon completion of issues -
we are also working on procuring more funding which gets the project to
nanometre scale tapeout.
-
-After all this, if you feel that Libre-SoC is a good cause that
-you would like to contribute to, add yourself to the [[current_members]]
+6. After all this, if you feel that Libre-SoC is a something that
+you would like to contribute to, add yourself to the [current_members](about_us)
page, fill in some information about yourself, and join the mailing list
and say hello.
+Also note that you can edit this wiki. See the last section of this page.
+
## Needed Skills
Most labor is currently being applied to developing the GPU portion of
The highest priority needed at the moment is a c++ engineer to work on
a MESA 3D driver. This will begin life similar to SwiftShader however
-retaining the vectorisation and predication intrinsics as well as hardware accelerated opcodes (all of which SwiftShader lacks)
+retaining the vectorisation and predication intrinsics as well as hardware
+accelerated opcodes (all of which SwiftShader lacks)
Medium to long-term we need HDL engineers. Particularly those familiar
with nMigen or just python. Most of the techniques being used require
# Resources
-* Mailing Lists <http://lists.libre-riscv.org> -
- Archives at <http://lists.libre-riscv.org/pipermail>
-* Git repositories <http://git.libre-riscv.org>
- may be cloned publicly with
- git clone https://git.libre-riscv.org/git/repositoryname.git
-* Bugzilla at <http://bugs.libre-riscv.org/>
-* Kazan (Vulkan driver) at <https://salsa.debian.org/Kazan-team/kazan>
-* Further Information [[resources]]
+| Resource | Link |
+| --- | --- |
+| Bugs and Tasks | <http://bugs.libre-riscv.org/> |
+| Mailing Lists | <http://lists.libre-riscv.org> |
+| Archives | <http://lists.libre-riscv.org/pipermail> |
+| Git repositories | <http://git.libre-riscv.org> |
+| Kazan (Vulkan driver) | <https://salsa.debian.org/Kazan-team/kazan> |
+| Standards | [[standards]] |
+| Further Information | [[resources]] |
# Main Pages
* [[ztrans_proposal]]
* [[simple_v_extension/specification/mv.x]]
* [[simple_v_extension/specification/ld.x]]
+* [[future_feature_proposals]]
* Specifications and [[resources]]
# Spike Emulator
[1]: https://libre-riscv.org/3d_gpu/spike_sv/
-# Current Members
-
-[[current_members]]
projects / libreriscv.git / blobdiff