(no commit message)

[libreriscv.git] / index.mdwn

diff --git a/index.mdwn b/index.mdwn
index 790815602a056122fcd57ea18c31931dc796e8ba..f9806a84fb36066ea65ea934b11977cbc07c624c 100644 (file)
--- a/index.mdwn
+++ b/index.mdwn
@@ -116,9 +116,9 @@ Here is an example process of how to play with the soc code:
     source ~/.virtualenvs/libresoc/bin/activate
     
     cd ~; mkdir libresoc; cd libresoc
-    git clone https://git.libre-riscv.org/git/nmutil.git
-    git clone https://git.libre-riscv.org/git/ieee754fpu.git
-    git clone https://git.libre-riscv.org/git/soc.git
+    git clone https://git.libre-soc.org/git/nmutil.git
+    git clone https://git.libre-soc.org/git/ieee754fpu.git
+    git clone https://git.libre-soc.org/git/soc.git
     
     cd nmutil; make install; cd ..
     cd ieee754fpu; make install; cd ..
@@ -160,4 +160,7 @@ accelerated opcodes (all of which SwiftShader lacks)
 Also, individuals with experience in formal mathematical verification
 are quite welcome.
 
-# [Documentation](/Documentation/index)
+# Documentation
+
+ - [Source Code](/Documentation/index)
+ - [Architecture](3d_gpu/architecture)