<h2 class="display-5">Why should I care?</h2>
-With LibreSOC, you can take complex algorithms usually intended for
+With Libre-SOC, you can take complex algorithms usually intended for
power hungry servers with big fat GPUs, and run them on tiny devices
like smartwatches, cellphones, and pocket drones without changing your
code at all.
To the best of our knowledge, no. The closest systems would be ARM Cortex
devices which currently offer mediocre GPU and OpenCL support. Often
-times, it is quite diffcult for customers to get their hands on the
-drivers and install them due to their locked down nature. LibreSOC is
+times, it is quite difficult for customers to get their hands on the
+drivers and install them due to their locked down nature. Libre-SOC is
providing our own Free/Libre drivers. Easy as 1, 2, 3!
<hr class="my-4">
charitable gifting
* [Raptor CS](http://raptorcs.com) has given us access to a powerful
18-core 128 GB RAM TALOS II workstation, online.
+* [Raptor Engineering](https://raptorengineering.com) is providing
+ additional assistance including access to an [[shakti/m_class/LPC]]
+ interface (more to come)
* [MarketNext](http://marketnext.org) is helping us connect to developer
resources in Emerging markets, for completion of NLNet-funded tasks.
+ See the upcoming [Hackathon](https://www.youtube.com/embed/Px6eakWja3Q"),
+ deadline May 15th
+* The [[PowerPC Notebook]] Project
# How Can I Help?
just get in touch on the list, there is plenty to do.
1. First, join the
-[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
-introduce yourself (people will happily say "hello" back"). Read through
-[recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
-and the [[charter]], and let everyone know, on the list that you're
-happy with it and agree to it.
-2. The next thing you should do is read through the [bugs
-list](http://bugs.libre-riscv.org) and see if there are any bugs that
-pique your interest.
-3. After that, go ahead and take a look at the [git repositories](https://git.libre-riscv.org).
-
+ [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
+ introduce yourself (people will happily say "hello" back"). Read through
+ [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
+ and the [[charter]], and let everyone know, on the list that you're
+ happy with it and agree to it.
+2. The next thing you should do is read through the
+ [bugs list](http://bugs.libre-riscv.org) and
+ see if there are any bugs that pique your interest.
+ A fascinating way to do that is to view the
+ [dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR)
+3. After that, go ahead and take a look at the
+ [git repositories](https://git.libre-riscv.org).
4. If you plan to do HDL work, you should familiarize yourself with our
- [[HDL_workflow]]. If you would like to help with the ASIC layout,
- see [[HDL_workflow/coriolis2]]
+ [[HDL_workflow]]. If you would like to help with the ASIC layout,
+ see [[HDL_workflow/coriolis2]]
5. We do have funding available (see [[nlnet]]) upon completion of issues -
-we are also working on procuring more funding which gets the project to
-nanometre scale tapeout.
+ we are also working on procuring more funding which gets the project to
+ nanometre scale tapeout.
6. After all this, if you feel that Libre-SOC is a something
- that you would like to contribute to, add yourself to the
- [current_members](about_us) page, fill in some information about yourself,
- and join the mailing list and say hello.
+ that you would like to contribute to, add yourself to the
+ [current_members](about_us) page, fill in some information about yourself,
+ and join the mailing list and say hello.
Also note that you can edit this wiki. You can experiment in the [[Sandbox]].
pip3 install virtualenv requests
mkdir ~/.virtualenvs && cd ~/.virtualenvs
python3 -m venv libresoc
- source ~/.virtualenvs/bin/activate
+ source ~/.virtualenvs/libresoc/bin/activate
cd ~; mkdir libresoc; cd libresoc
- git clone https://git.libre-riscv.org/git/nmutil.git
- git clone https://git.libre-riscv.org/git/ieee754fpu.git
- git clone https://git.libre-riscv.org/git/soc.git
+ git clone https://git.libre-soc.org/git/nmutil.git
+ git clone https://git.libre-soc.org/git/ieee754fpu.git
+ git clone https://git.libre-soc.org/git/soc.git
- cd nmutil; pip3 install -e .; cd ..
- cd ieee754fpu; pip3 install -e .; cd ..
- cd soc; pip3 install -e .; cd ..
+ cd nmutil; make install; cd ..
+ cd ieee754fpu; make install; cd ..
+ cd soc; make gitupdate; make install; cd ..
python3 soc/src/soc/decoder/power_decoder.py
yosys -p "read_ilang decoder.il; show dec31"
-
-
## How can I learn?
The whole purpose of this project is to be a learning environment as well
Also, individuals with experience in formal mathematical verification
are quite welcome.
-# [Documentation](Documentation/SOC/index.md)
+# Documentation
+
+ - [Source Code](/Documentation/index)
+ - [Architecture](3d_gpu/architecture)
projects / libreriscv.git / blobdiff