kernel/mem: Add functions to emulate read port enable/init/reset signals.
[yosys.git] / kernel / constids.inc
index 383d7c615d70f729b45910cac49e9f17f10687db..566b76217737c7bdea2a6e083fb8141a2658a298 100644 (file)
@@ -11,9 +11,12 @@ X(abc9_mergeability)
 X(abc9_scc_id)
 X(abcgroup)
 X(ABITS)
+X(AD)
 X(ADDR)
 X(allconst)
 X(allseq)
+X(ALOAD)
+X(ALOAD_POLARITY)
 X(always_comb)
 X(always_ff)
 X(always_latch)
@@ -32,6 +35,7 @@ X(bugpoint_keep)
 X(B_WIDTH)
 X(C)
 X(cells_not_processed)
+X(CE_OVER_SRST)
 X(CFG_ABITS)
 X(CFG_DBITS)
 X(CFG_INIT)
@@ -46,6 +50,7 @@ X(CLK_POLARITY)
 X(CLR)
 X(CLR_POLARITY)
 X(CO)
+X(COLLISION_X_MASK)
 X(CONFIG)
 X(CONFIG_WIDTH)
 X(CTRL_IN)
@@ -95,6 +100,7 @@ X(hdlname)
 X(hierconn)
 X(I)
 X(INIT)
+X(INIT_VALUE)
 X(init)
 X(initial_top)
 X(interface_modport)
@@ -133,19 +139,31 @@ X(onehot)
 X(P)
 X(parallel_case)
 X(parameter)
+X(PORTID)
 X(PRIORITY)
+X(PRIORITY_MASK)
 X(Q)
 X(qwp_position)
 X(R)
 X(RD_ADDR)
+X(RD_ARST)
+X(RD_ARST_VALUE)
+X(RD_CE_OVER_SRST)
 X(RD_CLK)
 X(RD_CLK_ENABLE)
 X(RD_CLK_POLARITY)
+X(RD_COLLISION_X_MASK)
 X(RD_DATA)
 X(RD_EN)
+X(RD_INIT_VALUE)
 X(RD_PORTS)
+X(RD_SRST)
+X(RD_SRST_VALUE)
+X(RD_TRANSPARENCY_MASK)
 X(RD_TRANSPARENT)
+X(RD_WIDE_CONTINUATION)
 X(reg)
+X(reprocess_after)
 X(S)
 X(SET)
 X(SET_POLARITY)
@@ -158,6 +176,10 @@ X(SRC_EN)
 X(SRC_PEN)
 X(SRC_POL)
 X(SRC_WIDTH)
+X(SRST)
+X(SRST_POLARITY)
+X(SRST_VALUE)
+X(sta_arrival)
 X(STATE_BITS)
 X(STATE_NUM)
 X(STATE_NUM_LOG2)
@@ -169,6 +191,7 @@ X(T)
 X(TABLE)
 X(techmap_autopurge)
 X(_TECHMAP_BITS_CONNMAP_)
+X(_TECHMAP_CELLNAME_)
 X(_TECHMAP_CELLTYPE_)
 X(techmap_celltype)
 X(_TECHMAP_FAIL_)
@@ -191,6 +214,7 @@ X(T_LIMIT_TYP)
 X(to_delete)
 X(top)
 X(TRANS_NUM)
+X(TRANSPARENCY_MASK)
 X(TRANSPARENT)
 X(TRANS_TABLE)
 X(T_RISE_MAX)
@@ -216,6 +240,8 @@ X(WR_CLK_POLARITY)
 X(WR_DATA)
 X(WR_EN)
 X(WR_PORTS)
+X(WR_PRIORITY_MASK)
+X(WR_WIDE_CONTINUATION)
 X(X)
 X(Y)
 X(Y_WIDTH)