Merge branch 'vector_fix' of https://github.com/Kmanfi/yosys

[yosys.git] / kernel / macc.h

diff --git a/kernel/macc.h b/kernel/macc.h
index e07e7e01a8e9938b0c60fb76ba923a5c2c71d9f2..371f6737d32995b112b063f7688d20b83312b25e 100644 (file)
--- a/kernel/macc.h
+++ b/kernel/macc.h
@@ -99,10 +99,10 @@ struct Macc
 
        void from_cell(RTLIL::Cell *cell)
        {
-               RTLIL::SigSpec port_a = cell->getPort(ID(A));
+               RTLIL::SigSpec port_a = cell->getPort(ID::A);
 
                ports.clear();
-               bit_ports = cell->getPort(ID(B));
+               bit_ports = cell->getPort(ID::B);
 
                std::vector<RTLIL::State> config_bits = cell->getParam(ID(CONFIG)).bits;
                int config_cursor = 0;
@@ -191,8 +191,8 @@ struct Macc
                        port_a.append(port.in_b);
                }
 
-               cell->setPort(ID(A), port_a);
-               cell->setPort(ID(B), bit_ports);
+               cell->setPort(ID::A, port_a);
+               cell->setPort(ID::B, bit_ports);
                cell->setParam(ID(CONFIG), config_bits);
                cell->setParam(ID(CONFIG_WIDTH), GetSize(config_bits));
                cell->setParam(ID(A_WIDTH), GetSize(port_a));