# include <unistd.h>
# include <dirent.h>
# include <sys/types.h>
-# include <sys/wait.h>
# include <sys/stat.h>
+# if !defined(YOSYS_DISABLE_SPAWN)
+# include <sys/wait.h>
+# endif
#endif
#if !defined(_WIN32) && defined(YOSYS_ENABLE_GLOB)
log(" | |\n");
log(" | yosys -- Yosys Open SYnthesis Suite |\n");
log(" | |\n");
- log(" | Copyright (C) 2012 - 2019 Clifford Wolf <clifford@clifford.at> |\n");
+ log(" | Copyright (C) 2012 - 2020 Claire Wolf <claire@symbioticeda.com> |\n");
log(" | |\n");
log(" | Permission to use, copy, modify, and/or distribute this software for any |\n");
log(" | purpose with or without fee is hereby granted, provided that the above |\n");
return false;
}
+#if !defined(YOSYS_DISABLE_SPAWN)
int run_command(const std::string &command, std::function<void(const std::string&)> process_line)
{
if (!process_line)
return WEXITSTATUS(ret);
#endif
}
+#endif
std::string make_temp_file(std::string template_str)
{
-#ifdef _WIN32
+#if defined(__wasm)
+ size_t pos = template_str.rfind("XXXXXX");
+ log_assert(pos != std::string::npos);
+ static size_t index = 0;
+ template_str.replace(pos, 6, stringf("%06zu", index++));
+#elif defined(_WIN32)
if (template_str.rfind("/tmp/", 0) == 0) {
# ifdef __MINGW32__
char longpath[MAX_PATH + 1];
std::string make_temp_dir(std::string template_str)
{
-#ifdef _WIN32
+#if defined(_WIN32)
template_str = make_temp_file(template_str);
mkdir(template_str.c_str());
return template_str;
+#elif defined(__wasm)
+ template_str = make_temp_file(template_str);
+ mkdir(template_str.c_str(), 0777);
+ return template_str;
#else
# ifndef NDEBUG
size_t pos = template_str.rfind("XXXXXX");
return;
already_setup = true;
- RTLIL::ID::A = "\\A";
- RTLIL::ID::B = "\\B";
- RTLIL::ID::Y = "\\Y";
- RTLIL::ID::keep = "\\keep";
- RTLIL::ID::whitebox = "\\whitebox";
- RTLIL::ID::blackbox = "\\blackbox";
+#define X(_id) RTLIL::ID::_id = "\\" # _id;
+#include "kernel/constids.inc"
+#undef X
#ifdef WITH_PYTHON
PyImport_AppendInittab((char*)"libyosys", INIT_MODULE);
already_shutdown = true;
log_pop();
+ Pass::done_register();
+
delete yosys_design;
yosys_design = NULL;
log_errfile = NULL;
log_files.clear();
- Pass::done_register();
yosys_celltypes.clear();
#ifdef YOSYS_ENABLE_TCL
path += char(shortpath[i]);
return path;
}
-#elif defined(EMSCRIPTEN)
+#elif defined(EMSCRIPTEN) || defined(__wasm)
std::string proc_self_dirname()
{
return "/";
#error "Don't know how to determine process executable base path!"
#endif
-#ifdef EMSCRIPTEN
+#if defined(EMSCRIPTEN) || defined(__wasm)
std::string proc_share_dirname()
{
return "/share/";
std::string proc_share_path = proc_self_path + "share/";
if (check_file_exists(proc_share_path, true))
return proc_share_path;
- proc_share_path = proc_self_path + "../share/yosys/";
+ proc_share_path = proc_self_path + "../share/" + proc_program_prefix()+ "yosys/";
if (check_file_exists(proc_share_path, true))
return proc_share_path;
# ifdef YOSYS_DATDIR
}
#endif
+std::string proc_program_prefix()
+{
+ std::string program_prefix;
+#ifdef YOSYS_PROGRAM_PREFIX
+ program_prefix = YOSYS_PROGRAM_PREFIX;
+#endif
+ return program_prefix;
+}
+
bool fgetline(FILE *f, std::string &buffer)
{
buffer = "";
command = "verilog";
else if (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".il") == 0)
command = "ilang";
+ else if (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".cc") == 0)
+ command = "cxxrtl";
else if (filename.size() > 4 && filename.compare(filename.size()-4, std::string::npos, ".aig") == 0)
command = "aiger";
else if (filename.size() > 5 && filename.compare(filename.size()-5, std::string::npos, ".blif") == 0)
if (design->selected_active_module.empty())
{
- for (auto &it : design->modules_)
- if (RTLIL::unescape_id(it.first).compare(0, len, text) == 0)
- obj_names.push_back(strdup(RTLIL::id2cstr(it.first)));
+ for (auto mod : design->modules())
+ if (RTLIL::unescape_id(mod->name).compare(0, len, text) == 0)
+ obj_names.push_back(strdup(log_id(mod->name)));
}
- else
- if (design->modules_.count(design->selected_active_module) > 0)
+ else if (design->module(design->selected_active_module) != nullptr)
{
- RTLIL::Module *module = design->modules_.at(design->selected_active_module);
+ RTLIL::Module *module = design->module(design->selected_active_module);
- for (auto &it : module->wires_)
- if (RTLIL::unescape_id(it.first).compare(0, len, text) == 0)
- obj_names.push_back(strdup(RTLIL::id2cstr(it.first)));
+ for (auto w : module->wires())
+ if (RTLIL::unescape_id(w->name).compare(0, len, text) == 0)
+ obj_names.push_back(strdup(log_id(w->name)));
for (auto &it : module->memories)
if (RTLIL::unescape_id(it.first).compare(0, len, text) == 0)
- obj_names.push_back(strdup(RTLIL::id2cstr(it.first)));
+ obj_names.push_back(strdup(log_id(it.first)));
- for (auto &it : module->cells_)
- if (RTLIL::unescape_id(it.first).compare(0, len, text) == 0)
- obj_names.push_back(strdup(RTLIL::id2cstr(it.first)));
+ for (auto cell : module->cells())
+ if (RTLIL::unescape_id(cell->name).compare(0, len, text) == 0)
+ obj_names.push_back(strdup(log_id(cell->name)));
for (auto &it : module->processes)
if (RTLIL::unescape_id(it.first).compare(0, len, text) == 0)
- obj_names.push_back(strdup(RTLIL::id2cstr(it.first)));
+ obj_names.push_back(strdup(log_id(it.first)));
}
std::sort(obj_names.begin(), obj_names.end());