RISC-V: Fix riscv gas/ld testsuites failures for big endian.

[binutils-gdb.git] / ld / testsuite / ld-riscv-elf / pcrel-lo-addend-2.d

diff --git a/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d
index 039de102c3ade82438a0067380b351157e7ebb99..895c6cc5814cbb7b51d3d09e9a6f6ce28642cd1d 100644 (file)
--- a/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d
+++ b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d
@@ -1,5 +1,5 @@
 #name: %pcrel_lo overflow with an addend
 #source: pcrel-lo-addend-2.s
 #as: -march=rv32ic
-#ld: -melf32lriscv --no-relax
+#ld: -m[riscv_choose_ilp32_emul] --no-relax
 #error: .*dangerous relocation: %pcrel_lo overflow with an addend