(no commit message)
[libreriscv.git] / lkcl.mdwn
index b1f8931fd8f37e5e6dd2b2061fa6d5c910dd8452..26458ef637e85fd0ee6e167d856ce1e0cf57e963 100644 (file)
--- a/lkcl.mdwn
+++ b/lkcl.mdwn
@@ -21,38 +21,55 @@ move things along from one stage to the next
  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> test core to regfiles
  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
+   - shared with cole
  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
- - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
- - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
- - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
- - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
- - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
+   - EUR 400 shared 25% [[mnolan]] EUR 100
 
 ## Completed but not yet submitted:
 
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
+   - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
+   - EUR 500 shared 20% samuel, EUR 100
  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
+   - EUR 400 shared 50% [[mnolan]] EUR 200
  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
+   - EUR 500 shared [[mnolan]] samuel, TBD split
  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
- - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
+   - EUR 250 shared 40% [[mnolan]] EUR 100
  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
+   - EUR 300 shared 1/3 [[mnolan]] EUR 100
  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
+   - EUR 300 shared 1/6 [[mnolan]] EUR 50
  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
+   - EUR 300 shared 50% [[mnolan]] EUR 150
  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
+   - EUR 400 shared 25% [[mnolan]] EUR 100
  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
+    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 
 ## Submitted for NLNet RFP