- <https://bugs.libre-soc.org/show_bug.cgi?id=482> LD/ST cache-inhibit
- EUR 200
- <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
- - EUR 250 (share [[colepoirier]]
+ - EUR 250 (share with cole)
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
+- <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
## Completed but not yet submitted:
- EUR 450
- <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
- EUR 100
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
+
+donated:
+
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
+ - with [[lkcl]]
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
+ - functions needed for simulator
+ - Shared 90% with [[lkcl]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
+ - Formal proof of decoder
+ - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
+ - POWER9 ALU proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
+ - POWER9 CR proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
+ - POWER9 BRANCH proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
+ - POWER9 LOGICAL proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
+ - POWER9 ROTATE proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
+ - MultiCompUnit (and Function Units) proof
## Submitted for NLNet RFP