add ls180 cxxsim test

[soc-cxxrtl-sim.git] / ls180_test / README.txt

diff --git a/ls180_test/README.txt b/ls180_test/README.txt
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+This experiment uses the litex verilog code for LibreSOC and allows
+doing a JTAG cxxrtl openocd "jtagremote" interface
+