(no commit message)

[libreriscv.git] / mnolan.mdwn

diff --git a/mnolan.mdwn b/mnolan.mdwn
index 0c9533eb74e0ef61512cdc6fad3776e14333c825..ca54802b35c21f2b3e353aff068925f8df63c342 100644 (file)
--- a/mnolan.mdwn
+++ b/mnolan.mdwn
@@ -6,15 +6,34 @@ Bored college student and contributor to Libre-SOC
 
 ## Currently working on
 
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> with [[lkcl]]
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
+    - with [[lkcl]]
  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
     - functions needed for simulator
     - Shared 90% with [[lkcl]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
+    - Formal proof of decoder
+    - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
+    - POWER9 ALU proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
+    - POWER9 CR proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
+    - POWER9 BRANCH proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
+    - POWER9 LOGICAL proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
+    - POWER9 ROTATE proof
 
 ## Completed not yet submitted
 
-### 2019-02-012
+## Submitted for RFP, waiting for payment
+
+
+## Paid
+
+### 2019-02-012 28-apr-2020 - Paid 08may2020
 
  - <http://bugs.libre-riscv.org/show_bug.cgi?id=189> parent #48
    - Add partitioned right shift to partitioned shifter
@@ -31,30 +50,26 @@ Bored college student and contributor to Libre-SOC
    - Shared 50% with [[lkcl]]
    - EUR 350 (each)
 
-### 2019-10P-046  NLNet 2019 Formal Standards OpenPOWER
+### 2019-10P-046 28-apr-2020 - Paid 08may2020 
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
     - auto-parser of POWER9
     - Shared 50% with [[lkcl]]
     - EUR 500 (each)
 
-### 2019-10P-032  NLNet 2019 Formal Correctness Proofs
+### 2019-10P-032 28-apr-2020 - Paid 08may2020 
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=162> parent #196
     - Verify FSGNJ
+    - EUR 150
  - <https://bugs.libre-soc.org/show_bug.cgi?id=163> parent #196
     - Verify FPMAX/MIN
+    - EUR 150
  - <https://bugs.libre-soc.org/show_bug.cgi?id=165> parent #196
     - Verify FP comparison operators
- - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
-    - Formal proof of decoder
-
-## Submitted for RFP, waiting for payment
+    - EUR 150
 
 
-
-## Paid
-
 ### Project 2019-02-012 Date 27jan2020
 
  - <http://bugs.libre-riscv.org/show_bug.cgi?id=120>