## Currently working on
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> with [[lkcl]]
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
+ - with [[lkcl]]
- <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
+ - functions needed for simulator
+ - Shared 90% with [[lkcl]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
+ - Formal proof of decoder
+ - EUR 200
## Completed not yet submitted
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=189>
+
+## Submitted for RFP, waiting for payment
+
+### 2019-02-012 28-apr-2020
+
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=189> parent #48
- Add partitioned right shift to partitioned shifter
- EUR 150
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=171>
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
- Partitioned equals and greater than comparison
- Shared 50% with [[lkcl]]
- EUR 200 (each)
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=172>
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=172> parent #48
- Partitioned adc/sub/neg
- EUR 150
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=173>
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
- partitioned scalar/vector shift
- Shared 50% with [[lkcl]]
- EUR 350 (each)
-## Submitted for RFP
+### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
+ - auto-parser of POWER9
+ - Shared 50% with [[lkcl]]
+ - EUR 500 (each)
+
+### 2019-10P-032 28-apr-2020 NLNet 2019 Formal Correctness Proofs
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=162> parent #196
+ - Verify FSGNJ
+ - EUR 150
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=163> parent #196
+ - Verify FPMAX/MIN
+ - EUR 150
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=165> parent #196
+ - Verify FP comparison operators
+ - EUR 150