sim._pyrtl: sign extend RHS of assignment.

[nmigen.git] / nmigen / sim / _pyrtl.py

diff --git a/nmigen/sim/_pyrtl.py b/nmigen/sim/_pyrtl.py
index d7b432606134b8ea21aca1b1c53636027a75d44d..f7abc3bb9df82a08280a53a7407c0b281c495e40 100644 (file)
--- a/nmigen/sim/_pyrtl.py
+++ b/nmigen/sim/_pyrtl.py
@@ -337,7 +337,10 @@ class _StatementCompiler(StatementVisitor, _Compiler):
             self.emitter.append("pass")
 
     def on_Assign(self, stmt):
-        return self.lhs(stmt.lhs)(self.rhs(stmt.rhs))
+        gen_rhs = f"({(1 << len(stmt.rhs)) - 1} & {self.rhs(stmt.rhs)})"
+        if stmt.rhs.shape().signed:
+            gen_rhs = f"sign({gen_rhs}, {-1 << (len(stmt.rhs) - 1)})"
+        return self.lhs(stmt.lhs)(gen_rhs)
 
     def on_Switch(self, stmt):
         gen_test = self.emitter.def_var("test",