sim.pysim: write the next, not curr signal value to the VCD file

[nmigen.git] / nmigen / sim / pysim.py

diff --git a/nmigen/sim/pysim.py b/nmigen/sim/pysim.py
index 166e2a1d6aa320ed8a3c794b4e3c82a357033183..c50b7423fdbd1592d10324f076c5bac324092831 100644 (file)
--- a/nmigen/sim/pysim.py
+++ b/nmigen/sim/pysim.py
@@ -349,7 +349,7 @@ class Simulator:
             for waveform_writer in self._waveform_writers:
                 for signal_state in self._state.pending:
                     waveform_writer.update(self._state.timeline.now,
-                        signal_state.signal, signal_state.curr)
+                        signal_state.signal, signal_state.next)
 
             # 2. commit: apply every queued signal change, waking up any waiting processes
             converged = self._state.commit()