opcodes: blackfin: fix decoding of all register move insns

[binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5e522c6f3960a1ce555b015cb9da7ba91bd32931..07c4d8972176961b86fb59dc8630376644663064 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,88 @@
+2010-09-22  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
+       Reject P6/P7 to TESTSET.
+       (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
+       SP onto the stack.
+       (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
+       P/D fields match all the time.
+       (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
+       are 0 for accumulator compares.
+       (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
+       (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
+       decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
+       decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
+       decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
+       decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
+       insns.
+       (decode_dagMODim_0): Verify br field for IREG ops.
+       (decode_LDST_0): Reject preg load into same preg.
+       (_print_insn_bfin): Handle returns for ILLEGAL decodes.
+       (print_insn_bfin): Likewise.
+
+2010-09-22  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
+
+2010-09-22  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
+       register values greater than 8.
+       (IS_RESERVEDREG, allreg, mostreg): New helpers.
+       (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
+       (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
+       (decode_CC2dreg_0): Check valid CC register number.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
+       (reg_names): Likewise.
+       (decode_statbits): Likewise; while reformatting to make manageable.
+
+2010-09-22  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
+       (decode_pseudoOChar_0): New function.
+       (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
+       LSHIFT instead of SHIFT.
+
+2010-09-22  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (constant_formats): Constify the whole structure.
+       (fmtconst): Add const to return value.
+       (reg_names): Mark const.
+       (decode_multfunc): Mark s0/s1 as const.
+       (decode_macfunc): Mark a/sop as const.
+
+2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
+
+       * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
+
+2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
+       "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
+
 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 
        * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for