Remove trailing "(bad)" entries and replace { "(bad)", { XX } }
[binutils-gdb.git] / opcodes / ChangeLog
index 8088f6a4990844aa5b8822c33bd01df1df786c8c..971e6cdf736e660ae50e45675b8bcc0be1b9adfd 100644 (file)
@@ -1,3 +1,52 @@
+2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (Bad_Opcode): New.
+       (bad_opcode): Likewise.
+       (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
+       (dis386_twobyte): Likewise.
+       (reg_table): Likewise.
+       (prefix_table): Likewise.
+       (x86_64_table): Likewise.
+       (vex_len_table): Likewise.
+       (vex_w_table): Likewise.
+       (mod_table): Likewise.
+       (rm_table): Likewise.
+       (float_reg): Likewise.
+       (reg_table): Remove trailing "(bad)" entries.
+       (prefix_table): Likewise.
+       (x86_64_table): Likewise.
+       (vex_len_table): Likewise.
+       (vex_w_table): Likewise.
+       (mod_table): Likewise.
+       (rm_table): Likewise.
+       (get_valid_dis386): Handle bytemode 0.
+
+2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-opc.h (VEXScalar): New.
+
+       * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
+       instructions.
+       * i386-tbl.h: Regenerated.
+
+2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
+
+       * i386-opc.tbl: Add xsave64 and xrstor64.
+       * i386-tbl.h: Regenerated.
+
+2010-01-20  Nick Clifton  <nickc@redhat.com>
+
+       PR 11170
+       * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
+       based post-indexed addressing.
+
+2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
+       * i386-tbl.h: Regenerated.
+
 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in