+2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (Bad_Opcode): New.
+ (bad_opcode): Likewise.
+ (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
+ (dis386_twobyte): Likewise.
+ (reg_table): Likewise.
+ (prefix_table): Likewise.
+ (x86_64_table): Likewise.
+ (vex_len_table): Likewise.
+ (vex_w_table): Likewise.
+ (mod_table): Likewise.
+ (rm_table): Likewise.
+ (float_reg): Likewise.
+ (reg_table): Remove trailing "(bad)" entries.
+ (prefix_table): Likewise.
+ (x86_64_table): Likewise.
+ (vex_len_table): Likewise.
+ (vex_w_table): Likewise.
+ (mod_table): Likewise.
+ (rm_table): Likewise.
+ (get_valid_dis386): Handle bytemode 0.
+
+2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (VEXScalar): New.
+
+ * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
+ instructions.
+ * i386-tbl.h: Regenerated.
+
+2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
+
+ * i386-opc.tbl: Add xsave64 and xrstor64.
+ * i386-tbl.h: Regenerated.
+
+2010-01-20 Nick Clifton <nickc@redhat.com>
+
+ PR 11170
+ * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
+ based post-indexed addressing.
+
+2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
+
+ * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
+ * i386-tbl.h: Regenerated.
+
+2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
+ comments.
+
+2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (names_mm): New.
+ (intel_names_mm): Likewise.
+ (att_names_mm): Likewise.
+ (names_xmm): Likewise.
+ (intel_names_xmm): Likewise.
+ (att_names_xmm): Likewise.
+ (names_ymm): Likewise.
+ (intel_names_ymm): Likewise.
+ (att_names_ymm): Likewise.
+ (print_insn): Set names_mm, names_xmm and names_ymm.
+ (OP_MMX): Use names_mm, names_xmm and names_ymm.
+ (OP_XMM): Likewise.
+ (OP_EM): Likewise.
+ (OP_EMC): Likewise.
+ (OP_MXC): Likewise.
+ (OP_EX): Likewise.
+ (XMM_Fixup): Likewise.
+ (OP_VEX): Likewise.
+ (OP_EX_VexReg): Likewise.
+ (OP_Vex_2src): Likewise.
+ (OP_Vex_2src_1): Likewise.
+ (OP_Vex_2src_2): Likewise.
+ (OP_REG_VexI4): Likewise.
+
2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Update comments.