+2013-04-03 Nick Clifton <nickc@redhat.com>
+
+ * v850-dis.c (print_value): With V850_INVERSE_PCREL compute the
+ destination address by subtracting the operand from the current
+ address.
+ * v850-opc.c (insert_u16_loop): Disallow negative offsets. Store
+ a positive value in the insn.
+ (extract_u16_loop): Do not negate the returned value.
+ (D16_LOOP): Add V850_INVERSE_PCREL flag.
+
+ (ceilf.sw): Remove duplicate entry.
+ (cvtf.hs): New entry.
+ (cvtf.sh): Likewise.
+ (fmaf.s): Likewise.
+ (fmsf.s): Likewise.
+ (fnmaf.s): Likewise.
+ (fnmsf.s): Likewise.
+ (maddf.s): Restrict to E3V5 architectures.
+ (msubf.s): Likewise.
+ (nmaddf.s): Likewise.
+ (nmsubf.s): Likewise.
+
+2013-03-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (get_sib): Add the sizeflag argument. Properly
+ check address mode.
+ (print_insn): Pass sizeflag to get_sib.
+
+2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
+
+ PR binutils/15068
+ * tic6x-dis.c: Add support for displaying 16-bit insns.
+
+2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
+
+ PR gas/15095
+ * tic6x-dis.c (print_insn_tic6x): Decode opcodes that have
+ individual msb and lsb halves in src1 & src2 fields. Discard the
+ src1 (lsb) value and only use src2 (msb), discarding bit 0, to
+ follow what Ti SDK does in that case as any value in the src1
+ field yields the same output with SDK disassembler.
+
+2013-03-12 Michael Eager <eager@eagercon.com>
+
+ * opcodes/mips-dis.c (print_insn_args): Modify def of reg.
+
+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * nios2-opc.c (nios2_builtin_opcodes): Add entry for wrprs.
+
+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * nios2-opc.c (nios2_builtin_opcodes): Add entry for rdprs.
+
+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * nios2-opc.c (nios2_builtin_regs): Add sstatus alias for ba register.
+
+2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * arm-dis.c (arm_opcodes): Add entries for CRC instructions.
+ (thumb32_opcodes): Likewise.
+ (print_insn_thumb32): Handle 'S' control char.
+
+2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
+
+ * lm32-desc.c: Regenerate.
+
2013-03-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-reg.tbl (riz): Add RegRex64.