aarch64: Remove ZIDR_EL1

[binutils-gdb.git] / opcodes / aarch64-opc.c

diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index a37b3ffdd6ddb9bfeb731e234421964524924657..ace7032b7fb0b1980da01d517378bdd79de24b6f 100644 (file)
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3595,7 +3595,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
          snprintf (buf, size, "#0x%-20" PRIx64 "\t// #%" PRIi64,
                    opnd->imm.value, opnd->imm.value);
          break;
-       default: assert (0);
+       default:
+         snprintf (buf, size, "<invalid>");
+         break;
        }
       break;
 
@@ -3662,7 +3664,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
              snprintf (buf, size,  "#%.18e", c.d);
            }
          break;
-       default: assert (0);
+       default:
+         snprintf (buf, size, "<invalid>");
+         break;
        }
       break;
 
@@ -3934,7 +3938,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
       break;
 
     default:
-      assert (0);
+      snprintf (buf, size, "<invalid>");
+      break;
     }
 }
 \f
@@ -4114,7 +4119,6 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_SVE  ("zcr_el12",         CPENC (3,5,C1,C2,0),    0),
   SR_SVE  ("zcr_el2",          CPENC (3,4,C1,C2,0),    0),
   SR_SVE  ("zcr_el3",          CPENC (3,6,C1,C2,0),    0),
-  SR_SVE  ("zidr_el1",         CPENC (3,0,C0,C0,7),    0),
   SR_CORE ("ttbr0_el1",                CPENC (3,0,C2,C0,0),    0),
   SR_CORE ("ttbr1_el1",                CPENC (3,0,C2,C0,1),    0),
   SR_V8_A ("ttbr0_el2",                CPENC (3,4,C2,C0,0),    0),
@@ -4341,7 +4345,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_PROFILE ("pmsfcr_el1",    CPENC (3,0,C9,C9,4),    0),
   SR_PROFILE ("pmsevfr_el1",   CPENC (3,0,C9,C9,5),    0),
   SR_PROFILE ("pmslatfr_el1",  CPENC (3,0,C9,C9,6),    0),
-  SR_PROFILE ("pmsidr_el1",    CPENC (3,0,C9,C9,7),    0),
+  SR_PROFILE ("pmsidr_el1",    CPENC (3,0,C9,C9,7),    F_REG_READ),
   SR_PROFILE ("pmscr_el2",     CPENC (3,4,C9,C9,0),    0),
   SR_PROFILE ("pmscr_el12",    CPENC (3,5,C9,C9,0),    0),
   SR_CORE ("pmcr_el0",         CPENC (3,3,C9,C12,0),   0),
@@ -4481,12 +4485,6 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_CORE("trbsr_el1",         CPENC (3,0,C9,C11,3),   0),
   SR_CORE("trbtrg_el1",        CPENC (3,0,C9,C11,6),   0),
 
-  SR_CORE ("trcextinselr0",    CPENC (2,1,C0,C8,4),    0),
-  SR_CORE ("trcextinselr1",    CPENC (2,1,C0,C9,4),    0),
-  SR_CORE ("trcextinselr2",    CPENC (2,1,C0,C10,4),   0),
-  SR_CORE ("trcextinselr3",    CPENC (2,1,C0,C11,4),   0),
-  SR_CORE ("trcrsr",           CPENC (2,1,C0,C10,0),   0),
-
   SR_CORE ("trcauthstatus", CPENC (2,1,C7,C14,6), F_REG_READ),
   SR_CORE ("trccidr0",      CPENC (2,1,C7,C12,7), F_REG_READ),
   SR_CORE ("trccidr1",      CPENC (2,1,C7,C13,7), F_REG_READ),
@@ -4607,7 +4605,6 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_CORE ("trcextinselr2", CPENC (2,1,C0,C10,4), 0),
   SR_CORE ("trcextinselr3", CPENC (2,1,C0,C11,4), 0),
   SR_CORE ("trcimspec0",    CPENC (2,1,C0,C0,7),  0),
-  SR_CORE ("trcimspec0",    CPENC (2,1,C0,C0,7),  0),
   SR_CORE ("trcimspec1",    CPENC (2,1,C0,C1,7),  0),
   SR_CORE ("trcimspec2",    CPENC (2,1,C0,C2,7),  0),
   SR_CORE ("trcimspec3",    CPENC (2,1,C0,C3,7),  0),
@@ -4620,6 +4617,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_CORE ("trcprgctlr",    CPENC (2,1,C0,C1,0),  0),
   SR_CORE ("trcprocselr",   CPENC (2,1,C0,C2,0),  0),
   SR_CORE ("trcqctlr",      CPENC (2,1,C0,C1,1),  0),
+  SR_CORE ("trcrsr",        CPENC (2,1,C0,C10,0), 0),
   SR_CORE ("trcrsctlr2",    CPENC (2,1,C1,C2,0),  0),
   SR_CORE ("trcrsctlr3",    CPENC (2,1,C1,C3,0),  0),
   SR_CORE ("trcrsctlr4",    CPENC (2,1,C1,C4,0),  0),
@@ -4834,7 +4832,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
 
   SR_CORE ("accdata_el1",   CPENC (3,0,C13,C0,5), 0),
 
-  SR_CORE ("mfar_el3",      CPENC (3,6,C6,C0,5), F_REG_READ),
+  SR_CORE ("mfar_el3",      CPENC (3,6,C6,C0,5), 0),
   SR_CORE ("gpccr_el3",     CPENC (3,6,C2,C1,6), 0),
   SR_CORE ("gptbr_el3",     CPENC (3,6,C2,C1,4), 0),