[ARC] Update ARC opcode table

[binutils-gdb.git] / opcodes / cr16-dis.c

diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index 749f80ec0314aa22897d96a648b408870a69fdb9..65cf91cfed264fcf0791c956ee4bced1fa3a5c4c 100644 (file)
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -1,5 +1,5 @@
 /* Disassembler code for CR16.
-   Copyright (C) 2007-2015 Free Software Foundation, Inc.
+   Copyright (C) 2007-2019 Free Software Foundation, Inc.
    Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com).
 
    This file is part of GAS, GDB and the GNU binutils.
@@ -19,7 +19,7 @@
    Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
 
 #include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
 #include "opcode/cr16.h"
 #include "libiberty.h"
 
@@ -54,7 +54,7 @@ typedef struct
 cinv_entry;
 
 /* CR16 'cinv' options mapping.  */
-const cinv_entry cr16_cinvs[] =
+static const cinv_entry cr16_cinvs[] =
 {
   {"cinv[i]",     "cinv    [i]"},
   {"cinv[i,u]",   "cinv    [i,u]"},
@@ -78,20 +78,20 @@ typedef enum REG_ARG_TYPE
 REG_ARG_TYPE;
 
 /* Current opcode table entry we're disassembling.  */
-const inst *instruction;
+static const inst *instruction;
 /* Current instruction we're disassembling.  */
-ins cr16_currInsn;
+static ins cr16_currInsn;
 /* The current instruction is read into 3 consecutive words.  */
-wordU cr16_words[3];
+static wordU cr16_words[3];
 /* Contains all words in appropriate order.  */
-ULONGLONG cr16_allWords;
+static ULONGLONG cr16_allWords;
 /* Holds the current processed argument number.  */
-int processing_argument_number;
+static int processing_argument_number;
 /* Nonzero means a IMM4 instruction.  */
-int imm4flag;
+static int imm4flag;
 /* Nonzero means the instruction's original size is
    incremented (escape sequence is used).  */
-int size_changed;
+static int size_changed;
 
 
 /* Print the constant expression length.  */
@@ -358,7 +358,7 @@ make_argument (argument * a, int start_bits)
   switch (a->type)
     {
     case arg_r:
-      p = makelongparameter (cr16_allWords, 
+      p = makelongparameter (cr16_allWords,
                             inst_bit_size - (start_bits + a->size),
                             inst_bit_size - start_bits);
       a->r = p.val;
@@ -386,7 +386,7 @@ make_argument (argument * a, int start_bits)
       break;
 
     case arg_ic:
-      p = makelongparameter (cr16_allWords, 
+      p = makelongparameter (cr16_allWords,
                             inst_bit_size - (start_bits + a->size),
                             inst_bit_size - start_bits);
       a->constant = p.val;
@@ -466,7 +466,7 @@ make_argument (argument * a, int start_bits)
        }
       else if (instruction->size == 2)
        {
-         p = makelongparameter (cr16_allWords, inst_bit_size - 16, 
+         p = makelongparameter (cr16_allWords, inst_bit_size - 16,
                                 inst_bit_size);
          a->constant = p.val;
        }
@@ -795,7 +795,7 @@ get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
   for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
     cr16_words[i] = get_word_at_PC (mem, info);
 
-  cr16_allWords =  ((ULONGLONG) cr16_words[0] << 32) 
+  cr16_allWords =  ((ULONGLONG) cr16_words[0] << 32)
                   + ((unsigned long) cr16_words[1] << 16) + cr16_words[2];
 }
 
@@ -815,7 +815,7 @@ print_insn_cr16 (bfd_vma memaddr, struct disassemble_info *info)
   /* Find a matching opcode in table.  */
   is_decoded = cr16_match_opcode ();
   /* If found, print the instruction's mnemonic and arguments.  */
-  if (is_decoded > 0 && (cr16_words[0] << 16 || cr16_words[1]) != 0)
+  if (is_decoded > 0 && (cr16_words[0] != 0 || cr16_words[1] != 0))
     {
       if (strneq (instruction->mnemonic, "cinv", 4))
         info->fprintf_func (info->stream,"%s", getcinvstring (instruction->mnemonic));