- /* PREFIX_EVEX_0F10 */
- {
- { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F10_P_1) },
- { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F10_P_3) },
- },
- /* PREFIX_EVEX_0F11 */
- {
- { "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F11_P_1) },
- { "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F11_P_3) },
- },
- /* PREFIX_EVEX_0F12 */
- {
- { MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
- { VEX_W_TABLE (EVEX_W_0F12_P_1) },
- { MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) },
- { VEX_W_TABLE (EVEX_W_0F12_P_3) },
- },
- /* PREFIX_EVEX_0F16 */
- {
- { MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
- { VEX_W_TABLE (EVEX_W_0F16_P_1) },
- { MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) },
- },
- /* PREFIX_EVEX_0F2A */
- {
- { Bad_Opcode },
- { "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
- { Bad_Opcode },
- { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
- },
- /* PREFIX_EVEX_0F51 */
- {
- { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F51_P_1) },
- { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F51_P_3) },
- },
- /* PREFIX_EVEX_0F58 */
- {
- { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F58_P_1) },
- { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F58_P_3) },
- },
- /* PREFIX_EVEX_0F59 */
- {
- { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F59_P_1) },
- { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F59_P_3) },
- },
- /* PREFIX_EVEX_0F5A */
- {
- { VEX_W_TABLE (EVEX_W_0F5A_P_0) },
- { VEX_W_TABLE (EVEX_W_0F5A_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5A_P_2) },
- { VEX_W_TABLE (EVEX_W_0F5A_P_3) },
- },
/* PREFIX_EVEX_0F5B */
{
{ VEX_W_TABLE (EVEX_W_0F5B_P_0) },
- { VEX_W_TABLE (EVEX_W_0F5B_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5B_P_2) },
- },
- /* PREFIX_EVEX_0F5C */
- {
- { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5C_P_1) },
- { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5C_P_3) },
- },
- /* PREFIX_EVEX_0F5D */
- {
- { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5D_P_1) },
- { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5D_P_3) },
- },
- /* PREFIX_EVEX_0F5E */
- {
- { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5E_P_1) },
- { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5E_P_3) },
- },
- /* PREFIX_EVEX_0F5F */
- {
- { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5F_P_1) },
- { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5F_P_3) },
+ { "vcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 },
+ { "vcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F6F */
{
/* PREFIX_EVEX_0FC2 */
{
{ "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0FC2_P_1) },
+ { "vcmps%XS", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
{ "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
+ { "vcmps%XD", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
},
/* PREFIX_EVEX_0FE6 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0FE6_P_1) },
- { VEX_W_TABLE (EVEX_W_0FE6_P_2) },
- { VEX_W_TABLE (EVEX_W_0FE6_P_3) },
+ { "vcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
+ { "vcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F3810 */
{
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3813_P_1) },
- { VEX_W_TABLE (EVEX_W_0F3813_P_2) },
+ { "vcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F3814 */
{
/* PREFIX_EVEX_0F3852 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F3852_P_1) },
+ { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
{ "vpdpwssd", { XM, Vex, EXx }, 0 },
{ "vp4dpwssd", { XM, Vex, EXxmm }, 0 },
},
/* PREFIX_EVEX_0F3872 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F3872_P_1) },
+ { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 },
{ VEX_W_TABLE (EVEX_W_0F3872_P_2) },
- { VEX_W_TABLE (EVEX_W_0F3872_P_3) },
+ { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 },
},
/* PREFIX_EVEX_0F389A */
{
},
/* PREFIX_EVEX_MAP5_1D */
{
- { "vcvtss2s%XH", { XMM, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
{ "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_51 */
{
{ "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 },
- { "vsqrts%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_58 */
{
{ "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vadds%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_59 */
{
{ "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vmuls%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5A */
{
{ "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
- { "vcvts%XH2sd", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
{ "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
- { "vcvts%XD2sh", { XMM, VexScalar, EXq, EXxEVexR }, 0 },
+ { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5B */
{
/* PREFIX_EVEX_MAP5_5C */
{
{ "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vsubs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5D */
{
{ "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
- { "vmins%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_5E */
{
{ "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vdivs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5F */
{
{ "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
- { "vmaxs%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_78 */
{
},
/* PREFIX_EVEX_MAP6_13 */
{
- { "vcvts%XH2ss", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
{ Bad_Opcode },
{ "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP6_57 */
{
{ Bad_Opcode },
- { "vfmaddcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vfcmaddcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP6_D6 */
{
/* PREFIX_EVEX_MAP6_D7 */
{
{ Bad_Opcode },
- { "vfmulcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vfcmulcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
},