/* Print i386 instructions for GDB, the GNU debugger.
- Copyright (C) 1988-2020 Free Software Foundation, Inc.
+ Copyright (C) 1988-2022 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
#include "safe-ctype.h"
#include <setjmp.h>
-
-static int print_insn (bfd_vma, disassemble_info *);
-static void dofloat (int);
-static void OP_ST (int, int);
-static void OP_STi (int, int);
-static int putop (const char *, int);
-static void oappend (const char *);
-static void append_seg (void);
-static void OP_indirE (int, int);
-static void print_operand_value (char *, int, bfd_vma);
-static void OP_E_register (int, int);
-static void OP_E_memory (int, int);
-static void print_displacement (char *, bfd_vma);
-static void OP_E (int, int);
-static void OP_G (int, int);
-static bfd_vma get64 (void);
-static bfd_signed_vma get32 (void);
-static bfd_signed_vma get32s (void);
-static int get16 (void);
-static void set_op (bfd_vma, int);
-static void OP_Skip_MODRM (int, int);
-static void OP_REG (int, int);
-static void OP_IMREG (int, int);
-static void OP_I (int, int);
-static void OP_I64 (int, int);
-static void OP_sI (int, int);
-static void OP_J (int, int);
-static void OP_SEG (int, int);
-static void OP_DIR (int, int);
-static void OP_OFF (int, int);
-static void OP_OFF64 (int, int);
-static void ptr_reg (int, int);
-static void OP_ESreg (int, int);
-static void OP_DSreg (int, int);
-static void OP_C (int, int);
-static void OP_D (int, int);
-static void OP_T (int, int);
-static void OP_R (int, int);
-static void OP_MMX (int, int);
-static void OP_XMM (int, int);
-static void OP_EM (int, int);
-static void OP_EX (int, int);
-static void OP_EMC (int,int);
-static void OP_MXC (int,int);
-static void OP_MS (int, int);
-static void OP_XS (int, int);
-static void OP_M (int, int);
-static void OP_VEX (int, int);
-static void OP_EX_Vex (int, int);
-static void OP_EX_VexW (int, int);
-static void OP_EX_VexImmW (int, int);
-static void OP_XMM_Vex (int, int);
-static void OP_XMM_VexW (int, int);
-static void OP_Rounding (int, int);
-static void OP_REG_VexI4 (int, int);
-static void PCLMUL_Fixup (int, int);
-static void VCMP_Fixup (int, int);
-static void VPCMP_Fixup (int, int);
-static void VPCOM_Fixup (int, int);
-static void OP_0f07 (int, int);
-static void OP_Monitor (int, int);
-static void OP_Mwait (int, int);
-static void NOP_Fixup1 (int, int);
-static void NOP_Fixup2 (int, int);
-static void OP_3DNowSuffix (int, int);
-static void CMP_Fixup (int, int);
-static void BadOp (void);
-static void REP_Fixup (int, int);
-static void SEP_Fixup (int, int);
-static void BND_Fixup (int, int);
-static void NOTRACK_Fixup (int, int);
-static void HLE_Fixup1 (int, int);
-static void HLE_Fixup2 (int, int);
-static void HLE_Fixup3 (int, int);
-static void CMPXCHG8B_Fixup (int, int);
-static void XMM_Fixup (int, int);
-static void CRC32_Fixup (int, int);
-static void FXSAVE_Fixup (int, int);
-static void PCMPESTR_Fixup (int, int);
-static void OP_LWPCB_E (int, int);
-static void OP_LWP_E (int, int);
-static void OP_Vex_2src_1 (int, int);
-static void OP_Vex_2src_2 (int, int);
-
-static void MOVBE_Fixup (int, int);
-static void MOVSXD_Fixup (int, int);
-
-static void OP_Mask (int, int);
+typedef struct instr_info instr_info;
+
+static int print_insn (bfd_vma, instr_info *);
+static void dofloat (instr_info *, int);
+static void OP_ST (instr_info *, int, int);
+static void OP_STi (instr_info *, int, int);
+static int putop (instr_info *, const char *, int);
+static void oappend (instr_info *, const char *);
+static void append_seg (instr_info *);
+static void OP_indirE (instr_info *, int, int);
+static void print_operand_value (instr_info *, char *, int, bfd_vma);
+static void OP_E_memory (instr_info *, int, int);
+static void print_displacement (instr_info *, char *, bfd_vma);
+static void OP_E (instr_info *, int, int);
+static void OP_G (instr_info *, int, int);
+static bfd_vma get64 (instr_info *);
+static bfd_signed_vma get32 (instr_info *);
+static bfd_signed_vma get32s (instr_info *);
+static int get16 (instr_info *);
+static void set_op (instr_info *, bfd_vma, int);
+static void OP_Skip_MODRM (instr_info *, int, int);
+static void OP_REG (instr_info *, int, int);
+static void OP_IMREG (instr_info *, int, int);
+static void OP_I (instr_info *, int, int);
+static void OP_I64 (instr_info *, int, int);
+static void OP_sI (instr_info *, int, int);
+static void OP_J (instr_info *, int, int);
+static void OP_SEG (instr_info *, int, int);
+static void OP_DIR (instr_info *, int, int);
+static void OP_OFF (instr_info *, int, int);
+static void OP_OFF64 (instr_info *, int, int);
+static void ptr_reg (instr_info *, int, int);
+static void OP_ESreg (instr_info *, int, int);
+static void OP_DSreg (instr_info *, int, int);
+static void OP_C (instr_info *, int, int);
+static void OP_D (instr_info *, int, int);
+static void OP_T (instr_info *, int, int);
+static void OP_MMX (instr_info *, int, int);
+static void OP_XMM (instr_info *, int, int);
+static void OP_EM (instr_info *, int, int);
+static void OP_EX (instr_info *, int, int);
+static void OP_EMC (instr_info *, int,int);
+static void OP_MXC (instr_info *, int,int);
+static void OP_MS (instr_info *, int, int);
+static void OP_XS (instr_info *, int, int);
+static void OP_M (instr_info *, int, int);
+static void OP_VEX (instr_info *, int, int);
+static void OP_VexR (instr_info *, int, int);
+static void OP_VexW (instr_info *, int, int);
+static void OP_Rounding (instr_info *, int, int);
+static void OP_REG_VexI4 (instr_info *, int, int);
+static void OP_VexI4 (instr_info *, int, int);
+static void PCLMUL_Fixup (instr_info *, int, int);
+static void VPCMP_Fixup (instr_info *, int, int);
+static void VPCOM_Fixup (instr_info *, int, int);
+static void OP_0f07 (instr_info *, int, int);
+static void OP_Monitor (instr_info *, int, int);
+static void OP_Mwait (instr_info *, int, int);
+static void NOP_Fixup1 (instr_info *, int, int);
+static void NOP_Fixup2 (instr_info *, int, int);
+static void OP_3DNowSuffix (instr_info *, int, int);
+static void CMP_Fixup (instr_info *, int, int);
+static void BadOp (instr_info *);
+static void REP_Fixup (instr_info *, int, int);
+static void SEP_Fixup (instr_info *, int, int);
+static void BND_Fixup (instr_info *, int, int);
+static void NOTRACK_Fixup (instr_info *, int, int);
+static void HLE_Fixup1 (instr_info *, int, int);
+static void HLE_Fixup2 (instr_info *, int, int);
+static void HLE_Fixup3 (instr_info *, int, int);
+static void CMPXCHG8B_Fixup (instr_info *, int, int);
+static void XMM_Fixup (instr_info *, int, int);
+static void FXSAVE_Fixup (instr_info *, int, int);
+
+static void MOVSXD_Fixup (instr_info *, int, int);
+static void DistinctDest_Fixup (instr_info *, int, int);
struct dis_private {
/* Points to first byte not fetched. */
mode_64bit
};
-enum address_mode address_mode;
+enum x86_64_isa
+{
+ amd64 = 1,
+ intel64
+};
+
+struct instr_info
+{
+ enum address_mode address_mode;
+
+ /* Flags for the prefixes for the current instruction. See below. */
+ int prefixes;
+
+ /* REX prefix the current instruction. See below. */
+ unsigned char rex;
+ /* Bits of REX we've already used. */
+ unsigned char rex_used;
+
+ bool need_modrm;
+ bool need_vex;
+ bool has_sib;
+
+ /* Flags for ins->prefixes which we somehow handled when printing the
+ current instruction. */
+ int used_prefixes;
+
+ /* Flags for EVEX bits which we somehow handled when printing the
+ current instruction. */
+ int evex_used;
+
+ char obuf[100];
+ char *obufp;
+ char *mnemonicendp;
+ char scratchbuf[100];
+ unsigned char *start_codep;
+ unsigned char *insn_codep;
+ unsigned char *codep;
+ unsigned char *end_codep;
+ int last_lock_prefix;
+ int last_repz_prefix;
+ int last_repnz_prefix;
+ int last_data_prefix;
+ int last_addr_prefix;
+ int last_rex_prefix;
+ int last_seg_prefix;
+ int fwait_prefix;
+ /* The active segment register prefix. */
+ int active_seg_prefix;
+
+#define MAX_CODE_LENGTH 15
+ /* We can up to 14 ins->prefixes since the maximum instruction length is
+ 15bytes. */
+ int all_prefixes[MAX_CODE_LENGTH - 1];
+ disassemble_info *info;
+
+ struct
+ {
+ int mod;
+ int reg;
+ int rm;
+ }
+ modrm;
+
+ struct
+ {
+ int scale;
+ int index;
+ int base;
+ }
+ sib;
+
+ struct
+ {
+ int register_specifier;
+ int length;
+ int prefix;
+ int mask_register_specifier;
+ int ll;
+ bool w;
+ bool evex;
+ bool r;
+ bool v;
+ bool zeroing;
+ bool b;
+ bool no_broadcast;
+ }
+ vex;
+
+ /* Remember if the current op is a jump instruction. */
+ bool op_is_jump;
+
+ bool two_source_ops;
+
+ unsigned char op_ad;
+ signed char op_index[MAX_OPERANDS];
+ char op_out[MAX_OPERANDS][100];
+ bfd_vma op_address[MAX_OPERANDS];
+ bfd_vma op_riprel[MAX_OPERANDS];
+ bfd_vma start_pc;
+
+ /* On the 386's of 1988, the maximum length of an instruction is 15 bytes.
+ * (see topic "Redundant ins->prefixes" in the "Differences from 8086"
+ * section of the "Virtual 8086 Mode" chapter.)
+ * 'pc' should be the address of this instruction, it will
+ * be used to print the target address if this is a relative jump or call
+ * The function returns the length of this instruction in bytes.
+ */
+ char intel_syntax;
+ bool intel_mnemonic;
+ char open_char;
+ char close_char;
+ char separator_char;
+ char scale_char;
+
+ enum x86_64_isa isa64;
-/* Flags for the prefixes for the current instruction. See below. */
-static int prefixes;
+};
-/* REX prefix the current instruction. See below. */
-static int rex;
-/* Bits of REX we've already used. */
-static int rex_used;
/* Mark parts used in the REX prefix. When we are testing for
empty prefix (for 8bit register REX extension), just mask it
out. Otherwise test for REX bit is excuse for existence of REX
{ \
if (value) \
{ \
- if ((rex & value)) \
- rex_used |= (value) | REX_OPCODE; \
+ if ((ins->rex & value)) \
+ ins->rex_used |= (value) | REX_OPCODE; \
} \
else \
- rex_used |= REX_OPCODE; \
+ ins->rex_used |= REX_OPCODE; \
}
-/* Flags for prefixes which we somehow handled when printing the
- current instruction. */
-static int used_prefixes;
+
+#define EVEX_b_used 1
/* Flags stored in PREFIXES. */
#define PREFIX_REPZ 1
#define EvS { OP_E, v_swap_mode }
#define Ed { OP_E, d_mode }
#define Edq { OP_E, dq_mode }
-#define Edqw { OP_E, dqw_mode }
-#define Edqb { OP_E, dqb_mode }
#define Edb { OP_E, db_mode }
#define Edw { OP_E, dw_mode }
-#define Edqd { OP_E, dqd_mode }
#define Eq { OP_E, q_mode }
#define indirEv { OP_indirE, indir_v_mode }
#define indirEp { OP_indirE, f_mode }
#define Mo { OP_M, o_mode }
#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
#define Mq { OP_M, q_mode }
+#define Mv { OP_M, v_mode }
#define Mv_bnd { OP_M, v_bndmk_mode }
#define Mx { OP_M, x_mode }
#define Mxmm { OP_M, xmm_mode }
#define Gm { OP_G, m_mode }
#define Gva { OP_G, va_mode }
#define Gw { OP_G, w_mode }
-#define Rd { OP_R, d_mode }
-#define Rdq { OP_R, dq_mode }
-#define Rm { OP_R, m_mode }
#define Ib { OP_I, b_mode }
#define sIb { OP_sI, b_mode } /* sign extened byte */
#define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */
#define RMDX { OP_REG, dx_reg }
#define eAX { OP_IMREG, eAX_reg }
-#define eBX { OP_IMREG, eBX_reg }
-#define eCX { OP_IMREG, eCX_reg }
-#define eDX { OP_IMREG, eDX_reg }
-#define eSP { OP_IMREG, eSP_reg }
-#define eBP { OP_IMREG, eBP_reg }
-#define eSI { OP_IMREG, eSI_reg }
-#define eDI { OP_IMREG, eDI_reg }
#define AL { OP_IMREG, al_reg }
#define CL { OP_IMREG, cl_reg }
-#define DL { OP_IMREG, dl_reg }
-#define BL { OP_IMREG, bl_reg }
-#define AH { OP_IMREG, ah_reg }
-#define CH { OP_IMREG, ch_reg }
-#define DH { OP_IMREG, dh_reg }
-#define BH { OP_IMREG, bh_reg }
-#define AX { OP_IMREG, ax_reg }
-#define DX { OP_IMREG, dx_reg }
#define zAX { OP_IMREG, z_mode_ax_reg }
#define indirDX { OP_IMREG, indir_dx_reg }
#define MX { OP_MMX, 0 }
#define XM { OP_XMM, 0 }
#define XMScalar { OP_XMM, scalar_mode }
+#define XMGatherD { OP_XMM, vex_vsib_d_w_dq_mode }
#define XMGatherQ { OP_XMM, vex_vsib_q_w_dq_mode }
#define XMM { OP_XMM, xmm_mode }
+#define TMM { OP_XMM, tmm_mode }
#define XMxmmq { OP_XMM, xmmq_mode }
#define EM { OP_EM, v_mode }
#define EMS { OP_EM, v_swap_mode }
#define EMd { OP_EM, d_mode }
#define EMx { OP_EM, x_mode }
-#define EXbScalar { OP_EX, b_scalar_mode }
+#define EXbwUnit { OP_EX, bw_unit_mode }
+#define EXb { OP_EX, b_mode }
#define EXw { OP_EX, w_mode }
-#define EXwScalar { OP_EX, w_scalar_mode }
#define EXd { OP_EX, d_mode }
#define EXdS { OP_EX, d_swap_mode }
+#define EXwS { OP_EX, w_swap_mode }
#define EXq { OP_EX, q_mode }
#define EXqS { OP_EX, q_swap_mode }
+#define EXdq { OP_EX, dq_mode }
#define EXx { OP_EX, x_mode }
+#define EXxh { OP_EX, xh_mode }
#define EXxS { OP_EX, x_swap_mode }
#define EXxmm { OP_EX, xmm_mode }
#define EXymm { OP_EX, ymm_mode }
+#define EXtmm { OP_EX, tmm_mode }
#define EXxmmq { OP_EX, xmmq_mode }
+#define EXxmmqh { OP_EX, evex_half_bcst_xmmqh_mode }
#define EXEvexHalfBcstXmmq { OP_EX, evex_half_bcst_xmmq_mode }
-#define EXxmm_mb { OP_EX, xmm_mb_mode }
-#define EXxmm_mw { OP_EX, xmm_mw_mode }
-#define EXxmm_md { OP_EX, xmm_md_mode }
-#define EXxmm_mq { OP_EX, xmm_mq_mode }
#define EXxmmdw { OP_EX, xmmdw_mode }
#define EXxmmqd { OP_EX, xmmqd_mode }
+#define EXxmmqdh { OP_EX, evex_half_bcst_xmmqdh_mode }
#define EXymmq { OP_EX, ymmq_mode }
-#define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode }
#define EXEvexXGscat { OP_EX, evex_x_gscat_mode }
#define EXEvexXNoBcst { OP_EX, evex_x_nobcst_mode }
#define MS { OP_MS, v_mode }
#define CMP { CMP_Fixup, 0 }
#define XMM0 { XMM_Fixup, 0 }
#define FXSAVE { FXSAVE_Fixup, 0 }
-#define Vex_2src_1 { OP_Vex_2src_1, 0 }
-#define Vex_2src_2 { OP_Vex_2src_2, 0 }
-#define Vex { OP_VEX, vex_mode }
-#define VexScalar { OP_VEX, vex_scalar_mode }
+#define Vex { OP_VEX, x_mode }
+#define VexW { OP_VexW, x_mode }
+#define VexScalar { OP_VEX, scalar_mode }
+#define VexScalarR { OP_VexR, scalar_mode }
+#define VexGatherD { OP_VEX, vex_vsib_d_w_dq_mode }
#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
-#define Vex128 { OP_VEX, vex128_mode }
-#define Vex256 { OP_VEX, vex256_mode }
#define VexGdq { OP_VEX, dq_mode }
-#define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode }
-#define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode }
-#define EXVexW { OP_EX_VexW, x_mode }
-#define EXdVexW { OP_EX_VexW, d_mode }
-#define EXqVexW { OP_EX_VexW, q_mode }
-#define EXVexImmW { OP_EX_VexImmW, x_mode }
-#define XMVexScalar { OP_XMM_Vex, scalar_mode }
-#define XMVexW { OP_XMM_VexW, 0 }
+#define VexTmm { OP_VEX, tmm_mode }
#define XMVexI4 { OP_REG_VexI4, x_mode }
+#define XMVexScalarI4 { OP_REG_VexI4, scalar_mode }
+#define VexI4 { OP_VexI4, 0 }
#define PCLMUL { PCLMUL_Fixup, 0 }
-#define VCMP { VCMP_Fixup, 0 }
#define VPCMP { VPCMP_Fixup, 0 }
#define VPCOM { VPCOM_Fixup, 0 }
#define EXxEVexR64 { OP_Rounding, evex_rounding_64_mode }
#define EXxEVexS { OP_Rounding, evex_sae_mode }
-#define XMask { OP_Mask, mask_mode }
#define MaskG { OP_G, mask_mode }
#define MaskE { OP_E, mask_mode }
#define MaskBDE { OP_E, mask_bd_mode }
-#define MaskR { OP_R, mask_mode }
#define MaskVex { OP_VEX, mask_mode }
#define MVexVSIBDWpX { OP_M, vex_vsib_d_w_dq_mode }
-#define MVexVSIBDQWpX { OP_M, vex_vsib_d_w_d_mode }
#define MVexVSIBQWpX { OP_M, vex_vsib_q_w_dq_mode }
-#define MVexVSIBQDWpX { OP_M, vex_vsib_q_w_d_mode }
+
+#define MVexSIBMEM { OP_M, vex_sibmem_mode }
/* Used handle "rep" prefix for string instructions. */
#define Xbr { REP_Fixup, eSI_reg }
w_mode,
/* double word operand */
d_mode,
+ /* word operand with operand swapped */
+ w_swap_mode,
/* double word operand with operand swapped */
d_swap_mode,
/* quad word operand */
x_mode,
/* Similar to x_mode, but with different EVEX mem shifts. */
evex_x_gscat_mode,
+ /* Similar to x_mode, but with yet different EVEX mem shifts. */
+ bw_unit_mode,
/* Similar to x_mode, but with disabled broadcast. */
evex_x_nobcst_mode,
/* Similar to x_mode, but with operands swapped and disabled broadcast
in EVEX. */
x_swap_mode,
+ /* 16-byte XMM, 32-byte YMM or 64-byte ZMM operand. In EVEX with
+ broadcast of 16bit enabled. */
+ xh_mode,
/* 16-byte XMM operand */
xmm_mode,
/* XMM, XMM or YMM register operand, or quad word, xmmword or ymmword
xmmq_mode,
/* Same as xmmq_mode, but broadcast is allowed. */
evex_half_bcst_xmmq_mode,
- /* XMM register or byte memory operand */
- xmm_mb_mode,
- /* XMM register or word memory operand */
- xmm_mw_mode,
- /* XMM register or double word memory operand */
- xmm_md_mode,
- /* XMM register or quad word memory operand */
- xmm_mq_mode,
+ /* XMM, XMM or YMM register operand, or quad word, xmmword or ymmword
+ memory operand (depending on vector length). 16bit broadcast. */
+ evex_half_bcst_xmmqh_mode,
/* 16-byte XMM, word, double word or quad word operand. */
xmmdw_mode,
/* 16-byte XMM, double word, quad word operand or xmm word operand. */
xmmqd_mode,
+ /* 16-byte XMM, double word, quad word operand or xmm word operand.
+ 16bit broadcast. */
+ evex_half_bcst_xmmqdh_mode,
/* 32-byte YMM operand */
ymm_mode,
/* quad word, ymmword or zmmword memory operand. */
ymmq_mode,
- /* 32-byte YMM or 16-byte word operand */
- ymmxmm_mode,
+ /* TMM operand */
+ tmm_mode,
/* d_mode in 32bit, q_mode in 64bit mode. */
m_mode,
/* pair of v_mode operands */
v_bnd_mode,
/* like v_bnd_mode in 32bit, no RIP-rel in 64bit mode. */
v_bndmk_mode,
- /* operand size depends on REX prefixes. */
+ /* operand size depends on REX.W / VEX.W. */
dq_mode,
- /* registers like dq_mode, memory like w_mode, displacements like
- v_mode without considering Intel64 ISA. */
+ /* Displacements like v_mode without considering Intel64 ISA. */
dqw_mode,
/* bounds operand */
bnd_mode,
z_mode,
/* 16-byte operand */
o_mode,
- /* registers like dq_mode, memory like b_mode. */
- dqb_mode,
/* registers like d_mode, memory like b_mode. */
db_mode,
/* registers like d_mode, memory like w_mode. */
dw_mode,
- /* registers like dq_mode, memory like d_mode. */
- dqd_mode,
- /* normal vex mode */
- vex_mode,
- /* 128bit vex mode */
- vex128_mode,
- /* 256bit vex mode */
- vex256_mode,
/* Operand size depends on the VEX.W bit, with VSIB dword indices. */
vex_vsib_d_w_dq_mode,
- /* Similar to vex_vsib_d_w_dq_mode, with smaller memory. */
- vex_vsib_d_w_d_mode,
/* Operand size depends on the VEX.W bit, with VSIB qword indices. */
vex_vsib_q_w_dq_mode,
- /* Similar to vex_vsib_q_w_dq_mode, with smaller memory. */
- vex_vsib_q_w_d_mode,
+ /* mandatory non-vector SIB. */
+ vex_sibmem_mode,
/* scalar, ignore vector length. */
scalar_mode,
- /* like b_mode, ignore vector length. */
- b_scalar_mode,
- /* like w_mode, ignore vector length. */
- w_scalar_mode,
- /* like d_swap_mode, ignore vector length. */
- d_scalar_swap_mode,
- /* like q_swap_mode, ignore vector length. */
- q_scalar_swap_mode,
- /* like vex_mode, ignore vector length. */
- vex_scalar_mode,
- /* Operand size depends on the VEX.W bit, ignore vector length. */
- vex_scalar_w_dq_mode,
/* Static rounding. */
evex_rounding_mode,
REG_0F18,
REG_0F1C_P_0_MOD_0,
REG_0F1E_P_1_MOD_3,
- REG_0F71,
- REG_0F72,
- REG_0F73,
+ REG_0F38D8_PREFIX_1,
+ REG_0F3A0F_PREFIX_1_MOD_3,
+ REG_0F71_MOD_0,
+ REG_0F72_MOD_0,
+ REG_0F73_MOD_0,
REG_0FA6,
REG_0FA7,
REG_0FAE,
REG_0FBA,
REG_0FC7,
- REG_VEX_0F71,
- REG_VEX_0F72,
- REG_VEX_0F73,
+ REG_VEX_0F71_M_0,
+ REG_VEX_0F72_M_0,
+ REG_VEX_0F73_M_0,
REG_VEX_0FAE,
- REG_VEX_0F38F3,
- REG_XOP_LWPCB,
- REG_XOP_LWP,
- REG_XOP_TBM_01,
- REG_XOP_TBM_02,
+ REG_VEX_0F3849_X86_64_P_0_W_0_M_1,
+ REG_VEX_0F38F3_L_0,
+
+ REG_XOP_09_01_L_0,
+ REG_XOP_09_02_L_0,
+ REG_XOP_09_12_M_1_L_0,
+ REG_XOP_0A_12_L_0,
REG_EVEX_0F71,
REG_EVEX_0F72,
REG_EVEX_0F73,
- REG_EVEX_0F38C6,
- REG_EVEX_0F38C7
+ REG_EVEX_0F38C6_M_0_L_2,
+ REG_EVEX_0F38C7_M_0_L_2
};
enum
{
- MOD_8D = 0,
+ MOD_62_32BIT = 0,
+ MOD_8D,
+ MOD_C4_32BIT,
+ MOD_C5_32BIT,
MOD_C6_REG_7,
MOD_C7_REG_7,
MOD_FF_REG_3,
MOD_0F18_REG_1,
MOD_0F18_REG_2,
MOD_0F18_REG_3,
- MOD_0F18_REG_4,
- MOD_0F18_REG_5,
- MOD_0F18_REG_6,
- MOD_0F18_REG_7,
MOD_0F1A_PREFIX_0,
MOD_0F1B_PREFIX_0,
MOD_0F1B_PREFIX_1,
MOD_0F1C_PREFIX_0,
MOD_0F1E_PREFIX_1,
- MOD_0F24,
- MOD_0F26,
MOD_0F2B_PREFIX_0,
MOD_0F2B_PREFIX_1,
MOD_0F2B_PREFIX_2,
MOD_0F2B_PREFIX_3,
MOD_0F50,
- MOD_0F71_REG_2,
- MOD_0F71_REG_4,
- MOD_0F71_REG_6,
- MOD_0F72_REG_2,
- MOD_0F72_REG_4,
- MOD_0F72_REG_6,
- MOD_0F73_REG_2,
- MOD_0F73_REG_3,
- MOD_0F73_REG_6,
- MOD_0F73_REG_7,
+ MOD_0F71,
+ MOD_0F72,
+ MOD_0F73,
MOD_0FAE_REG_0,
MOD_0FAE_REG_1,
MOD_0FAE_REG_2,
MOD_0FD7,
MOD_0FE7_PREFIX_2,
MOD_0FF0_PREFIX_3,
- MOD_0F382A_PREFIX_2,
- MOD_0F38F5_PREFIX_2,
+ MOD_0F382A,
+ MOD_0F38DC_PREFIX_1,
+ MOD_0F38DD_PREFIX_1,
+ MOD_0F38DE_PREFIX_1,
+ MOD_0F38DF_PREFIX_1,
+ MOD_0F38F5,
MOD_0F38F6_PREFIX_0,
MOD_0F38F8_PREFIX_1,
MOD_0F38F8_PREFIX_2,
MOD_0F38F8_PREFIX_3,
- MOD_0F38F9_PREFIX_0,
- MOD_62_32BIT,
- MOD_C4_32BIT,
- MOD_C5_32BIT,
+ MOD_0F38F9,
+ MOD_0F38FA_PREFIX_1,
+ MOD_0F38FB_PREFIX_1,
+ MOD_0F3A0F_PREFIX_1,
+
MOD_VEX_0F12_PREFIX_0,
MOD_VEX_0F12_PREFIX_2,
MOD_VEX_0F13,
MOD_VEX_0F16_PREFIX_2,
MOD_VEX_0F17,
MOD_VEX_0F2B,
- MOD_VEX_W_0_0F41_P_0_LEN_1,
- MOD_VEX_W_1_0F41_P_0_LEN_1,
- MOD_VEX_W_0_0F41_P_2_LEN_1,
- MOD_VEX_W_1_0F41_P_2_LEN_1,
- MOD_VEX_W_0_0F42_P_0_LEN_1,
- MOD_VEX_W_1_0F42_P_0_LEN_1,
- MOD_VEX_W_0_0F42_P_2_LEN_1,
- MOD_VEX_W_1_0F42_P_2_LEN_1,
- MOD_VEX_W_0_0F44_P_0_LEN_1,
- MOD_VEX_W_1_0F44_P_0_LEN_1,
- MOD_VEX_W_0_0F44_P_2_LEN_1,
- MOD_VEX_W_1_0F44_P_2_LEN_1,
- MOD_VEX_W_0_0F45_P_0_LEN_1,
- MOD_VEX_W_1_0F45_P_0_LEN_1,
- MOD_VEX_W_0_0F45_P_2_LEN_1,
- MOD_VEX_W_1_0F45_P_2_LEN_1,
- MOD_VEX_W_0_0F46_P_0_LEN_1,
- MOD_VEX_W_1_0F46_P_0_LEN_1,
- MOD_VEX_W_0_0F46_P_2_LEN_1,
- MOD_VEX_W_1_0F46_P_2_LEN_1,
- MOD_VEX_W_0_0F47_P_0_LEN_1,
- MOD_VEX_W_1_0F47_P_0_LEN_1,
- MOD_VEX_W_0_0F47_P_2_LEN_1,
- MOD_VEX_W_1_0F47_P_2_LEN_1,
- MOD_VEX_W_0_0F4A_P_0_LEN_1,
- MOD_VEX_W_1_0F4A_P_0_LEN_1,
- MOD_VEX_W_0_0F4A_P_2_LEN_1,
- MOD_VEX_W_1_0F4A_P_2_LEN_1,
- MOD_VEX_W_0_0F4B_P_0_LEN_1,
- MOD_VEX_W_1_0F4B_P_0_LEN_1,
- MOD_VEX_W_0_0F4B_P_2_LEN_1,
+ MOD_VEX_0F41_L_1,
+ MOD_VEX_0F42_L_1,
+ MOD_VEX_0F44_L_0,
+ MOD_VEX_0F45_L_1,
+ MOD_VEX_0F46_L_1,
+ MOD_VEX_0F47_L_1,
+ MOD_VEX_0F4A_L_1,
+ MOD_VEX_0F4B_L_1,
MOD_VEX_0F50,
- MOD_VEX_0F71_REG_2,
- MOD_VEX_0F71_REG_4,
- MOD_VEX_0F71_REG_6,
- MOD_VEX_0F72_REG_2,
- MOD_VEX_0F72_REG_4,
- MOD_VEX_0F72_REG_6,
- MOD_VEX_0F73_REG_2,
- MOD_VEX_0F73_REG_3,
- MOD_VEX_0F73_REG_6,
- MOD_VEX_0F73_REG_7,
- MOD_VEX_W_0_0F91_P_0_LEN_0,
- MOD_VEX_W_1_0F91_P_0_LEN_0,
- MOD_VEX_W_0_0F91_P_2_LEN_0,
- MOD_VEX_W_1_0F91_P_2_LEN_0,
- MOD_VEX_W_0_0F92_P_0_LEN_0,
- MOD_VEX_W_0_0F92_P_2_LEN_0,
- MOD_VEX_0F92_P_3_LEN_0,
- MOD_VEX_W_0_0F93_P_0_LEN_0,
- MOD_VEX_W_0_0F93_P_2_LEN_0,
- MOD_VEX_0F93_P_3_LEN_0,
- MOD_VEX_W_0_0F98_P_0_LEN_0,
- MOD_VEX_W_1_0F98_P_0_LEN_0,
- MOD_VEX_W_0_0F98_P_2_LEN_0,
- MOD_VEX_W_1_0F98_P_2_LEN_0,
- MOD_VEX_W_0_0F99_P_0_LEN_0,
- MOD_VEX_W_1_0F99_P_0_LEN_0,
- MOD_VEX_W_0_0F99_P_2_LEN_0,
- MOD_VEX_W_1_0F99_P_2_LEN_0,
+ MOD_VEX_0F71,
+ MOD_VEX_0F72,
+ MOD_VEX_0F73,
+ MOD_VEX_0F91_L_0,
+ MOD_VEX_0F92_L_0,
+ MOD_VEX_0F93_L_0,
+ MOD_VEX_0F98_L_0,
+ MOD_VEX_0F99_L_0,
MOD_VEX_0FAE_REG_2,
MOD_VEX_0FAE_REG_3,
- MOD_VEX_0FD7_PREFIX_2,
- MOD_VEX_0FE7_PREFIX_2,
+ MOD_VEX_0FD7,
+ MOD_VEX_0FE7,
MOD_VEX_0FF0_PREFIX_3,
- MOD_VEX_0F381A_PREFIX_2,
- MOD_VEX_0F382A_PREFIX_2,
- MOD_VEX_0F382C_PREFIX_2,
- MOD_VEX_0F382D_PREFIX_2,
- MOD_VEX_0F382E_PREFIX_2,
- MOD_VEX_0F382F_PREFIX_2,
- MOD_VEX_0F385A_PREFIX_2,
- MOD_VEX_0F388C_PREFIX_2,
- MOD_VEX_0F388E_PREFIX_2,
- MOD_VEX_W_0_0F3A30_P_2_LEN_0,
- MOD_VEX_W_1_0F3A30_P_2_LEN_0,
- MOD_VEX_W_0_0F3A31_P_2_LEN_0,
- MOD_VEX_W_1_0F3A31_P_2_LEN_0,
- MOD_VEX_W_0_0F3A32_P_2_LEN_0,
- MOD_VEX_W_1_0F3A32_P_2_LEN_0,
- MOD_VEX_W_0_0F3A33_P_2_LEN_0,
- MOD_VEX_W_1_0F3A33_P_2_LEN_0,
-
- MOD_EVEX_0F12_PREFIX_0,
- MOD_EVEX_0F12_PREFIX_2,
- MOD_EVEX_0F13,
- MOD_EVEX_0F16_PREFIX_0,
- MOD_EVEX_0F16_PREFIX_2,
- MOD_EVEX_0F17,
- MOD_EVEX_0F2B,
- MOD_EVEX_0F38C6_REG_1,
- MOD_EVEX_0F38C6_REG_2,
- MOD_EVEX_0F38C6_REG_5,
- MOD_EVEX_0F38C6_REG_6,
- MOD_EVEX_0F38C7_REG_1,
- MOD_EVEX_0F38C7_REG_2,
- MOD_EVEX_0F38C7_REG_5,
- MOD_EVEX_0F38C7_REG_6
+ MOD_VEX_0F381A,
+ MOD_VEX_0F382A,
+ MOD_VEX_0F382C,
+ MOD_VEX_0F382D,
+ MOD_VEX_0F382E,
+ MOD_VEX_0F382F,
+ MOD_VEX_0F3849_X86_64_P_0_W_0,
+ MOD_VEX_0F3849_X86_64_P_2_W_0,
+ MOD_VEX_0F3849_X86_64_P_3_W_0,
+ MOD_VEX_0F384B_X86_64_P_1_W_0,
+ MOD_VEX_0F384B_X86_64_P_2_W_0,
+ MOD_VEX_0F384B_X86_64_P_3_W_0,
+ MOD_VEX_0F385A,
+ MOD_VEX_0F385C_X86_64_P_1_W_0,
+ MOD_VEX_0F385E_X86_64_P_0_W_0,
+ MOD_VEX_0F385E_X86_64_P_1_W_0,
+ MOD_VEX_0F385E_X86_64_P_2_W_0,
+ MOD_VEX_0F385E_X86_64_P_3_W_0,
+ MOD_VEX_0F388C,
+ MOD_VEX_0F388E,
+ MOD_VEX_0F3A30_L_0,
+ MOD_VEX_0F3A31_L_0,
+ MOD_VEX_0F3A32_L_0,
+ MOD_VEX_0F3A33_L_0,
+
+ MOD_XOP_09_12,
+
+ MOD_EVEX_0F381A,
+ MOD_EVEX_0F381B,
+ MOD_EVEX_0F3828_P_1,
+ MOD_EVEX_0F382A_P_1_W_1,
+ MOD_EVEX_0F3838_P_1,
+ MOD_EVEX_0F383A_P_1_W_0,
+ MOD_EVEX_0F385A,
+ MOD_EVEX_0F385B,
+ MOD_EVEX_0F387A_W_0,
+ MOD_EVEX_0F387B_W_0,
+ MOD_EVEX_0F387C,
+ MOD_EVEX_0F38C6,
+ MOD_EVEX_0F38C7,
};
enum
RM_0F1E_P_1_MOD_3_REG_7,
RM_0FAE_REG_6_MOD_3_P_0,
RM_0FAE_REG_7_MOD_3,
+ RM_0F3A0F_P_1_MOD_3_REG_0,
+
+ RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0
};
enum
{
PREFIX_90 = 0,
+ PREFIX_0F01_REG_1_RM_4,
+ PREFIX_0F01_REG_1_RM_5,
+ PREFIX_0F01_REG_1_RM_6,
+ PREFIX_0F01_REG_1_RM_7,
PREFIX_0F01_REG_3_RM_1,
PREFIX_0F01_REG_5_MOD_0,
PREFIX_0F01_REG_5_MOD_3_RM_0,
PREFIX_0F01_REG_5_MOD_3_RM_1,
PREFIX_0F01_REG_5_MOD_3_RM_2,
+ PREFIX_0F01_REG_5_MOD_3_RM_4,
+ PREFIX_0F01_REG_5_MOD_3_RM_5,
+ PREFIX_0F01_REG_5_MOD_3_RM_6,
+ PREFIX_0F01_REG_5_MOD_3_RM_7,
PREFIX_0F01_REG_7_MOD_3_RM_2,
- PREFIX_0F01_REG_7_MOD_3_RM_3,
+ PREFIX_0F01_REG_7_MOD_3_RM_6,
+ PREFIX_0F01_REG_7_MOD_3_RM_7,
PREFIX_0F09,
PREFIX_0F10,
PREFIX_0F11,
PREFIX_0F60,
PREFIX_0F61,
PREFIX_0F62,
- PREFIX_0F6C,
- PREFIX_0F6D,
PREFIX_0F6F,
PREFIX_0F70,
- PREFIX_0F73_REG_3,
- PREFIX_0F73_REG_7,
PREFIX_0F78,
PREFIX_0F79,
PREFIX_0F7C,
PREFIX_0FAE_REG_3_MOD_3,
PREFIX_0FAE_REG_4_MOD_0,
PREFIX_0FAE_REG_4_MOD_3,
- PREFIX_0FAE_REG_5_MOD_0,
PREFIX_0FAE_REG_5_MOD_3,
PREFIX_0FAE_REG_6_MOD_0,
PREFIX_0FAE_REG_6_MOD_3,
PREFIX_0FBC,
PREFIX_0FBD,
PREFIX_0FC2,
- PREFIX_0FC3_MOD_0,
PREFIX_0FC7_REG_6_MOD_0,
PREFIX_0FC7_REG_6_MOD_3,
PREFIX_0FC7_REG_7_MOD_3,
PREFIX_0FE7,
PREFIX_0FF0,
PREFIX_0FF7,
- PREFIX_0F3810,
- PREFIX_0F3814,
- PREFIX_0F3815,
- PREFIX_0F3817,
- PREFIX_0F3820,
- PREFIX_0F3821,
- PREFIX_0F3822,
- PREFIX_0F3823,
- PREFIX_0F3824,
- PREFIX_0F3825,
- PREFIX_0F3828,
- PREFIX_0F3829,
- PREFIX_0F382A,
- PREFIX_0F382B,
- PREFIX_0F3830,
- PREFIX_0F3831,
- PREFIX_0F3832,
- PREFIX_0F3833,
- PREFIX_0F3834,
- PREFIX_0F3835,
- PREFIX_0F3837,
- PREFIX_0F3838,
- PREFIX_0F3839,
- PREFIX_0F383A,
- PREFIX_0F383B,
- PREFIX_0F383C,
- PREFIX_0F383D,
- PREFIX_0F383E,
- PREFIX_0F383F,
- PREFIX_0F3840,
- PREFIX_0F3841,
- PREFIX_0F3880,
- PREFIX_0F3881,
- PREFIX_0F3882,
- PREFIX_0F38C8,
- PREFIX_0F38C9,
- PREFIX_0F38CA,
- PREFIX_0F38CB,
- PREFIX_0F38CC,
- PREFIX_0F38CD,
- PREFIX_0F38CF,
- PREFIX_0F38DB,
+ PREFIX_0F38D8,
PREFIX_0F38DC,
PREFIX_0F38DD,
PREFIX_0F38DE,
PREFIX_0F38DF,
PREFIX_0F38F0,
PREFIX_0F38F1,
- PREFIX_0F38F5,
PREFIX_0F38F6,
PREFIX_0F38F8,
- PREFIX_0F38F9,
- PREFIX_0F3A08,
- PREFIX_0F3A09,
- PREFIX_0F3A0A,
- PREFIX_0F3A0B,
- PREFIX_0F3A0C,
- PREFIX_0F3A0D,
- PREFIX_0F3A0E,
- PREFIX_0F3A14,
- PREFIX_0F3A15,
- PREFIX_0F3A16,
- PREFIX_0F3A17,
- PREFIX_0F3A20,
- PREFIX_0F3A21,
- PREFIX_0F3A22,
- PREFIX_0F3A40,
- PREFIX_0F3A41,
- PREFIX_0F3A42,
- PREFIX_0F3A44,
- PREFIX_0F3A60,
- PREFIX_0F3A61,
- PREFIX_0F3A62,
- PREFIX_0F3A63,
- PREFIX_0F3ACC,
- PREFIX_0F3ACE,
- PREFIX_0F3ACF,
- PREFIX_0F3ADF,
+ PREFIX_0F38FA,
+ PREFIX_0F38FB,
+ PREFIX_0F3A0F,
PREFIX_VEX_0F10,
PREFIX_VEX_0F11,
PREFIX_VEX_0F12,
PREFIX_VEX_0F2D,
PREFIX_VEX_0F2E,
PREFIX_VEX_0F2F,
- PREFIX_VEX_0F41,
- PREFIX_VEX_0F42,
- PREFIX_VEX_0F44,
- PREFIX_VEX_0F45,
- PREFIX_VEX_0F46,
- PREFIX_VEX_0F47,
- PREFIX_VEX_0F4A,
- PREFIX_VEX_0F4B,
+ PREFIX_VEX_0F41_L_1_M_1_W_0,
+ PREFIX_VEX_0F41_L_1_M_1_W_1,
+ PREFIX_VEX_0F42_L_1_M_1_W_0,
+ PREFIX_VEX_0F42_L_1_M_1_W_1,
+ PREFIX_VEX_0F44_L_0_M_1_W_0,
+ PREFIX_VEX_0F44_L_0_M_1_W_1,
+ PREFIX_VEX_0F45_L_1_M_1_W_0,
+ PREFIX_VEX_0F45_L_1_M_1_W_1,
+ PREFIX_VEX_0F46_L_1_M_1_W_0,
+ PREFIX_VEX_0F46_L_1_M_1_W_1,
+ PREFIX_VEX_0F47_L_1_M_1_W_0,
+ PREFIX_VEX_0F47_L_1_M_1_W_1,
+ PREFIX_VEX_0F4A_L_1_M_1_W_0,
+ PREFIX_VEX_0F4A_L_1_M_1_W_1,
+ PREFIX_VEX_0F4B_L_1_M_1_W_0,
+ PREFIX_VEX_0F4B_L_1_M_1_W_1,
PREFIX_VEX_0F51,
PREFIX_VEX_0F52,
PREFIX_VEX_0F53,
PREFIX_VEX_0F5D,
PREFIX_VEX_0F5E,
PREFIX_VEX_0F5F,
- PREFIX_VEX_0F60,
- PREFIX_VEX_0F61,
- PREFIX_VEX_0F62,
- PREFIX_VEX_0F63,
- PREFIX_VEX_0F64,
- PREFIX_VEX_0F65,
- PREFIX_VEX_0F66,
- PREFIX_VEX_0F67,
- PREFIX_VEX_0F68,
- PREFIX_VEX_0F69,
- PREFIX_VEX_0F6A,
- PREFIX_VEX_0F6B,
- PREFIX_VEX_0F6C,
- PREFIX_VEX_0F6D,
- PREFIX_VEX_0F6E,
PREFIX_VEX_0F6F,
PREFIX_VEX_0F70,
- PREFIX_VEX_0F71_REG_2,
- PREFIX_VEX_0F71_REG_4,
- PREFIX_VEX_0F71_REG_6,
- PREFIX_VEX_0F72_REG_2,
- PREFIX_VEX_0F72_REG_4,
- PREFIX_VEX_0F72_REG_6,
- PREFIX_VEX_0F73_REG_2,
- PREFIX_VEX_0F73_REG_3,
- PREFIX_VEX_0F73_REG_6,
- PREFIX_VEX_0F73_REG_7,
- PREFIX_VEX_0F74,
- PREFIX_VEX_0F75,
- PREFIX_VEX_0F76,
- PREFIX_VEX_0F77,
PREFIX_VEX_0F7C,
PREFIX_VEX_0F7D,
PREFIX_VEX_0F7E,
PREFIX_VEX_0F7F,
- PREFIX_VEX_0F90,
- PREFIX_VEX_0F91,
- PREFIX_VEX_0F92,
- PREFIX_VEX_0F93,
- PREFIX_VEX_0F98,
- PREFIX_VEX_0F99,
+ PREFIX_VEX_0F90_L_0_W_0,
+ PREFIX_VEX_0F90_L_0_W_1,
+ PREFIX_VEX_0F91_L_0_M_0_W_0,
+ PREFIX_VEX_0F91_L_0_M_0_W_1,
+ PREFIX_VEX_0F92_L_0_M_1_W_0,
+ PREFIX_VEX_0F92_L_0_M_1_W_1,
+ PREFIX_VEX_0F93_L_0_M_1_W_0,
+ PREFIX_VEX_0F93_L_0_M_1_W_1,
+ PREFIX_VEX_0F98_L_0_M_1_W_0,
+ PREFIX_VEX_0F98_L_0_M_1_W_1,
+ PREFIX_VEX_0F99_L_0_M_1_W_0,
+ PREFIX_VEX_0F99_L_0_M_1_W_1,
PREFIX_VEX_0FC2,
- PREFIX_VEX_0FC4,
- PREFIX_VEX_0FC5,
PREFIX_VEX_0FD0,
- PREFIX_VEX_0FD1,
- PREFIX_VEX_0FD2,
- PREFIX_VEX_0FD3,
- PREFIX_VEX_0FD4,
- PREFIX_VEX_0FD5,
- PREFIX_VEX_0FD6,
- PREFIX_VEX_0FD7,
- PREFIX_VEX_0FD8,
- PREFIX_VEX_0FD9,
- PREFIX_VEX_0FDA,
- PREFIX_VEX_0FDB,
- PREFIX_VEX_0FDC,
- PREFIX_VEX_0FDD,
- PREFIX_VEX_0FDE,
- PREFIX_VEX_0FDF,
- PREFIX_VEX_0FE0,
- PREFIX_VEX_0FE1,
- PREFIX_VEX_0FE2,
- PREFIX_VEX_0FE3,
- PREFIX_VEX_0FE4,
- PREFIX_VEX_0FE5,
PREFIX_VEX_0FE6,
- PREFIX_VEX_0FE7,
- PREFIX_VEX_0FE8,
- PREFIX_VEX_0FE9,
- PREFIX_VEX_0FEA,
- PREFIX_VEX_0FEB,
- PREFIX_VEX_0FEC,
- PREFIX_VEX_0FED,
- PREFIX_VEX_0FEE,
- PREFIX_VEX_0FEF,
PREFIX_VEX_0FF0,
- PREFIX_VEX_0FF1,
- PREFIX_VEX_0FF2,
- PREFIX_VEX_0FF3,
- PREFIX_VEX_0FF4,
- PREFIX_VEX_0FF5,
- PREFIX_VEX_0FF6,
- PREFIX_VEX_0FF7,
- PREFIX_VEX_0FF8,
- PREFIX_VEX_0FF9,
- PREFIX_VEX_0FFA,
- PREFIX_VEX_0FFB,
- PREFIX_VEX_0FFC,
- PREFIX_VEX_0FFD,
- PREFIX_VEX_0FFE,
- PREFIX_VEX_0F3800,
- PREFIX_VEX_0F3801,
- PREFIX_VEX_0F3802,
- PREFIX_VEX_0F3803,
- PREFIX_VEX_0F3804,
- PREFIX_VEX_0F3805,
- PREFIX_VEX_0F3806,
- PREFIX_VEX_0F3807,
- PREFIX_VEX_0F3808,
- PREFIX_VEX_0F3809,
- PREFIX_VEX_0F380A,
- PREFIX_VEX_0F380B,
- PREFIX_VEX_0F380C,
- PREFIX_VEX_0F380D,
- PREFIX_VEX_0F380E,
- PREFIX_VEX_0F380F,
- PREFIX_VEX_0F3813,
- PREFIX_VEX_0F3816,
- PREFIX_VEX_0F3817,
- PREFIX_VEX_0F3818,
- PREFIX_VEX_0F3819,
- PREFIX_VEX_0F381A,
- PREFIX_VEX_0F381C,
- PREFIX_VEX_0F381D,
- PREFIX_VEX_0F381E,
- PREFIX_VEX_0F3820,
- PREFIX_VEX_0F3821,
- PREFIX_VEX_0F3822,
- PREFIX_VEX_0F3823,
- PREFIX_VEX_0F3824,
- PREFIX_VEX_0F3825,
- PREFIX_VEX_0F3828,
- PREFIX_VEX_0F3829,
- PREFIX_VEX_0F382A,
- PREFIX_VEX_0F382B,
- PREFIX_VEX_0F382C,
- PREFIX_VEX_0F382D,
- PREFIX_VEX_0F382E,
- PREFIX_VEX_0F382F,
- PREFIX_VEX_0F3830,
- PREFIX_VEX_0F3831,
- PREFIX_VEX_0F3832,
- PREFIX_VEX_0F3833,
- PREFIX_VEX_0F3834,
- PREFIX_VEX_0F3835,
- PREFIX_VEX_0F3836,
- PREFIX_VEX_0F3837,
- PREFIX_VEX_0F3838,
- PREFIX_VEX_0F3839,
- PREFIX_VEX_0F383A,
- PREFIX_VEX_0F383B,
- PREFIX_VEX_0F383C,
- PREFIX_VEX_0F383D,
- PREFIX_VEX_0F383E,
- PREFIX_VEX_0F383F,
- PREFIX_VEX_0F3840,
- PREFIX_VEX_0F3841,
- PREFIX_VEX_0F3845,
- PREFIX_VEX_0F3846,
- PREFIX_VEX_0F3847,
- PREFIX_VEX_0F3858,
- PREFIX_VEX_0F3859,
- PREFIX_VEX_0F385A,
- PREFIX_VEX_0F3878,
- PREFIX_VEX_0F3879,
- PREFIX_VEX_0F388C,
- PREFIX_VEX_0F388E,
- PREFIX_VEX_0F3890,
- PREFIX_VEX_0F3891,
- PREFIX_VEX_0F3892,
- PREFIX_VEX_0F3893,
- PREFIX_VEX_0F3896,
- PREFIX_VEX_0F3897,
- PREFIX_VEX_0F3898,
- PREFIX_VEX_0F3899,
- PREFIX_VEX_0F389A,
- PREFIX_VEX_0F389B,
- PREFIX_VEX_0F389C,
- PREFIX_VEX_0F389D,
- PREFIX_VEX_0F389E,
- PREFIX_VEX_0F389F,
- PREFIX_VEX_0F38A6,
- PREFIX_VEX_0F38A7,
- PREFIX_VEX_0F38A8,
- PREFIX_VEX_0F38A9,
- PREFIX_VEX_0F38AA,
- PREFIX_VEX_0F38AB,
- PREFIX_VEX_0F38AC,
- PREFIX_VEX_0F38AD,
- PREFIX_VEX_0F38AE,
- PREFIX_VEX_0F38AF,
- PREFIX_VEX_0F38B6,
- PREFIX_VEX_0F38B7,
- PREFIX_VEX_0F38B8,
- PREFIX_VEX_0F38B9,
- PREFIX_VEX_0F38BA,
- PREFIX_VEX_0F38BB,
- PREFIX_VEX_0F38BC,
- PREFIX_VEX_0F38BD,
- PREFIX_VEX_0F38BE,
- PREFIX_VEX_0F38BF,
- PREFIX_VEX_0F38CF,
- PREFIX_VEX_0F38DB,
- PREFIX_VEX_0F38DC,
- PREFIX_VEX_0F38DD,
- PREFIX_VEX_0F38DE,
- PREFIX_VEX_0F38DF,
- PREFIX_VEX_0F38F2,
- PREFIX_VEX_0F38F3_REG_1,
- PREFIX_VEX_0F38F3_REG_2,
- PREFIX_VEX_0F38F3_REG_3,
- PREFIX_VEX_0F38F5,
- PREFIX_VEX_0F38F6,
- PREFIX_VEX_0F38F7,
- PREFIX_VEX_0F3A00,
- PREFIX_VEX_0F3A01,
- PREFIX_VEX_0F3A02,
- PREFIX_VEX_0F3A04,
- PREFIX_VEX_0F3A05,
- PREFIX_VEX_0F3A06,
- PREFIX_VEX_0F3A08,
- PREFIX_VEX_0F3A09,
- PREFIX_VEX_0F3A0A,
- PREFIX_VEX_0F3A0B,
- PREFIX_VEX_0F3A0C,
- PREFIX_VEX_0F3A0D,
- PREFIX_VEX_0F3A0E,
- PREFIX_VEX_0F3A0F,
- PREFIX_VEX_0F3A14,
- PREFIX_VEX_0F3A15,
- PREFIX_VEX_0F3A16,
- PREFIX_VEX_0F3A17,
- PREFIX_VEX_0F3A18,
- PREFIX_VEX_0F3A19,
- PREFIX_VEX_0F3A1D,
- PREFIX_VEX_0F3A20,
- PREFIX_VEX_0F3A21,
- PREFIX_VEX_0F3A22,
- PREFIX_VEX_0F3A30,
- PREFIX_VEX_0F3A31,
- PREFIX_VEX_0F3A32,
- PREFIX_VEX_0F3A33,
- PREFIX_VEX_0F3A38,
- PREFIX_VEX_0F3A39,
- PREFIX_VEX_0F3A40,
- PREFIX_VEX_0F3A41,
- PREFIX_VEX_0F3A42,
- PREFIX_VEX_0F3A44,
- PREFIX_VEX_0F3A46,
- PREFIX_VEX_0F3A48,
- PREFIX_VEX_0F3A49,
- PREFIX_VEX_0F3A4A,
- PREFIX_VEX_0F3A4B,
- PREFIX_VEX_0F3A4C,
- PREFIX_VEX_0F3A5C,
- PREFIX_VEX_0F3A5D,
- PREFIX_VEX_0F3A5E,
- PREFIX_VEX_0F3A5F,
- PREFIX_VEX_0F3A60,
- PREFIX_VEX_0F3A61,
- PREFIX_VEX_0F3A62,
- PREFIX_VEX_0F3A63,
- PREFIX_VEX_0F3A68,
- PREFIX_VEX_0F3A69,
- PREFIX_VEX_0F3A6A,
- PREFIX_VEX_0F3A6B,
- PREFIX_VEX_0F3A6C,
- PREFIX_VEX_0F3A6D,
- PREFIX_VEX_0F3A6E,
- PREFIX_VEX_0F3A6F,
- PREFIX_VEX_0F3A78,
- PREFIX_VEX_0F3A79,
- PREFIX_VEX_0F3A7A,
- PREFIX_VEX_0F3A7B,
- PREFIX_VEX_0F3A7C,
- PREFIX_VEX_0F3A7D,
- PREFIX_VEX_0F3A7E,
- PREFIX_VEX_0F3A7F,
- PREFIX_VEX_0F3ACE,
- PREFIX_VEX_0F3ACF,
- PREFIX_VEX_0F3ADF,
- PREFIX_VEX_0F3AF0,
-
- PREFIX_EVEX_0F10,
- PREFIX_EVEX_0F11,
- PREFIX_EVEX_0F12,
- PREFIX_EVEX_0F16,
- PREFIX_EVEX_0F2A,
- PREFIX_EVEX_0F2C,
- PREFIX_EVEX_0F2D,
- PREFIX_EVEX_0F2E,
- PREFIX_EVEX_0F2F,
- PREFIX_EVEX_0F51,
- PREFIX_EVEX_0F58,
- PREFIX_EVEX_0F59,
- PREFIX_EVEX_0F5A,
+ PREFIX_VEX_0F3849_X86_64,
+ PREFIX_VEX_0F384B_X86_64,
+ PREFIX_VEX_0F385C_X86_64,
+ PREFIX_VEX_0F385E_X86_64,
+ PREFIX_VEX_0F38F5_L_0,
+ PREFIX_VEX_0F38F6_L_0,
+ PREFIX_VEX_0F38F7_L_0,
+ PREFIX_VEX_0F3AF0_L_0,
+
PREFIX_EVEX_0F5B,
- PREFIX_EVEX_0F5C,
- PREFIX_EVEX_0F5D,
- PREFIX_EVEX_0F5E,
- PREFIX_EVEX_0F5F,
- PREFIX_EVEX_0F64,
- PREFIX_EVEX_0F65,
- PREFIX_EVEX_0F66,
- PREFIX_EVEX_0F6E,
PREFIX_EVEX_0F6F,
PREFIX_EVEX_0F70,
- PREFIX_EVEX_0F71_REG_2,
- PREFIX_EVEX_0F71_REG_4,
- PREFIX_EVEX_0F71_REG_6,
- PREFIX_EVEX_0F72_REG_0,
- PREFIX_EVEX_0F72_REG_1,
- PREFIX_EVEX_0F72_REG_2,
- PREFIX_EVEX_0F72_REG_4,
- PREFIX_EVEX_0F72_REG_6,
- PREFIX_EVEX_0F73_REG_2,
- PREFIX_EVEX_0F73_REG_3,
- PREFIX_EVEX_0F73_REG_6,
- PREFIX_EVEX_0F73_REG_7,
- PREFIX_EVEX_0F74,
- PREFIX_EVEX_0F75,
- PREFIX_EVEX_0F76,
PREFIX_EVEX_0F78,
PREFIX_EVEX_0F79,
PREFIX_EVEX_0F7A,
PREFIX_EVEX_0F7E,
PREFIX_EVEX_0F7F,
PREFIX_EVEX_0FC2,
- PREFIX_EVEX_0FC4,
- PREFIX_EVEX_0FC5,
- PREFIX_EVEX_0FD6,
- PREFIX_EVEX_0FDB,
- PREFIX_EVEX_0FDF,
- PREFIX_EVEX_0FE2,
PREFIX_EVEX_0FE6,
- PREFIX_EVEX_0FE7,
- PREFIX_EVEX_0FEB,
- PREFIX_EVEX_0FEF,
- PREFIX_EVEX_0F380D,
PREFIX_EVEX_0F3810,
PREFIX_EVEX_0F3811,
PREFIX_EVEX_0F3812,
PREFIX_EVEX_0F3813,
PREFIX_EVEX_0F3814,
PREFIX_EVEX_0F3815,
- PREFIX_EVEX_0F3816,
- PREFIX_EVEX_0F3819,
- PREFIX_EVEX_0F381A,
- PREFIX_EVEX_0F381B,
- PREFIX_EVEX_0F381E,
- PREFIX_EVEX_0F381F,
PREFIX_EVEX_0F3820,
PREFIX_EVEX_0F3821,
PREFIX_EVEX_0F3822,
PREFIX_EVEX_0F3828,
PREFIX_EVEX_0F3829,
PREFIX_EVEX_0F382A,
- PREFIX_EVEX_0F382C,
- PREFIX_EVEX_0F382D,
PREFIX_EVEX_0F3830,
PREFIX_EVEX_0F3831,
PREFIX_EVEX_0F3832,
PREFIX_EVEX_0F3833,
PREFIX_EVEX_0F3834,
PREFIX_EVEX_0F3835,
- PREFIX_EVEX_0F3836,
- PREFIX_EVEX_0F3837,
PREFIX_EVEX_0F3838,
PREFIX_EVEX_0F3839,
PREFIX_EVEX_0F383A,
- PREFIX_EVEX_0F383B,
- PREFIX_EVEX_0F383D,
- PREFIX_EVEX_0F383F,
- PREFIX_EVEX_0F3840,
- PREFIX_EVEX_0F3842,
- PREFIX_EVEX_0F3843,
- PREFIX_EVEX_0F3844,
- PREFIX_EVEX_0F3845,
- PREFIX_EVEX_0F3846,
- PREFIX_EVEX_0F3847,
- PREFIX_EVEX_0F384C,
- PREFIX_EVEX_0F384D,
- PREFIX_EVEX_0F384E,
- PREFIX_EVEX_0F384F,
- PREFIX_EVEX_0F3850,
- PREFIX_EVEX_0F3851,
PREFIX_EVEX_0F3852,
PREFIX_EVEX_0F3853,
- PREFIX_EVEX_0F3854,
- PREFIX_EVEX_0F3855,
- PREFIX_EVEX_0F3859,
- PREFIX_EVEX_0F385A,
- PREFIX_EVEX_0F385B,
- PREFIX_EVEX_0F3862,
- PREFIX_EVEX_0F3863,
- PREFIX_EVEX_0F3864,
- PREFIX_EVEX_0F3865,
- PREFIX_EVEX_0F3866,
PREFIX_EVEX_0F3868,
- PREFIX_EVEX_0F3870,
- PREFIX_EVEX_0F3871,
PREFIX_EVEX_0F3872,
- PREFIX_EVEX_0F3873,
- PREFIX_EVEX_0F3875,
- PREFIX_EVEX_0F3876,
- PREFIX_EVEX_0F3877,
- PREFIX_EVEX_0F387A,
- PREFIX_EVEX_0F387B,
- PREFIX_EVEX_0F387C,
- PREFIX_EVEX_0F387D,
- PREFIX_EVEX_0F387E,
- PREFIX_EVEX_0F387F,
- PREFIX_EVEX_0F3883,
- PREFIX_EVEX_0F3888,
- PREFIX_EVEX_0F3889,
- PREFIX_EVEX_0F388A,
- PREFIX_EVEX_0F388B,
- PREFIX_EVEX_0F388D,
- PREFIX_EVEX_0F388F,
- PREFIX_EVEX_0F3890,
- PREFIX_EVEX_0F3891,
- PREFIX_EVEX_0F3892,
- PREFIX_EVEX_0F3893,
PREFIX_EVEX_0F389A,
PREFIX_EVEX_0F389B,
- PREFIX_EVEX_0F38A0,
- PREFIX_EVEX_0F38A1,
- PREFIX_EVEX_0F38A2,
- PREFIX_EVEX_0F38A3,
PREFIX_EVEX_0F38AA,
PREFIX_EVEX_0F38AB,
- PREFIX_EVEX_0F38B4,
- PREFIX_EVEX_0F38B5,
- PREFIX_EVEX_0F38C4,
- PREFIX_EVEX_0F38C6_REG_1,
- PREFIX_EVEX_0F38C6_REG_2,
- PREFIX_EVEX_0F38C6_REG_5,
- PREFIX_EVEX_0F38C6_REG_6,
- PREFIX_EVEX_0F38C7_REG_1,
- PREFIX_EVEX_0F38C7_REG_2,
- PREFIX_EVEX_0F38C7_REG_5,
- PREFIX_EVEX_0F38C7_REG_6,
- PREFIX_EVEX_0F38C8,
- PREFIX_EVEX_0F38CA,
- PREFIX_EVEX_0F38CB,
- PREFIX_EVEX_0F38CC,
- PREFIX_EVEX_0F38CD,
-
- PREFIX_EVEX_0F3A00,
- PREFIX_EVEX_0F3A01,
- PREFIX_EVEX_0F3A03,
- PREFIX_EVEX_0F3A05,
+
PREFIX_EVEX_0F3A08,
- PREFIX_EVEX_0F3A09,
PREFIX_EVEX_0F3A0A,
- PREFIX_EVEX_0F3A0B,
- PREFIX_EVEX_0F3A14,
- PREFIX_EVEX_0F3A15,
- PREFIX_EVEX_0F3A16,
- PREFIX_EVEX_0F3A17,
- PREFIX_EVEX_0F3A18,
- PREFIX_EVEX_0F3A19,
- PREFIX_EVEX_0F3A1A,
- PREFIX_EVEX_0F3A1B,
- PREFIX_EVEX_0F3A1E,
- PREFIX_EVEX_0F3A1F,
- PREFIX_EVEX_0F3A20,
- PREFIX_EVEX_0F3A21,
- PREFIX_EVEX_0F3A22,
- PREFIX_EVEX_0F3A23,
- PREFIX_EVEX_0F3A25,
PREFIX_EVEX_0F3A26,
PREFIX_EVEX_0F3A27,
- PREFIX_EVEX_0F3A38,
- PREFIX_EVEX_0F3A39,
- PREFIX_EVEX_0F3A3A,
- PREFIX_EVEX_0F3A3B,
- PREFIX_EVEX_0F3A3E,
- PREFIX_EVEX_0F3A3F,
- PREFIX_EVEX_0F3A42,
- PREFIX_EVEX_0F3A43,
- PREFIX_EVEX_0F3A50,
- PREFIX_EVEX_0F3A51,
- PREFIX_EVEX_0F3A54,
- PREFIX_EVEX_0F3A55,
PREFIX_EVEX_0F3A56,
PREFIX_EVEX_0F3A57,
PREFIX_EVEX_0F3A66,
PREFIX_EVEX_0F3A67,
- PREFIX_EVEX_0F3A70,
- PREFIX_EVEX_0F3A71,
- PREFIX_EVEX_0F3A72,
- PREFIX_EVEX_0F3A73,
+ PREFIX_EVEX_0F3AC2,
+
+ PREFIX_EVEX_MAP5_10,
+ PREFIX_EVEX_MAP5_11,
+ PREFIX_EVEX_MAP5_1D,
+ PREFIX_EVEX_MAP5_2A,
+ PREFIX_EVEX_MAP5_2C,
+ PREFIX_EVEX_MAP5_2D,
+ PREFIX_EVEX_MAP5_2E,
+ PREFIX_EVEX_MAP5_2F,
+ PREFIX_EVEX_MAP5_51,
+ PREFIX_EVEX_MAP5_58,
+ PREFIX_EVEX_MAP5_59,
+ PREFIX_EVEX_MAP5_5A,
+ PREFIX_EVEX_MAP5_5B,
+ PREFIX_EVEX_MAP5_5C,
+ PREFIX_EVEX_MAP5_5D,
+ PREFIX_EVEX_MAP5_5E,
+ PREFIX_EVEX_MAP5_5F,
+ PREFIX_EVEX_MAP5_78,
+ PREFIX_EVEX_MAP5_79,
+ PREFIX_EVEX_MAP5_7A,
+ PREFIX_EVEX_MAP5_7B,
+ PREFIX_EVEX_MAP5_7C,
+ PREFIX_EVEX_MAP5_7D,
+
+ PREFIX_EVEX_MAP6_13,
+ PREFIX_EVEX_MAP6_56,
+ PREFIX_EVEX_MAP6_57,
+ PREFIX_EVEX_MAP6_D6,
+ PREFIX_EVEX_MAP6_D7,
};
enum
X86_64_EA,
X86_64_0F01_REG_0,
X86_64_0F01_REG_1,
+ X86_64_0F01_REG_1_RM_5_PREFIX_2,
+ X86_64_0F01_REG_1_RM_6_PREFIX_2,
+ X86_64_0F01_REG_1_RM_7_PREFIX_2,
X86_64_0F01_REG_2,
- X86_64_0F01_REG_3
+ X86_64_0F01_REG_3,
+ X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1,
+ X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1,
+ X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1,
+ X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1,
+ X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1,
+ X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3,
+ X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1,
+ X86_64_0F24,
+ X86_64_0F26,
+ X86_64_0FC7_REG_6_MOD_3_PREFIX_1,
+
+ X86_64_VEX_0F3849,
+ X86_64_VEX_0F384B,
+ X86_64_VEX_0F385C,
+ X86_64_VEX_0F385E
};
enum
{
EVEX_0F = 0,
EVEX_0F38,
- EVEX_0F3A
+ EVEX_0F3A,
+ EVEX_MAP5,
+ EVEX_MAP6,
};
enum
VEX_LEN_0F16_P_0_M_1,
#define VEX_LEN_0F16_P_2_M_0 VEX_LEN_0F16_P_0_M_0
VEX_LEN_0F17_M_0,
- VEX_LEN_0F41_P_0,
- VEX_LEN_0F41_P_2,
- VEX_LEN_0F42_P_0,
- VEX_LEN_0F42_P_2,
- VEX_LEN_0F44_P_0,
- VEX_LEN_0F44_P_2,
- VEX_LEN_0F45_P_0,
- VEX_LEN_0F45_P_2,
- VEX_LEN_0F46_P_0,
- VEX_LEN_0F46_P_2,
- VEX_LEN_0F47_P_0,
- VEX_LEN_0F47_P_2,
- VEX_LEN_0F4A_P_0,
- VEX_LEN_0F4A_P_2,
- VEX_LEN_0F4B_P_0,
- VEX_LEN_0F4B_P_2,
- VEX_LEN_0F6E_P_2,
- VEX_LEN_0F77_P_0,
+ VEX_LEN_0F41,
+ VEX_LEN_0F42,
+ VEX_LEN_0F44,
+ VEX_LEN_0F45,
+ VEX_LEN_0F46,
+ VEX_LEN_0F47,
+ VEX_LEN_0F4A,
+ VEX_LEN_0F4B,
+ VEX_LEN_0F6E,
+ VEX_LEN_0F77,
VEX_LEN_0F7E_P_1,
VEX_LEN_0F7E_P_2,
- VEX_LEN_0F90_P_0,
- VEX_LEN_0F90_P_2,
- VEX_LEN_0F91_P_0,
- VEX_LEN_0F91_P_2,
- VEX_LEN_0F92_P_0,
- VEX_LEN_0F92_P_2,
- VEX_LEN_0F92_P_3,
- VEX_LEN_0F93_P_0,
- VEX_LEN_0F93_P_2,
- VEX_LEN_0F93_P_3,
- VEX_LEN_0F98_P_0,
- VEX_LEN_0F98_P_2,
- VEX_LEN_0F99_P_0,
- VEX_LEN_0F99_P_2,
+ VEX_LEN_0F90,
+ VEX_LEN_0F91,
+ VEX_LEN_0F92,
+ VEX_LEN_0F93,
+ VEX_LEN_0F98,
+ VEX_LEN_0F99,
VEX_LEN_0FAE_R_2_M_0,
VEX_LEN_0FAE_R_3_M_0,
- VEX_LEN_0FC4_P_2,
- VEX_LEN_0FC5_P_2,
- VEX_LEN_0FD6_P_2,
- VEX_LEN_0FF7_P_2,
- VEX_LEN_0F3816_P_2,
- VEX_LEN_0F3819_P_2,
- VEX_LEN_0F381A_P_2_M_0,
- VEX_LEN_0F3836_P_2,
- VEX_LEN_0F3841_P_2,
- VEX_LEN_0F385A_P_2_M_0,
- VEX_LEN_0F38DB_P_2,
- VEX_LEN_0F38F2_P_0,
- VEX_LEN_0F38F3_R_1_P_0,
- VEX_LEN_0F38F3_R_2_P_0,
- VEX_LEN_0F38F3_R_3_P_0,
- VEX_LEN_0F38F5_P_0,
- VEX_LEN_0F38F5_P_1,
- VEX_LEN_0F38F5_P_3,
- VEX_LEN_0F38F6_P_3,
- VEX_LEN_0F38F7_P_0,
- VEX_LEN_0F38F7_P_1,
- VEX_LEN_0F38F7_P_2,
- VEX_LEN_0F38F7_P_3,
- VEX_LEN_0F3A00_P_2,
- VEX_LEN_0F3A01_P_2,
- VEX_LEN_0F3A06_P_2,
- VEX_LEN_0F3A14_P_2,
- VEX_LEN_0F3A15_P_2,
- VEX_LEN_0F3A16_P_2,
- VEX_LEN_0F3A17_P_2,
- VEX_LEN_0F3A18_P_2,
- VEX_LEN_0F3A19_P_2,
- VEX_LEN_0F3A20_P_2,
- VEX_LEN_0F3A21_P_2,
- VEX_LEN_0F3A22_P_2,
- VEX_LEN_0F3A30_P_2,
- VEX_LEN_0F3A31_P_2,
- VEX_LEN_0F3A32_P_2,
- VEX_LEN_0F3A33_P_2,
- VEX_LEN_0F3A38_P_2,
- VEX_LEN_0F3A39_P_2,
- VEX_LEN_0F3A41_P_2,
- VEX_LEN_0F3A46_P_2,
- VEX_LEN_0F3A60_P_2,
- VEX_LEN_0F3A61_P_2,
- VEX_LEN_0F3A62_P_2,
- VEX_LEN_0F3A63_P_2,
- VEX_LEN_0F3A6A_P_2,
- VEX_LEN_0F3A6B_P_2,
- VEX_LEN_0F3A6E_P_2,
- VEX_LEN_0F3A6F_P_2,
- VEX_LEN_0F3A7A_P_2,
- VEX_LEN_0F3A7B_P_2,
- VEX_LEN_0F3A7E_P_2,
- VEX_LEN_0F3A7F_P_2,
- VEX_LEN_0F3ADF_P_2,
- VEX_LEN_0F3AF0_P_3,
+ VEX_LEN_0FC4,
+ VEX_LEN_0FC5,
+ VEX_LEN_0FD6,
+ VEX_LEN_0FF7,
+ VEX_LEN_0F3816,
+ VEX_LEN_0F3819,
+ VEX_LEN_0F381A_M_0,
+ VEX_LEN_0F3836,
+ VEX_LEN_0F3841,
+ VEX_LEN_0F3849_X86_64_P_0_W_0_M_0,
+ VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0,
+ VEX_LEN_0F3849_X86_64_P_2_W_0_M_0,
+ VEX_LEN_0F3849_X86_64_P_3_W_0_M_0,
+ VEX_LEN_0F384B_X86_64_P_1_W_0_M_0,
+ VEX_LEN_0F384B_X86_64_P_2_W_0_M_0,
+ VEX_LEN_0F384B_X86_64_P_3_W_0_M_0,
+ VEX_LEN_0F385A_M_0,
+ VEX_LEN_0F385C_X86_64_P_1_W_0_M_0,
+ VEX_LEN_0F385E_X86_64_P_0_W_0_M_0,
+ VEX_LEN_0F385E_X86_64_P_1_W_0_M_0,
+ VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
+ VEX_LEN_0F385E_X86_64_P_3_W_0_M_0,
+ VEX_LEN_0F38DB,
+ VEX_LEN_0F38F2,
+ VEX_LEN_0F38F3,
+ VEX_LEN_0F38F5,
+ VEX_LEN_0F38F6,
+ VEX_LEN_0F38F7,
+ VEX_LEN_0F3A00,
+ VEX_LEN_0F3A01,
+ VEX_LEN_0F3A06,
+ VEX_LEN_0F3A14,
+ VEX_LEN_0F3A15,
+ VEX_LEN_0F3A16,
+ VEX_LEN_0F3A17,
+ VEX_LEN_0F3A18,
+ VEX_LEN_0F3A19,
+ VEX_LEN_0F3A20,
+ VEX_LEN_0F3A21,
+ VEX_LEN_0F3A22,
+ VEX_LEN_0F3A30,
+ VEX_LEN_0F3A31,
+ VEX_LEN_0F3A32,
+ VEX_LEN_0F3A33,
+ VEX_LEN_0F3A38,
+ VEX_LEN_0F3A39,
+ VEX_LEN_0F3A41,
+ VEX_LEN_0F3A46,
+ VEX_LEN_0F3A60,
+ VEX_LEN_0F3A61,
+ VEX_LEN_0F3A62,
+ VEX_LEN_0F3A63,
+ VEX_LEN_0F3ADF,
+ VEX_LEN_0F3AF0,
+ VEX_LEN_0FXOP_08_85,
+ VEX_LEN_0FXOP_08_86,
+ VEX_LEN_0FXOP_08_87,
+ VEX_LEN_0FXOP_08_8E,
+ VEX_LEN_0FXOP_08_8F,
+ VEX_LEN_0FXOP_08_95,
+ VEX_LEN_0FXOP_08_96,
+ VEX_LEN_0FXOP_08_97,
+ VEX_LEN_0FXOP_08_9E,
+ VEX_LEN_0FXOP_08_9F,
+ VEX_LEN_0FXOP_08_A3,
+ VEX_LEN_0FXOP_08_A6,
+ VEX_LEN_0FXOP_08_B6,
+ VEX_LEN_0FXOP_08_C0,
+ VEX_LEN_0FXOP_08_C1,
+ VEX_LEN_0FXOP_08_C2,
+ VEX_LEN_0FXOP_08_C3,
VEX_LEN_0FXOP_08_CC,
VEX_LEN_0FXOP_08_CD,
VEX_LEN_0FXOP_08_CE,
VEX_LEN_0FXOP_08_ED,
VEX_LEN_0FXOP_08_EE,
VEX_LEN_0FXOP_08_EF,
- VEX_LEN_0FXOP_09_80,
- VEX_LEN_0FXOP_09_81
+ VEX_LEN_0FXOP_09_01,
+ VEX_LEN_0FXOP_09_02,
+ VEX_LEN_0FXOP_09_12_M_1,
+ VEX_LEN_0FXOP_09_82_W_0,
+ VEX_LEN_0FXOP_09_83_W_0,
+ VEX_LEN_0FXOP_09_90,
+ VEX_LEN_0FXOP_09_91,
+ VEX_LEN_0FXOP_09_92,
+ VEX_LEN_0FXOP_09_93,
+ VEX_LEN_0FXOP_09_94,
+ VEX_LEN_0FXOP_09_95,
+ VEX_LEN_0FXOP_09_96,
+ VEX_LEN_0FXOP_09_97,
+ VEX_LEN_0FXOP_09_98,
+ VEX_LEN_0FXOP_09_99,
+ VEX_LEN_0FXOP_09_9A,
+ VEX_LEN_0FXOP_09_9B,
+ VEX_LEN_0FXOP_09_C1,
+ VEX_LEN_0FXOP_09_C2,
+ VEX_LEN_0FXOP_09_C3,
+ VEX_LEN_0FXOP_09_C6,
+ VEX_LEN_0FXOP_09_C7,
+ VEX_LEN_0FXOP_09_CB,
+ VEX_LEN_0FXOP_09_D1,
+ VEX_LEN_0FXOP_09_D2,
+ VEX_LEN_0FXOP_09_D3,
+ VEX_LEN_0FXOP_09_D6,
+ VEX_LEN_0FXOP_09_D7,
+ VEX_LEN_0FXOP_09_DB,
+ VEX_LEN_0FXOP_09_E1,
+ VEX_LEN_0FXOP_09_E2,
+ VEX_LEN_0FXOP_09_E3,
+ VEX_LEN_0FXOP_0A_12,
};
enum
{
- EVEX_LEN_0F6E_P_2 = 0,
- EVEX_LEN_0F7E_P_1,
- EVEX_LEN_0F7E_P_2,
- EVEX_LEN_0FC4_P_2,
- EVEX_LEN_0FC5_P_2,
- EVEX_LEN_0FD6_P_2,
- EVEX_LEN_0F3816_P_2,
- EVEX_LEN_0F3819_P_2_W_0,
- EVEX_LEN_0F3819_P_2_W_1,
- EVEX_LEN_0F381A_P_2_W_0,
- EVEX_LEN_0F381A_P_2_W_1,
- EVEX_LEN_0F381B_P_2_W_0,
- EVEX_LEN_0F381B_P_2_W_1,
- EVEX_LEN_0F3836_P_2,
- EVEX_LEN_0F385A_P_2_W_0,
- EVEX_LEN_0F385A_P_2_W_1,
- EVEX_LEN_0F385B_P_2_W_0,
- EVEX_LEN_0F385B_P_2_W_1,
- EVEX_LEN_0F38C6_REG_1_PREFIX_2,
- EVEX_LEN_0F38C6_REG_2_PREFIX_2,
- EVEX_LEN_0F38C6_REG_5_PREFIX_2,
- EVEX_LEN_0F38C6_REG_6_PREFIX_2,
- EVEX_LEN_0F38C7_R_1_P_2_W_0,
- EVEX_LEN_0F38C7_R_1_P_2_W_1,
- EVEX_LEN_0F38C7_R_2_P_2_W_0,
- EVEX_LEN_0F38C7_R_2_P_2_W_1,
- EVEX_LEN_0F38C7_R_5_P_2_W_0,
- EVEX_LEN_0F38C7_R_5_P_2_W_1,
- EVEX_LEN_0F38C7_R_6_P_2_W_0,
- EVEX_LEN_0F38C7_R_6_P_2_W_1,
- EVEX_LEN_0F3A00_P_2_W_1,
- EVEX_LEN_0F3A01_P_2_W_1,
- EVEX_LEN_0F3A14_P_2,
- EVEX_LEN_0F3A15_P_2,
- EVEX_LEN_0F3A16_P_2,
- EVEX_LEN_0F3A17_P_2,
- EVEX_LEN_0F3A18_P_2_W_0,
- EVEX_LEN_0F3A18_P_2_W_1,
- EVEX_LEN_0F3A19_P_2_W_0,
- EVEX_LEN_0F3A19_P_2_W_1,
- EVEX_LEN_0F3A1A_P_2_W_0,
- EVEX_LEN_0F3A1A_P_2_W_1,
- EVEX_LEN_0F3A1B_P_2_W_0,
- EVEX_LEN_0F3A1B_P_2_W_1,
- EVEX_LEN_0F3A20_P_2,
- EVEX_LEN_0F3A21_P_2_W_0,
- EVEX_LEN_0F3A22_P_2,
- EVEX_LEN_0F3A23_P_2_W_0,
- EVEX_LEN_0F3A23_P_2_W_1,
- EVEX_LEN_0F3A38_P_2_W_0,
- EVEX_LEN_0F3A38_P_2_W_1,
- EVEX_LEN_0F3A39_P_2_W_0,
- EVEX_LEN_0F3A39_P_2_W_1,
- EVEX_LEN_0F3A3A_P_2_W_0,
- EVEX_LEN_0F3A3A_P_2_W_1,
- EVEX_LEN_0F3A3B_P_2_W_0,
- EVEX_LEN_0F3A3B_P_2_W_1,
- EVEX_LEN_0F3A43_P_2_W_0,
- EVEX_LEN_0F3A43_P_2_W_1
+ EVEX_LEN_0F3816 = 0,
+ EVEX_LEN_0F3819,
+ EVEX_LEN_0F381A_M_0,
+ EVEX_LEN_0F381B_M_0,
+ EVEX_LEN_0F3836,
+ EVEX_LEN_0F385A_M_0,
+ EVEX_LEN_0F385B_M_0,
+ EVEX_LEN_0F38C6_M_0,
+ EVEX_LEN_0F38C7_M_0,
+ EVEX_LEN_0F3A00,
+ EVEX_LEN_0F3A01,
+ EVEX_LEN_0F3A18,
+ EVEX_LEN_0F3A19,
+ EVEX_LEN_0F3A1A,
+ EVEX_LEN_0F3A1B,
+ EVEX_LEN_0F3A23,
+ EVEX_LEN_0F3A38,
+ EVEX_LEN_0F3A39,
+ EVEX_LEN_0F3A3A,
+ EVEX_LEN_0F3A3B,
+ EVEX_LEN_0F3A43
};
enum
{
- VEX_W_0F41_P_0_LEN_1 = 0,
- VEX_W_0F41_P_2_LEN_1,
- VEX_W_0F42_P_0_LEN_1,
- VEX_W_0F42_P_2_LEN_1,
- VEX_W_0F44_P_0_LEN_0,
- VEX_W_0F44_P_2_LEN_0,
- VEX_W_0F45_P_0_LEN_1,
- VEX_W_0F45_P_2_LEN_1,
- VEX_W_0F46_P_0_LEN_1,
- VEX_W_0F46_P_2_LEN_1,
- VEX_W_0F47_P_0_LEN_1,
- VEX_W_0F47_P_2_LEN_1,
- VEX_W_0F4A_P_0_LEN_1,
- VEX_W_0F4A_P_2_LEN_1,
- VEX_W_0F4B_P_0_LEN_1,
- VEX_W_0F4B_P_2_LEN_1,
- VEX_W_0F90_P_0_LEN_0,
- VEX_W_0F90_P_2_LEN_0,
- VEX_W_0F91_P_0_LEN_0,
- VEX_W_0F91_P_2_LEN_0,
- VEX_W_0F92_P_0_LEN_0,
- VEX_W_0F92_P_2_LEN_0,
- VEX_W_0F93_P_0_LEN_0,
- VEX_W_0F93_P_2_LEN_0,
- VEX_W_0F98_P_0_LEN_0,
- VEX_W_0F98_P_2_LEN_0,
- VEX_W_0F99_P_0_LEN_0,
- VEX_W_0F99_P_2_LEN_0,
- VEX_W_0F380C_P_2,
- VEX_W_0F380D_P_2,
- VEX_W_0F380E_P_2,
- VEX_W_0F380F_P_2,
- VEX_W_0F3813_P_2,
- VEX_W_0F3816_P_2,
- VEX_W_0F3818_P_2,
- VEX_W_0F3819_P_2,
- VEX_W_0F381A_P_2_M_0,
- VEX_W_0F382C_P_2_M_0,
- VEX_W_0F382D_P_2_M_0,
- VEX_W_0F382E_P_2_M_0,
- VEX_W_0F382F_P_2_M_0,
- VEX_W_0F3836_P_2,
- VEX_W_0F3846_P_2,
- VEX_W_0F3858_P_2,
- VEX_W_0F3859_P_2,
- VEX_W_0F385A_P_2_M_0,
- VEX_W_0F3878_P_2,
- VEX_W_0F3879_P_2,
- VEX_W_0F38CF_P_2,
- VEX_W_0F3A00_P_2,
- VEX_W_0F3A01_P_2,
- VEX_W_0F3A02_P_2,
- VEX_W_0F3A04_P_2,
- VEX_W_0F3A05_P_2,
- VEX_W_0F3A06_P_2,
- VEX_W_0F3A18_P_2,
- VEX_W_0F3A19_P_2,
- VEX_W_0F3A1D_P_2,
- VEX_W_0F3A30_P_2_LEN_0,
- VEX_W_0F3A31_P_2_LEN_0,
- VEX_W_0F3A32_P_2_LEN_0,
- VEX_W_0F3A33_P_2_LEN_0,
- VEX_W_0F3A38_P_2,
- VEX_W_0F3A39_P_2,
- VEX_W_0F3A46_P_2,
- VEX_W_0F3A48_P_2,
- VEX_W_0F3A49_P_2,
- VEX_W_0F3A4A_P_2,
- VEX_W_0F3A4B_P_2,
- VEX_W_0F3A4C_P_2,
- VEX_W_0F3ACE_P_2,
- VEX_W_0F3ACF_P_2,
-
- EVEX_W_0F10_P_1,
- EVEX_W_0F10_P_3,
- EVEX_W_0F11_P_1,
- EVEX_W_0F11_P_3,
- EVEX_W_0F12_P_0_M_1,
- EVEX_W_0F12_P_1,
- EVEX_W_0F12_P_3,
- EVEX_W_0F16_P_0_M_1,
- EVEX_W_0F16_P_1,
- EVEX_W_0F2A_P_3,
- EVEX_W_0F51_P_1,
- EVEX_W_0F51_P_3,
- EVEX_W_0F58_P_1,
- EVEX_W_0F58_P_3,
- EVEX_W_0F59_P_1,
- EVEX_W_0F59_P_3,
- EVEX_W_0F5A_P_0,
- EVEX_W_0F5A_P_1,
- EVEX_W_0F5A_P_2,
- EVEX_W_0F5A_P_3,
+ VEX_W_0F41_L_1_M_1 = 0,
+ VEX_W_0F42_L_1_M_1,
+ VEX_W_0F44_L_0_M_1,
+ VEX_W_0F45_L_1_M_1,
+ VEX_W_0F46_L_1_M_1,
+ VEX_W_0F47_L_1_M_1,
+ VEX_W_0F4A_L_1_M_1,
+ VEX_W_0F4B_L_1_M_1,
+ VEX_W_0F90_L_0,
+ VEX_W_0F91_L_0_M_0,
+ VEX_W_0F92_L_0_M_1,
+ VEX_W_0F93_L_0_M_1,
+ VEX_W_0F98_L_0_M_1,
+ VEX_W_0F99_L_0_M_1,
+ VEX_W_0F380C,
+ VEX_W_0F380D,
+ VEX_W_0F380E,
+ VEX_W_0F380F,
+ VEX_W_0F3813,
+ VEX_W_0F3816_L_1,
+ VEX_W_0F3818,
+ VEX_W_0F3819_L_1,
+ VEX_W_0F381A_M_0_L_1,
+ VEX_W_0F382C_M_0,
+ VEX_W_0F382D_M_0,
+ VEX_W_0F382E_M_0,
+ VEX_W_0F382F_M_0,
+ VEX_W_0F3836,
+ VEX_W_0F3846,
+ VEX_W_0F3849_X86_64_P_0,
+ VEX_W_0F3849_X86_64_P_2,
+ VEX_W_0F3849_X86_64_P_3,
+ VEX_W_0F384B_X86_64_P_1,
+ VEX_W_0F384B_X86_64_P_2,
+ VEX_W_0F384B_X86_64_P_3,
+ VEX_W_0F3850,
+ VEX_W_0F3851,
+ VEX_W_0F3852,
+ VEX_W_0F3853,
+ VEX_W_0F3858,
+ VEX_W_0F3859,
+ VEX_W_0F385A_M_0_L_0,
+ VEX_W_0F385C_X86_64_P_1,
+ VEX_W_0F385E_X86_64_P_0,
+ VEX_W_0F385E_X86_64_P_1,
+ VEX_W_0F385E_X86_64_P_2,
+ VEX_W_0F385E_X86_64_P_3,
+ VEX_W_0F3878,
+ VEX_W_0F3879,
+ VEX_W_0F38CF,
+ VEX_W_0F3A00_L_1,
+ VEX_W_0F3A01_L_1,
+ VEX_W_0F3A02,
+ VEX_W_0F3A04,
+ VEX_W_0F3A05,
+ VEX_W_0F3A06_L_1,
+ VEX_W_0F3A18_L_1,
+ VEX_W_0F3A19_L_1,
+ VEX_W_0F3A1D,
+ VEX_W_0F3A38_L_1,
+ VEX_W_0F3A39_L_1,
+ VEX_W_0F3A46_L_1,
+ VEX_W_0F3A4A,
+ VEX_W_0F3A4B,
+ VEX_W_0F3A4C,
+ VEX_W_0F3ACE,
+ VEX_W_0F3ACF,
+
+ VEX_W_0FXOP_08_85_L_0,
+ VEX_W_0FXOP_08_86_L_0,
+ VEX_W_0FXOP_08_87_L_0,
+ VEX_W_0FXOP_08_8E_L_0,
+ VEX_W_0FXOP_08_8F_L_0,
+ VEX_W_0FXOP_08_95_L_0,
+ VEX_W_0FXOP_08_96_L_0,
+ VEX_W_0FXOP_08_97_L_0,
+ VEX_W_0FXOP_08_9E_L_0,
+ VEX_W_0FXOP_08_9F_L_0,
+ VEX_W_0FXOP_08_A6_L_0,
+ VEX_W_0FXOP_08_B6_L_0,
+ VEX_W_0FXOP_08_C0_L_0,
+ VEX_W_0FXOP_08_C1_L_0,
+ VEX_W_0FXOP_08_C2_L_0,
+ VEX_W_0FXOP_08_C3_L_0,
+ VEX_W_0FXOP_08_CC_L_0,
+ VEX_W_0FXOP_08_CD_L_0,
+ VEX_W_0FXOP_08_CE_L_0,
+ VEX_W_0FXOP_08_CF_L_0,
+ VEX_W_0FXOP_08_EC_L_0,
+ VEX_W_0FXOP_08_ED_L_0,
+ VEX_W_0FXOP_08_EE_L_0,
+ VEX_W_0FXOP_08_EF_L_0,
+
+ VEX_W_0FXOP_09_80,
+ VEX_W_0FXOP_09_81,
+ VEX_W_0FXOP_09_82,
+ VEX_W_0FXOP_09_83,
+ VEX_W_0FXOP_09_C1_L_0,
+ VEX_W_0FXOP_09_C2_L_0,
+ VEX_W_0FXOP_09_C3_L_0,
+ VEX_W_0FXOP_09_C6_L_0,
+ VEX_W_0FXOP_09_C7_L_0,
+ VEX_W_0FXOP_09_CB_L_0,
+ VEX_W_0FXOP_09_D1_L_0,
+ VEX_W_0FXOP_09_D2_L_0,
+ VEX_W_0FXOP_09_D3_L_0,
+ VEX_W_0FXOP_09_D6_L_0,
+ VEX_W_0FXOP_09_D7_L_0,
+ VEX_W_0FXOP_09_DB_L_0,
+ VEX_W_0FXOP_09_E1_L_0,
+ VEX_W_0FXOP_09_E2_L_0,
+ VEX_W_0FXOP_09_E3_L_0,
+
EVEX_W_0F5B_P_0,
- EVEX_W_0F5B_P_1,
- EVEX_W_0F5B_P_2,
- EVEX_W_0F5C_P_1,
- EVEX_W_0F5C_P_3,
- EVEX_W_0F5D_P_1,
- EVEX_W_0F5D_P_3,
- EVEX_W_0F5E_P_1,
- EVEX_W_0F5E_P_3,
- EVEX_W_0F5F_P_1,
- EVEX_W_0F5F_P_3,
EVEX_W_0F62,
- EVEX_W_0F66_P_2,
+ EVEX_W_0F66,
EVEX_W_0F6A,
EVEX_W_0F6B,
EVEX_W_0F6C,
EVEX_W_0F6F_P_2,
EVEX_W_0F6F_P_3,
EVEX_W_0F70_P_2,
- EVEX_W_0F72_R_2_P_2,
- EVEX_W_0F72_R_6_P_2,
- EVEX_W_0F73_R_2_P_2,
- EVEX_W_0F73_R_6_P_2,
- EVEX_W_0F76_P_2,
+ EVEX_W_0F72_R_2,
+ EVEX_W_0F72_R_6,
+ EVEX_W_0F73_R_2,
+ EVEX_W_0F73_R_6,
+ EVEX_W_0F76,
EVEX_W_0F78_P_0,
EVEX_W_0F78_P_2,
EVEX_W_0F79_P_0,
EVEX_W_0F7A_P_2,
EVEX_W_0F7A_P_3,
EVEX_W_0F7B_P_2,
- EVEX_W_0F7B_P_3,
EVEX_W_0F7E_P_1,
EVEX_W_0F7F_P_1,
EVEX_W_0F7F_P_2,
EVEX_W_0F7F_P_3,
- EVEX_W_0FC2_P_1,
- EVEX_W_0FC2_P_3,
EVEX_W_0FD2,
EVEX_W_0FD3,
EVEX_W_0FD4,
- EVEX_W_0FD6_P_2,
+ EVEX_W_0FD6,
EVEX_W_0FE6_P_1,
- EVEX_W_0FE6_P_2,
- EVEX_W_0FE6_P_3,
- EVEX_W_0FE7_P_2,
+ EVEX_W_0FE7,
EVEX_W_0FF2,
EVEX_W_0FF3,
EVEX_W_0FF4,
EVEX_W_0FFA,
EVEX_W_0FFB,
EVEX_W_0FFE,
- EVEX_W_0F380D_P_2,
+
EVEX_W_0F3810_P_1,
EVEX_W_0F3810_P_2,
EVEX_W_0F3811_P_1,
EVEX_W_0F3812_P_1,
EVEX_W_0F3812_P_2,
EVEX_W_0F3813_P_1,
- EVEX_W_0F3813_P_2,
EVEX_W_0F3814_P_1,
EVEX_W_0F3815_P_1,
- EVEX_W_0F3819_P_2,
- EVEX_W_0F381A_P_2,
- EVEX_W_0F381B_P_2,
- EVEX_W_0F381E_P_2,
- EVEX_W_0F381F_P_2,
+ EVEX_W_0F3819_L_n,
+ EVEX_W_0F381A_M_0_L_n,
+ EVEX_W_0F381B_M_0_L_2,
+ EVEX_W_0F381E,
+ EVEX_W_0F381F,
EVEX_W_0F3820_P_1,
EVEX_W_0F3821_P_1,
EVEX_W_0F3822_P_1,
EVEX_W_0F3824_P_1,
EVEX_W_0F3825_P_1,
EVEX_W_0F3825_P_2,
- EVEX_W_0F3826_P_1,
- EVEX_W_0F3826_P_2,
- EVEX_W_0F3828_P_1,
EVEX_W_0F3828_P_2,
- EVEX_W_0F3829_P_1,
EVEX_W_0F3829_P_2,
EVEX_W_0F382A_P_1,
EVEX_W_0F382A_P_2,
EVEX_W_0F3834_P_1,
EVEX_W_0F3835_P_1,
EVEX_W_0F3835_P_2,
- EVEX_W_0F3837_P_2,
- EVEX_W_0F3838_P_1,
- EVEX_W_0F3839_P_1,
+ EVEX_W_0F3837,
EVEX_W_0F383A_P_1,
- EVEX_W_0F3840_P_2,
- EVEX_W_0F3852_P_1,
- EVEX_W_0F3854_P_2,
- EVEX_W_0F3855_P_2,
- EVEX_W_0F3859_P_2,
- EVEX_W_0F385A_P_2,
- EVEX_W_0F385B_P_2,
- EVEX_W_0F3862_P_2,
- EVEX_W_0F3863_P_2,
- EVEX_W_0F3866_P_2,
- EVEX_W_0F3868_P_3,
- EVEX_W_0F3870_P_2,
- EVEX_W_0F3871_P_2,
- EVEX_W_0F3872_P_1,
+ EVEX_W_0F3859,
+ EVEX_W_0F385A_M_0_L_n,
+ EVEX_W_0F385B_M_0_L_2,
+ EVEX_W_0F3870,
EVEX_W_0F3872_P_2,
- EVEX_W_0F3872_P_3,
- EVEX_W_0F3873_P_2,
- EVEX_W_0F3875_P_2,
- EVEX_W_0F387A_P_2,
- EVEX_W_0F387B_P_2,
- EVEX_W_0F387D_P_2,
- EVEX_W_0F3883_P_2,
- EVEX_W_0F388D_P_2,
- EVEX_W_0F3891_P_2,
- EVEX_W_0F3893_P_2,
- EVEX_W_0F38A1_P_2,
- EVEX_W_0F38A3_P_2,
- EVEX_W_0F38C7_R_1_P_2,
- EVEX_W_0F38C7_R_2_P_2,
- EVEX_W_0F38C7_R_5_P_2,
- EVEX_W_0F38C7_R_6_P_2,
-
- EVEX_W_0F3A00_P_2,
- EVEX_W_0F3A01_P_2,
- EVEX_W_0F3A05_P_2,
- EVEX_W_0F3A08_P_2,
- EVEX_W_0F3A09_P_2,
- EVEX_W_0F3A0A_P_2,
- EVEX_W_0F3A0B_P_2,
- EVEX_W_0F3A18_P_2,
- EVEX_W_0F3A19_P_2,
- EVEX_W_0F3A1A_P_2,
- EVEX_W_0F3A1B_P_2,
- EVEX_W_0F3A21_P_2,
- EVEX_W_0F3A23_P_2,
- EVEX_W_0F3A38_P_2,
- EVEX_W_0F3A39_P_2,
- EVEX_W_0F3A3A_P_2,
- EVEX_W_0F3A3B_P_2,
- EVEX_W_0F3A3E_P_2,
- EVEX_W_0F3A3F_P_2,
- EVEX_W_0F3A42_P_2,
- EVEX_W_0F3A43_P_2,
- EVEX_W_0F3A50_P_2,
- EVEX_W_0F3A51_P_2,
- EVEX_W_0F3A56_P_2,
- EVEX_W_0F3A57_P_2,
- EVEX_W_0F3A66_P_2,
- EVEX_W_0F3A67_P_2,
- EVEX_W_0F3A70_P_2,
- EVEX_W_0F3A71_P_2,
- EVEX_W_0F3A72_P_2,
- EVEX_W_0F3A73_P_2,
+ EVEX_W_0F387A,
+ EVEX_W_0F387B,
+ EVEX_W_0F3883,
+
+ EVEX_W_0F3A18_L_n,
+ EVEX_W_0F3A19_L_n,
+ EVEX_W_0F3A1A_L_2,
+ EVEX_W_0F3A1B_L_2,
+ EVEX_W_0F3A21,
+ EVEX_W_0F3A23_L_n,
+ EVEX_W_0F3A38_L_n,
+ EVEX_W_0F3A39_L_n,
+ EVEX_W_0F3A3A_L_2,
+ EVEX_W_0F3A3B_L_2,
+ EVEX_W_0F3A42,
+ EVEX_W_0F3A43_L_n,
+ EVEX_W_0F3A70,
+ EVEX_W_0F3A72,
+
+ EVEX_W_MAP5_5B_P_0,
+ EVEX_W_MAP5_7A_P_3,
};
-typedef void (*op_rtn) (int bytemode, int sizeflag);
+typedef void (*op_rtn) (instr_info *ins, int bytemode, int sizeflag);
struct dis386 {
const char *name;
'I' unused.
'J' unused.
'K' => print 'd' or 'q' if rex prefix is present.
- 'L' => print 'l' if suffix_always is true
+ 'L' unused.
'M' => print 'r' if intel_mnemonic is false.
'N' => print 'n' if instruction has no wait "prefix"
'O' => print 'd' or 'o' (or 'q' in Intel mode)
- 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
- or suffix_always is true. print 'q' if rex prefix is present.
+ 'P' => behave as 'T' except with register operand outside of suffix_always
+ mode
'Q' => print 'w', 'l' or 'q' for memory operand or suffix_always
is true
'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
'S' => print 'w', 'l' or 'q' if suffix_always is true
- 'T' => print 'q' in 64bit mode if instruction has no operand size
- prefix and behave as 'P' otherwise
- 'U' => print 'q' in 64bit mode if instruction has no operand size
- prefix and behave as 'Q' otherwise
- 'V' => print 'q' in 64bit mode if instruction has no operand size
- prefix and behave as 'S' otherwise
+ 'T' => print 'w', 'l'/'d', or 'q' if instruction has an operand size
+ prefix or if suffix_always is true.
+ 'U' unused.
+ 'V' unused.
'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
'X' => print 's', 'd' depending on data16 prefix (for XMM)
'Y' unused.
- 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
+ 'Z' => print 'q' in 64bit mode and 'l' otherwise, if suffix_always is true.
'!' => change condition from true to false or from false to true.
'%' => add 1 upper case letter to the macro.
'^' => print 'w', 'l', or 'q' (Intel64 ISA only) depending on operand size
prefix or suffix_always is true (lcall/ljmp).
- '@' => print 'q' for Intel64 ISA, 'w' or 'q' for AMD64 ISA depending
- on operand size prefix.
- '&' => print 'q' in 64bit mode for Intel64 ISA or if instruction
- has no operand size prefix for AMD64 ISA, behave as 'P'
- otherwise
+ '@' => in 64bit mode for Intel64 ISA or if instruction
+ has no operand sizing prefix, print 'q' if suffix_always is true or
+ nothing otherwise; behave as 'P' in all other cases
2 upper case letter macros:
"XY" => print 'x' or 'y' if suffix_always is true or no register
"XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
register operands and no broadcast.
"XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
- "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory
- operand or no operand at all in 64bit mode, or if suffix_always
+ "XD" => print 'd' if !EVEX or EVEX.W=1, EVEX.W=0 is not a valid encoding
+ "XH" => print 'h' if EVEX.W=0, EVEX.W=1 is not a valid encoding (for FP16)
+ "XS" => print 's' if !EVEX or EVEX.W=0, EVEX.W=1 is not a valid encoding
+ "XV" => print "{vex3}" pseudo prefix
+ "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
+ being false, or no operand at all in 64bit mode, or if suffix_always
is true.
"LB" => print "abs" in 64bit mode and behave as 'B' otherwise
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
- "LW" => print 'd', 'q' depending on the VEX.W bit
+ "DQ" => print 'd' or 'q' depending on the VEX.W bit
+ "BW" => print 'b' or 'w' depending on the VEX.W bit
"LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
an operand size prefix, or suffix_always is true. print
'q' if rex prefix is present.
{ "dec{S|}", { RMeSI }, 0 },
{ "dec{S|}", { RMeDI }, 0 },
/* 50 */
- { "pushV", { RMrAX }, 0 },
- { "pushV", { RMrCX }, 0 },
- { "pushV", { RMrDX }, 0 },
- { "pushV", { RMrBX }, 0 },
- { "pushV", { RMrSP }, 0 },
- { "pushV", { RMrBP }, 0 },
- { "pushV", { RMrSI }, 0 },
- { "pushV", { RMrDI }, 0 },
+ { "push{!P|}", { RMrAX }, 0 },
+ { "push{!P|}", { RMrCX }, 0 },
+ { "push{!P|}", { RMrDX }, 0 },
+ { "push{!P|}", { RMrBX }, 0 },
+ { "push{!P|}", { RMrSP }, 0 },
+ { "push{!P|}", { RMrBP }, 0 },
+ { "push{!P|}", { RMrSI }, 0 },
+ { "push{!P|}", { RMrDI }, 0 },
/* 58 */
- { "popV", { RMrAX }, 0 },
- { "popV", { RMrCX }, 0 },
- { "popV", { RMrDX }, 0 },
- { "popV", { RMrBX }, 0 },
- { "popV", { RMrSP }, 0 },
- { "popV", { RMrBP }, 0 },
- { "popV", { RMrSI }, 0 },
- { "popV", { RMrDI }, 0 },
+ { "pop{!P|}", { RMrAX }, 0 },
+ { "pop{!P|}", { RMrCX }, 0 },
+ { "pop{!P|}", { RMrDX }, 0 },
+ { "pop{!P|}", { RMrBX }, 0 },
+ { "pop{!P|}", { RMrSP }, 0 },
+ { "pop{!P|}", { RMrBP }, 0 },
+ { "pop{!P|}", { RMrSI }, 0 },
+ { "pop{!P|}", { RMrDI }, 0 },
/* 60 */
{ X86_64_TABLE (X86_64_60) },
{ X86_64_TABLE (X86_64_61) },
{ Bad_Opcode }, /* op size prefix */
{ Bad_Opcode }, /* adr size prefix */
/* 68 */
- { "pushT", { sIv }, 0 },
+ { "pushP", { sIv }, 0 },
{ "imulS", { Gv, Ev, Iv }, 0 },
- { "pushT", { sIbT }, 0 },
+ { "pushP", { sIbT }, 0 },
{ "imulS", { Gv, Ev, sIb }, 0 },
{ "ins{b|}", { Ybr, indirDX }, 0 },
{ X86_64_TABLE (X86_64_6D) },
{ "cR{t|}O", { XX }, 0 },
{ X86_64_TABLE (X86_64_9A) },
{ Bad_Opcode }, /* fwait */
- { "pushfT", { XX }, 0 },
- { "popfT", { XX }, 0 },
+ { "pushfP", { XX }, 0 },
+ { "popfP", { XX }, 0 },
{ "sahf", { XX }, 0 },
{ "lahf", { XX }, 0 },
/* a0 */
{ REG_TABLE (REG_C6) },
{ REG_TABLE (REG_C7) },
/* c8 */
- { "enterT", { Iw, Ib }, 0 },
- { "leaveT", { XX }, 0 },
- { "{l|}ret{|f}P", { Iw }, 0 },
- { "{l|}ret{|f}P", { XX }, 0 },
+ { "enterP", { Iw, Ib }, 0 },
+ { "leaveP", { XX }, 0 },
+ { "{l|}ret{|f}%LP", { Iw }, 0 },
+ { "{l|}ret{|f}%LP", { XX }, 0 },
{ "int3", { XX }, 0 },
{ "int", { Ib }, 0 },
{ X86_64_TABLE (X86_64_CE) },
{ "outG", { indirDX, zAX }, 0 },
/* f0 */
{ Bad_Opcode }, /* lock prefix */
- { "icebp", { XX }, 0 },
+ { "int1", { XX }, 0 },
{ Bad_Opcode }, /* repne */
{ Bad_Opcode }, /* repz */
{ "hlt", { XX }, 0 },
{ PREFIX_TABLE (PREFIX_0F1E) },
{ "nopQ", { Ev }, 0 },
/* 20 */
- { "movZ", { Rm, Cm }, 0 },
- { "movZ", { Rm, Dm }, 0 },
- { "movZ", { Cm, Rm }, 0 },
- { "movZ", { Dm, Rm }, 0 },
- { MOD_TABLE (MOD_0F24) },
+ { "movZ", { Em, Cm }, 0 },
+ { "movZ", { Em, Dm }, 0 },
+ { "movZ", { Cm, Em }, 0 },
+ { "movZ", { Dm, Em }, 0 },
+ { X86_64_TABLE (X86_64_0F24) },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F26) },
+ { X86_64_TABLE (X86_64_0F26) },
{ Bad_Opcode },
/* 28 */
{ "movapX", { XM, EXx }, PREFIX_OPCODE },
{ "rdmsr", { XX }, 0 },
{ "rdpmc", { XX }, 0 },
{ "sysenter", { SEP }, 0 },
- { "sysexit", { SEP }, 0 },
+ { "sysexit%LQ", { SEP }, 0 },
{ Bad_Opcode },
{ "getsec", { XX }, 0 },
/* 38 */
{ "punpckhwd", { MX, EM }, PREFIX_OPCODE },
{ "punpckhdq", { MX, EM }, PREFIX_OPCODE },
{ "packssdw", { MX, EM }, PREFIX_OPCODE },
- { PREFIX_TABLE (PREFIX_0F6C) },
- { PREFIX_TABLE (PREFIX_0F6D) },
+ { "punpcklqdq", { XM, EXx }, PREFIX_DATA },
+ { "punpckhqdq", { XM, EXx }, PREFIX_DATA },
{ "movK", { MX, Edq }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_0F6F) },
/* 70 */
{ PREFIX_TABLE (PREFIX_0F70) },
- { REG_TABLE (REG_0F71) },
- { REG_TABLE (REG_0F72) },
- { REG_TABLE (REG_0F73) },
+ { MOD_TABLE (MOD_0F71) },
+ { MOD_TABLE (MOD_0F72) },
+ { MOD_TABLE (MOD_0F73) },
{ "pcmpeqb", { MX, EM }, PREFIX_OPCODE },
{ "pcmpeqw", { MX, EM }, PREFIX_OPCODE },
{ "pcmpeqd", { MX, EM }, PREFIX_OPCODE },
{ "setle", { Eb }, 0 },
{ "setg", { Eb }, 0 },
/* a0 */
- { "pushT", { fs }, 0 },
- { "popT", { fs }, 0 },
+ { "pushP", { fs }, 0 },
+ { "popP", { fs }, 0 },
{ "cpuid", { XX }, 0 },
{ "btS", { Ev, Gv }, 0 },
{ "shldS", { Ev, Gv, Ib }, 0 },
{ REG_TABLE (REG_0FA6) },
{ REG_TABLE (REG_0FA7) },
/* a8 */
- { "pushT", { gs }, 0 },
- { "popT", { gs }, 0 },
+ { "pushP", { gs }, 0 },
+ { "popP", { gs }, 0 },
{ "rsm", { XX }, 0 },
{ "btsS", { Evh1, Gv }, 0 },
{ "shrdS", { Ev, Gv, Ib }, 0 },
{ "xaddS", { Evh1, Gv }, 0 },
{ PREFIX_TABLE (PREFIX_0FC2) },
{ MOD_TABLE (MOD_0FC3) },
- { "pinsrw", { MX, Edqw, Ib }, PREFIX_OPCODE },
- { "pextrw", { Gdq, MS, Ib }, PREFIX_OPCODE },
+ { "pinsrw", { MX, Edw, Ib }, PREFIX_OPCODE },
+ { "pextrw", { Gd, MS, Ib }, PREFIX_OPCODE },
{ "shufpX", { XM, EXx, Ib }, PREFIX_OPCODE },
{ REG_TABLE (REG_0FC7) },
/* c8 */
{ "ud0S", { Gv, Ev }, 0 },
};
-static const unsigned char onebyte_has_modrm[256] = {
+static const bool onebyte_has_modrm[256] = {
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
/* ------------------------------- */
/* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
};
-static const unsigned char twobyte_has_modrm[256] = {
+static const bool twobyte_has_modrm[256] = {
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
/* ------------------------------- */
/* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
};
-static char obuf[100];
-static char *obufp;
-static char *mnemonicendp;
-static char scratchbuf[100];
-static unsigned char *start_codep;
-static unsigned char *insn_codep;
-static unsigned char *codep;
-static unsigned char *end_codep;
-static int last_lock_prefix;
-static int last_repz_prefix;
-static int last_repnz_prefix;
-static int last_data_prefix;
-static int last_addr_prefix;
-static int last_rex_prefix;
-static int last_seg_prefix;
-static int fwait_prefix;
-/* The active segment register prefix. */
-static int active_seg_prefix;
-#define MAX_CODE_LENGTH 15
-/* We can up to 14 prefixes since the maximum instruction length is
- 15bytes. */
-static int all_prefixes[MAX_CODE_LENGTH - 1];
-static disassemble_info *the_info;
-static struct
- {
- int mod;
- int reg;
- int rm;
- }
-modrm;
-static unsigned char need_modrm;
-static struct
- {
- int scale;
- int index;
- int base;
- }
-sib;
-static struct
- {
- int register_specifier;
- int length;
- int prefix;
- int w;
- int evex;
- int r;
- int v;
- int mask_register_specifier;
- int zeroing;
- int ll;
- int b;
- }
-vex;
-static unsigned char need_vex;
-static unsigned char need_vex_reg;
-static unsigned char vex_w_done;
struct op
{
/* If we are accessing mod/rm/reg without need_modrm set, then the
values are stale. Hitting this abort likely indicates that you
need to update onebyte_has_modrm or twobyte_has_modrm. */
-#define MODRM_CHECK if (!need_modrm) abort ()
-
-static const char **names64;
-static const char **names32;
-static const char **names16;
-static const char **names8;
-static const char **names8rex;
-static const char **names_seg;
-static const char *index64;
-static const char *index32;
-static const char **index16;
-static const char **names_bnd;
-
-static const char *intel_names64[] = {
- "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
-};
-static const char *intel_names32[] = {
- "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
- "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
-};
-static const char *intel_names16[] = {
- "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
- "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
-};
-static const char *intel_names8[] = {
- "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
-};
-static const char *intel_names8rex[] = {
- "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
- "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
-};
-static const char *intel_names_seg[] = {
- "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
-};
-static const char *intel_index64 = "riz";
-static const char *intel_index32 = "eiz";
-static const char *intel_index16[] = {
+#define MODRM_CHECK if (!ins->need_modrm) abort ()
+
+static const char *const intel_index16[] = {
"bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
};
-static const char *att_names64[] = {
+static const char *const att_names64[] = {
"%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
};
-static const char *att_names32[] = {
+static const char *const att_names32[] = {
"%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
"%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
};
-static const char *att_names16[] = {
+static const char *const att_names16[] = {
"%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
"%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
};
-static const char *att_names8[] = {
+static const char *const att_names8[] = {
"%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
};
-static const char *att_names8rex[] = {
+static const char *const att_names8rex[] = {
"%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
"%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
};
-static const char *att_names_seg[] = {
+static const char *const att_names_seg[] = {
"%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
};
-static const char *att_index64 = "%riz";
-static const char *att_index32 = "%eiz";
-static const char *att_index16[] = {
+static const char att_index64[] = "%riz";
+static const char att_index32[] = "%eiz";
+static const char *const att_index16[] = {
"%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
};
-static const char **names_mm;
-static const char *intel_names_mm[] = {
- "mm0", "mm1", "mm2", "mm3",
- "mm4", "mm5", "mm6", "mm7"
-};
-static const char *att_names_mm[] = {
+static const char *const att_names_mm[] = {
"%mm0", "%mm1", "%mm2", "%mm3",
"%mm4", "%mm5", "%mm6", "%mm7"
};
-static const char *intel_names_bnd[] = {
- "bnd0", "bnd1", "bnd2", "bnd3"
-};
-
-static const char *att_names_bnd[] = {
+static const char *const att_names_bnd[] = {
"%bnd0", "%bnd1", "%bnd2", "%bnd3"
};
-static const char **names_xmm;
-static const char *intel_names_xmm[] = {
- "xmm0", "xmm1", "xmm2", "xmm3",
- "xmm4", "xmm5", "xmm6", "xmm7",
- "xmm8", "xmm9", "xmm10", "xmm11",
- "xmm12", "xmm13", "xmm14", "xmm15",
- "xmm16", "xmm17", "xmm18", "xmm19",
- "xmm20", "xmm21", "xmm22", "xmm23",
- "xmm24", "xmm25", "xmm26", "xmm27",
- "xmm28", "xmm29", "xmm30", "xmm31"
-};
-static const char *att_names_xmm[] = {
+static const char *const att_names_xmm[] = {
"%xmm0", "%xmm1", "%xmm2", "%xmm3",
"%xmm4", "%xmm5", "%xmm6", "%xmm7",
"%xmm8", "%xmm9", "%xmm10", "%xmm11",
"%xmm28", "%xmm29", "%xmm30", "%xmm31"
};
-static const char **names_ymm;
-static const char *intel_names_ymm[] = {
- "ymm0", "ymm1", "ymm2", "ymm3",
- "ymm4", "ymm5", "ymm6", "ymm7",
- "ymm8", "ymm9", "ymm10", "ymm11",
- "ymm12", "ymm13", "ymm14", "ymm15",
- "ymm16", "ymm17", "ymm18", "ymm19",
- "ymm20", "ymm21", "ymm22", "ymm23",
- "ymm24", "ymm25", "ymm26", "ymm27",
- "ymm28", "ymm29", "ymm30", "ymm31"
-};
-static const char *att_names_ymm[] = {
+static const char *const att_names_ymm[] = {
"%ymm0", "%ymm1", "%ymm2", "%ymm3",
"%ymm4", "%ymm5", "%ymm6", "%ymm7",
"%ymm8", "%ymm9", "%ymm10", "%ymm11",
"%ymm28", "%ymm29", "%ymm30", "%ymm31"
};
-static const char **names_zmm;
-static const char *intel_names_zmm[] = {
- "zmm0", "zmm1", "zmm2", "zmm3",
- "zmm4", "zmm5", "zmm6", "zmm7",
- "zmm8", "zmm9", "zmm10", "zmm11",
- "zmm12", "zmm13", "zmm14", "zmm15",
- "zmm16", "zmm17", "zmm18", "zmm19",
- "zmm20", "zmm21", "zmm22", "zmm23",
- "zmm24", "zmm25", "zmm26", "zmm27",
- "zmm28", "zmm29", "zmm30", "zmm31"
-};
-static const char *att_names_zmm[] = {
+static const char *const att_names_zmm[] = {
"%zmm0", "%zmm1", "%zmm2", "%zmm3",
"%zmm4", "%zmm5", "%zmm6", "%zmm7",
"%zmm8", "%zmm9", "%zmm10", "%zmm11",
"%zmm28", "%zmm29", "%zmm30", "%zmm31"
};
-static const char **names_mask;
-static const char *intel_names_mask[] = {
- "k0", "k1", "k2", "k3", "k4", "k5", "k6", "k7"
+static const char *const att_names_tmm[] = {
+ "%tmm0", "%tmm1", "%tmm2", "%tmm3",
+ "%tmm4", "%tmm5", "%tmm6", "%tmm7"
};
-static const char *att_names_mask[] = {
+
+static const char *const att_names_mask[] = {
"%k0", "%k1", "%k2", "%k3", "%k4", "%k5", "%k6", "%k7"
};
-static const char *names_rounding[] =
+static const char *const names_rounding[] =
{
- "{rn-sae}",
- "{rd-sae}",
- "{ru-sae}",
- "{rz-sae}"
+ "{rn-",
+ "{rd-",
+ "{ru-",
+ "{rz-"
};
static const struct dis386 reg_table[][8] = {
},
/* REG_8F */
{
- { "popU", { stackEv }, 0 },
+ { "pop{P|}", { stackEv }, 0 },
{ XOP_8F_TABLE (XOP_09) },
{ Bad_Opcode },
{ Bad_Opcode },
{
{ "incQ", { Evh1 }, 0 },
{ "decQ", { Evh1 }, 0 },
- { "call{&|}", { NOTRACK, indirEv, BND }, 0 },
+ { "call{@|}", { NOTRACK, indirEv, BND }, 0 },
{ MOD_TABLE (MOD_FF_REG_3) },
- { "jmp{&|}", { NOTRACK, indirEv, BND }, 0 },
+ { "jmp{@|}", { NOTRACK, indirEv, BND }, 0 },
{ MOD_TABLE (MOD_FF_REG_5) },
- { "pushU", { stackEv }, 0 },
+ { "push{P|}", { stackEv }, 0 },
{ Bad_Opcode },
},
/* REG_0F00 */
{ MOD_TABLE (MOD_0F18_REG_1) },
{ MOD_TABLE (MOD_0F18_REG_2) },
{ MOD_TABLE (MOD_0F18_REG_3) },
- { MOD_TABLE (MOD_0F18_REG_4) },
- { MOD_TABLE (MOD_0F18_REG_5) },
- { MOD_TABLE (MOD_0F18_REG_6) },
- { MOD_TABLE (MOD_0F18_REG_7) },
+ { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, 0 },
},
/* REG_0F1C_P_0_MOD_0 */
{
},
/* REG_0F1E_P_1_MOD_3 */
{
- { "nopQ", { Ev }, 0 },
- { "rdsspK", { Rdq }, PREFIX_OPCODE },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "rdsspK", { Edq }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
{ RM_TABLE (RM_0F1E_P_1_MOD_3_REG_7) },
},
- /* REG_0F71 */
+ /* REG_0F38D8_PREFIX_1 */
+ {
+ { "aesencwide128kl", { M }, 0 },
+ { "aesdecwide128kl", { M }, 0 },
+ { "aesencwide256kl", { M }, 0 },
+ { "aesdecwide256kl", { M }, 0 },
+ },
+ /* REG_0F3A0F_PREFIX_1_MOD_3 */
+ {
+ { RM_TABLE (RM_0F3A0F_P_1_MOD_3_REG_0) },
+ },
+ /* REG_0F71_MOD_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F71_REG_2) },
+ { "psrlw", { MS, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F71_REG_4) },
+ { "psraw", { MS, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F71_REG_6) },
+ { "psllw", { MS, Ib }, PREFIX_OPCODE },
},
- /* REG_0F72 */
+ /* REG_0F72_MOD_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F72_REG_2) },
+ { "psrld", { MS, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F72_REG_4) },
+ { "psrad", { MS, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F72_REG_6) },
+ { "pslld", { MS, Ib }, PREFIX_OPCODE },
},
- /* REG_0F73 */
+ /* REG_0F73_MOD_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F73_REG_2) },
- { MOD_TABLE (MOD_0F73_REG_3) },
+ { "psrlq", { MS, Ib }, PREFIX_OPCODE },
+ { "psrldq", { XS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F73_REG_6) },
- { MOD_TABLE (MOD_0F73_REG_7) },
+ { "psllq", { MS, Ib }, PREFIX_OPCODE },
+ { "pslldq", { XS, Ib }, PREFIX_DATA },
},
/* REG_0FA6 */
{
{ MOD_TABLE (MOD_0FC7_REG_6) },
{ MOD_TABLE (MOD_0FC7_REG_7) },
},
- /* REG_VEX_0F71 */
+ /* REG_VEX_0F71_M_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F71_REG_2) },
+ { "vpsrlw", { Vex, XS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F71_REG_4) },
+ { "vpsraw", { Vex, XS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F71_REG_6) },
+ { "vpsllw", { Vex, XS, Ib }, PREFIX_DATA },
},
- /* REG_VEX_0F72 */
+ /* REG_VEX_0F72_M_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F72_REG_2) },
+ { "vpsrld", { Vex, XS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F72_REG_4) },
+ { "vpsrad", { Vex, XS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F72_REG_6) },
+ { "vpslld", { Vex, XS, Ib }, PREFIX_DATA },
},
- /* REG_VEX_0F73 */
+ /* REG_VEX_0F73_M_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F73_REG_2) },
- { MOD_TABLE (MOD_VEX_0F73_REG_3) },
+ { "vpsrlq", { Vex, XS, Ib }, PREFIX_DATA },
+ { "vpsrldq", { Vex, XS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F73_REG_6) },
- { MOD_TABLE (MOD_VEX_0F73_REG_7) },
+ { "vpsllq", { Vex, XS, Ib }, PREFIX_DATA },
+ { "vpslldq", { Vex, XS, Ib }, PREFIX_DATA },
},
/* REG_VEX_0FAE */
{
{ MOD_TABLE (MOD_VEX_0FAE_REG_2) },
{ MOD_TABLE (MOD_VEX_0FAE_REG_3) },
},
- /* REG_VEX_0F38F3 */
- {
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_1) },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_2) },
- { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_3) },
- },
- /* REG_XOP_LWPCB */
+ /* REG_VEX_0F3849_X86_64_P_0_W_0_M_1 */
{
- { "llwpcb", { { OP_LWPCB_E, 0 } }, 0 },
- { "slwpcb", { { OP_LWPCB_E, 0 } }, 0 },
+ { RM_TABLE (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0) },
},
- /* REG_XOP_LWP */
+ /* REG_VEX_0F38F3_L_0 */
{
- { "lwpins", { { OP_LWP_E, 0 }, Ed, Id }, 0 },
- { "lwpval", { { OP_LWP_E, 0 }, Ed, Id }, 0 },
+ { Bad_Opcode },
+ { "blsrS", { VexGdq, Edq }, PREFIX_OPCODE },
+ { "blsmskS", { VexGdq, Edq }, PREFIX_OPCODE },
+ { "blsiS", { VexGdq, Edq }, PREFIX_OPCODE },
},
- /* REG_XOP_TBM_01 */
+ /* REG_XOP_09_01_L_0 */
{
{ Bad_Opcode },
- { "blcfill", { { OP_LWP_E, 0 }, Edq }, 0 },
- { "blsfill", { { OP_LWP_E, 0 }, Edq }, 0 },
- { "blcs", { { OP_LWP_E, 0 }, Edq }, 0 },
- { "tzmsk", { { OP_LWP_E, 0 }, Edq }, 0 },
- { "blcic", { { OP_LWP_E, 0 }, Edq }, 0 },
- { "blsic", { { OP_LWP_E, 0 }, Edq }, 0 },
- { "t1mskc", { { OP_LWP_E, 0 }, Edq }, 0 },
+ { "blcfill", { VexGdq, Edq }, 0 },
+ { "blsfill", { VexGdq, Edq }, 0 },
+ { "blcs", { VexGdq, Edq }, 0 },
+ { "tzmsk", { VexGdq, Edq }, 0 },
+ { "blcic", { VexGdq, Edq }, 0 },
+ { "blsic", { VexGdq, Edq }, 0 },
+ { "t1mskc", { VexGdq, Edq }, 0 },
},
- /* REG_XOP_TBM_02 */
+ /* REG_XOP_09_02_L_0 */
{
{ Bad_Opcode },
- { "blcmsk", { { OP_LWP_E, 0 }, Edq }, 0 },
+ { "blcmsk", { VexGdq, Edq }, 0 },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "blci", { { OP_LWP_E, 0 }, Edq }, 0 },
+ { "blci", { VexGdq, Edq }, 0 },
+ },
+ /* REG_XOP_09_12_M_1_L_0 */
+ {
+ { "llwpcb", { Edq }, 0 },
+ { "slwpcb", { Edq }, 0 },
+ },
+ /* REG_XOP_0A_12_L_0 */
+ {
+ { "lwpins", { VexGdq, Ed, Id }, 0 },
+ { "lwpval", { VexGdq, Ed, Id }, 0 },
},
#include "i386-dis-evex-reg.h"
{ NULL, { { NULL, 0 } }, PREFIX_IGNORED }
},
+ /* PREFIX_0F01_REG_1_RM_4 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "tdcall", { Skip_MODRM }, 0 },
+ { Bad_Opcode },
+ },
+
+ /* PREFIX_0F01_REG_1_RM_5 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_1_RM_5_PREFIX_2) },
+ { Bad_Opcode },
+ },
+
+ /* PREFIX_0F01_REG_1_RM_6 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_1_RM_6_PREFIX_2) },
+ { Bad_Opcode },
+ },
+
+ /* PREFIX_0F01_REG_1_RM_7 */
+ {
+ { "encls", { Skip_MODRM }, 0 },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_1_RM_7_PREFIX_2) },
+ { Bad_Opcode },
+ },
+
/* PREFIX_0F01_REG_3_RM_1 */
{
{ "vmmcall", { Skip_MODRM }, 0 },
{ "saveprevssp", { Skip_MODRM }, PREFIX_OPCODE },
},
+ /* PREFIX_0F01_REG_5_MOD_3_RM_4 */
+ {
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1) },
+ },
+
+ /* PREFIX_0F01_REG_5_MOD_3_RM_5 */
+ {
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1) },
+ },
+
+ /* PREFIX_0F01_REG_5_MOD_3_RM_6 */
+ {
+ { "rdpkru", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1) },
+ },
+
+ /* PREFIX_0F01_REG_5_MOD_3_RM_7 */
+ {
+ { "wrpkru", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1) },
+ },
+
/* PREFIX_0F01_REG_7_MOD_3_RM_2 */
{
{ "monitorx", { { OP_Monitor, 0 } }, 0 },
{ "mcommit", { Skip_MODRM }, 0 },
},
- /* PREFIX_0F01_REG_7_MOD_3_RM_3 */
+ /* PREFIX_0F01_REG_7_MOD_3_RM_6 */
+ {
+ { "invlpgb", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1) },
+ { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3) },
+ },
+
+ /* PREFIX_0F01_REG_7_MOD_3_RM_7 */
{
- { "mwaitx", { { OP_Mwait, eBX_reg } }, 0 },
+ { "tlbsync", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1) },
+ { Bad_Opcode },
+ { "pvalidate", { Skip_MODRM }, 0 },
},
/* PREFIX_0F09 */
/* PREFIX_0F1C */
{
{ MOD_TABLE (MOD_0F1C_PREFIX_0) },
- { "nopQ", { Ev }, PREFIX_OPCODE },
- { "nopQ", { Ev }, PREFIX_OPCODE },
- { "nopQ", { Ev }, PREFIX_OPCODE },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
},
/* PREFIX_0F1E */
{
- { "nopQ", { Ev }, PREFIX_OPCODE },
+ { "nopQ", { Ev }, 0 },
{ MOD_TABLE (MOD_0F1E_PREFIX_1) },
- { "nopQ", { Ev }, PREFIX_OPCODE },
- { "nopQ", { Ev }, PREFIX_OPCODE },
+ { "nopQ", { Ev }, 0 },
+ { NULL, { XX }, PREFIX_IGNORED },
},
/* PREFIX_0F2A */
{
{ "cvtpi2ps", { XM, EMCq }, PREFIX_OPCODE },
- { "cvtsi2ss%LQ", { XM, Edq }, PREFIX_OPCODE },
+ { "cvtsi2ss{%LQ|}", { XM, Edq }, PREFIX_OPCODE },
{ "cvtpi2pd", { XM, EMCq }, PREFIX_OPCODE },
- { "cvtsi2sd%LQ", { XM, Edq }, 0 },
+ { "cvtsi2sd{%LQ|}", { XM, Edq }, 0 },
},
/* PREFIX_0F2B */
{ "punpckldq",{ MX, EMx }, PREFIX_OPCODE },
},
- /* PREFIX_0F6C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "punpcklqdq", { XM, EXx }, PREFIX_OPCODE },
- },
-
- /* PREFIX_0F6D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "punpckhqdq", { XM, EXx }, PREFIX_OPCODE },
- },
-
/* PREFIX_0F6F */
{
{ "movq", { MX, EM }, PREFIX_OPCODE },
{ "pshuflw",{ XM, EXx, Ib }, PREFIX_OPCODE },
},
- /* PREFIX_0F73_REG_3 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "psrldq", { XS, Ib }, 0 },
- },
-
- /* PREFIX_0F73_REG_7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "pslldq", { XS, Ib }, 0 },
- },
-
/* PREFIX_0F78 */
{
{"vmread", { Em, Gm }, 0 },
/* PREFIX_0FAE_REG_4_MOD_0 */
{
{ "xsave", { FXSAVE }, 0 },
- { "ptwrite%LQ", { Edq }, 0 },
+ { "ptwrite{%LQ|}", { Edq }, 0 },
},
/* PREFIX_0FAE_REG_4_MOD_3 */
{
{ Bad_Opcode },
- { "ptwrite%LQ", { Edq }, 0 },
- },
-
- /* PREFIX_0FAE_REG_5_MOD_0 */
- {
- { "xrstor", { FXSAVE }, PREFIX_OPCODE },
+ { "ptwrite{%LQ|}", { Edq }, 0 },
},
/* PREFIX_0FAE_REG_5_MOD_3 */
{
{ "lfence", { Skip_MODRM }, 0 },
- { "incsspK", { Rdq }, PREFIX_OPCODE },
+ { "incsspK", { Edq }, PREFIX_OPCODE },
},
/* PREFIX_0FAE_REG_6_MOD_0 */
{ "cmpsd", { XM, EXq, CMP }, PREFIX_OPCODE },
},
- /* PREFIX_0FC3_MOD_0 */
- {
- { "movntiS", { Edq, Gdq }, PREFIX_OPCODE },
- },
-
/* PREFIX_0FC7_REG_6_MOD_0 */
{
{ "vmptrld",{ Mq }, 0 },
/* PREFIX_0FC7_REG_6_MOD_3 */
{
{ "rdrand", { Ev }, 0 },
- { Bad_Opcode },
+ { X86_64_TABLE (X86_64_0FC7_REG_6_MOD_3_PREFIX_1) },
{ "rdrand", { Ev }, 0 }
},
{ "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
},
- /* PREFIX_0F3810 */
+ /* PREFIX_0F38D8 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "pblendvb", { XM, EXx, XMM0 }, PREFIX_OPCODE },
+ { REG_TABLE (REG_0F38D8_PREFIX_1) },
},
- /* PREFIX_0F3814 */
+ /* PREFIX_0F38DC */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "blendvps", { XM, EXx, XMM0 }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F38DC_PREFIX_1) },
+ { "aesenc", { XM, EXx }, 0 },
},
- /* PREFIX_0F3815 */
+ /* PREFIX_0F38DD */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "blendvpd", { XM, EXx, XMM0 }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F38DD_PREFIX_1) },
+ { "aesenclast", { XM, EXx }, 0 },
},
- /* PREFIX_0F3817 */
+ /* PREFIX_0F38DE */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "ptest", { XM, EXx }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F38DE_PREFIX_1) },
+ { "aesdec", { XM, EXx }, 0 },
},
- /* PREFIX_0F3820 */
+ /* PREFIX_0F38DF */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovsxbw", { XM, EXq }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F38DF_PREFIX_1) },
+ { "aesdeclast", { XM, EXx }, 0 },
},
- /* PREFIX_0F3821 */
+ /* PREFIX_0F38F0 */
{
+ { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovsxbd", { XM, EXd }, PREFIX_OPCODE },
+ { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
+ { "crc32A", { Gdq, Eb }, PREFIX_OPCODE },
},
- /* PREFIX_0F3822 */
+ /* PREFIX_0F38F1 */
{
+ { "movbeS", { Mv, Gv }, PREFIX_OPCODE },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovsxbq", { XM, EXw }, PREFIX_OPCODE },
+ { "movbeS", { Mv, Gv }, PREFIX_OPCODE },
+ { "crc32Q", { Gdq, Ev }, PREFIX_OPCODE },
},
- /* PREFIX_0F3823 */
+ /* PREFIX_0F38F6 */
{
+ { MOD_TABLE (MOD_0F38F6_PREFIX_0) },
+ { "adoxS", { Gdq, Edq}, PREFIX_OPCODE },
+ { "adcxS", { Gdq, Edq}, PREFIX_OPCODE },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovsxwd", { XM, EXq }, PREFIX_OPCODE },
},
- /* PREFIX_0F3824 */
+ /* PREFIX_0F38F8 */
{
{ Bad_Opcode },
+ { MOD_TABLE (MOD_0F38F8_PREFIX_1) },
+ { MOD_TABLE (MOD_0F38F8_PREFIX_2) },
+ { MOD_TABLE (MOD_0F38F8_PREFIX_3) },
+ },
+ /* PREFIX_0F38FA */
+ {
{ Bad_Opcode },
- { "pmovsxwq", { XM, EXd }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F38FA_PREFIX_1) },
},
- /* PREFIX_0F3825 */
+ /* PREFIX_0F38FB */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovsxdq", { XM, EXq }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F38FB_PREFIX_1) },
},
- /* PREFIX_0F3828 */
+ /* PREFIX_0F3A0F */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmuldq", { XM, EXx }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F3A0F_PREFIX_1)},
},
- /* PREFIX_0F3829 */
+ /* PREFIX_VEX_0F10 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "pcmpeqq", { XM, EXx }, PREFIX_OPCODE },
+ { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
+ { "vmovs%XS", { XMScalar, VexScalarR, EXd }, 0 },
+ { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
+ { "vmovs%XD", { XMScalar, VexScalarR, EXq }, 0 },
},
- /* PREFIX_0F382A */
+ /* PREFIX_VEX_0F11 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_0F382A_PREFIX_2) },
+ { "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
+ { "vmovs%XS", { EXdS, VexScalarR, XMScalar }, 0 },
+ { "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
+ { "vmovs%XD", { EXqS, VexScalarR, XMScalar }, 0 },
},
- /* PREFIX_0F382B */
+ /* PREFIX_VEX_0F12 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "packusdw", { XM, EXx }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_VEX_0F12_PREFIX_0) },
+ { "vmov%XSldup", { XM, EXEvexXNoBcst }, 0 },
+ { MOD_TABLE (MOD_VEX_0F12_PREFIX_2) },
+ { "vmov%XDdup", { XM, EXymmq }, 0 },
},
- /* PREFIX_0F3830 */
+ /* PREFIX_VEX_0F16 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "pmovzxbw", { XM, EXq }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_VEX_0F16_PREFIX_0) },
+ { "vmov%XShdup", { XM, EXEvexXNoBcst }, 0 },
+ { MOD_TABLE (MOD_VEX_0F16_PREFIX_2) },
},
- /* PREFIX_0F3831 */
+ /* PREFIX_VEX_0F2A */
{
{ Bad_Opcode },
+ { "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
{ Bad_Opcode },
- { "pmovzxbd", { XM, EXd }, PREFIX_OPCODE },
+ { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
},
- /* PREFIX_0F3832 */
+ /* PREFIX_VEX_0F2C */
{
{ Bad_Opcode },
+ { "vcvttss2si", { Gdq, EXd, EXxEVexS }, 0 },
{ Bad_Opcode },
- { "pmovzxbq", { XM, EXw }, PREFIX_OPCODE },
+ { "vcvttsd2si", { Gdq, EXq, EXxEVexS }, 0 },
},
- /* PREFIX_0F3833 */
+ /* PREFIX_VEX_0F2D */
{
{ Bad_Opcode },
+ { "vcvtss2si", { Gdq, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "pmovzxwd", { XM, EXq }, PREFIX_OPCODE },
+ { "vcvtsd2si", { Gdq, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F3834 */
+ /* PREFIX_VEX_0F2E */
{
+ { "vucomisX", { XMScalar, EXd, EXxEVexS }, PREFIX_OPCODE },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovzxwq", { XM, EXd }, PREFIX_OPCODE },
+ { "vucomisX", { XMScalar, EXq, EXxEVexS }, PREFIX_OPCODE },
},
- /* PREFIX_0F3835 */
+ /* PREFIX_VEX_0F2F */
{
+ { "vcomisX", { XMScalar, EXd, EXxEVexS }, PREFIX_OPCODE },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmovzxdq", { XM, EXq }, PREFIX_OPCODE },
+ { "vcomisX", { XMScalar, EXq, EXxEVexS }, PREFIX_OPCODE },
},
- /* PREFIX_0F3837 */
+ /* PREFIX_VEX_0F41_L_1_M_1_W_0 */
{
+ { "kandw", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pcmpgtq", { XM, EXx }, PREFIX_OPCODE },
+ { "kandb", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3838 */
+ /* PREFIX_VEX_0F41_L_1_M_1_W_1 */
{
+ { "kandq", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pminsb", { XM, EXx }, PREFIX_OPCODE },
+ { "kandd", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3839 */
+ /* PREFIX_VEX_0F42_L_1_M_1_W_0 */
{
+ { "kandnw", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pminsd", { XM, EXx }, PREFIX_OPCODE },
+ { "kandnb", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F383A */
+ /* PREFIX_VEX_0F42_L_1_M_1_W_1 */
{
+ { "kandnq", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pminuw", { XM, EXx }, PREFIX_OPCODE },
+ { "kandnd", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F383B */
+ /* PREFIX_VEX_0F44_L_0_M_1_W_0 */
{
+ { "knotw", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pminud", { XM, EXx }, PREFIX_OPCODE },
+ { "knotb", { MaskG, MaskE }, 0 },
},
- /* PREFIX_0F383C */
+ /* PREFIX_VEX_0F44_L_0_M_1_W_1 */
{
+ { "knotq", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmaxsb", { XM, EXx }, PREFIX_OPCODE },
+ { "knotd", { MaskG, MaskE }, 0 },
},
- /* PREFIX_0F383D */
+ /* PREFIX_VEX_0F45_L_1_M_1_W_0 */
{
+ { "korw", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmaxsd", { XM, EXx }, PREFIX_OPCODE },
+ { "korb", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F383E */
+ /* PREFIX_VEX_0F45_L_1_M_1_W_1 */
{
+ { "korq", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmaxuw", { XM, EXx }, PREFIX_OPCODE },
+ { "kord", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F383F */
+ /* PREFIX_VEX_0F46_L_1_M_1_W_0 */
{
+ { "kxnorw", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmaxud", { XM, EXx }, PREFIX_OPCODE },
+ { "kxnorb", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3840 */
+ /* PREFIX_VEX_0F46_L_1_M_1_W_1 */
{
+ { "kxnorq", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pmulld", { XM, EXx }, PREFIX_OPCODE },
+ { "kxnord", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3841 */
+ /* PREFIX_VEX_0F47_L_1_M_1_W_0 */
{
+ { "kxorw", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "phminposuw", { XM, EXx }, PREFIX_OPCODE },
+ { "kxorb", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3880 */
+ /* PREFIX_VEX_0F47_L_1_M_1_W_1 */
{
+ { "kxorq", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "invept", { Gm, Mo }, PREFIX_OPCODE },
+ { "kxord", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3881 */
+ /* PREFIX_VEX_0F4A_L_1_M_1_W_0 */
{
+ { "kaddw", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "invvpid", { Gm, Mo }, PREFIX_OPCODE },
+ { "kaddb", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F3882 */
+ /* PREFIX_VEX_0F4A_L_1_M_1_W_1 */
{
+ { "kaddq", { MaskG, MaskVex, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "invpcid", { Gm, M }, PREFIX_OPCODE },
+ { "kaddd", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F38C8 */
+ /* PREFIX_VEX_0F4B_L_1_M_1_W_0 */
{
- { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
+ { "kunpckwd", { MaskG, MaskVex, MaskE }, 0 },
+ { Bad_Opcode },
+ { "kunpckbw", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F38C9 */
+ /* PREFIX_VEX_0F4B_L_1_M_1_W_1 */
{
- { "sha1msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { "kunpckdq", { MaskG, MaskVex, MaskE }, 0 },
},
- /* PREFIX_0F38CA */
+ /* PREFIX_VEX_0F51 */
{
- { "sha1msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vsqrts%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vsqrts%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F38CB */
+ /* PREFIX_VEX_0F52 */
{
- { "sha256rnds2", { XM, EXxmm, XMM0 }, PREFIX_OPCODE },
+ { "vrsqrtps", { XM, EXx }, 0 },
+ { "vrsqrtss", { XMScalar, VexScalar, EXd }, 0 },
},
- /* PREFIX_0F38CC */
+ /* PREFIX_VEX_0F53 */
{
- { "sha256msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { "vrcpps", { XM, EXx }, 0 },
+ { "vrcpss", { XMScalar, VexScalar, EXd }, 0 },
},
- /* PREFIX_0F38CD */
+ /* PREFIX_VEX_0F58 */
{
- { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vadds%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vadds%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F38CF */
+ /* PREFIX_VEX_0F59 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "gf2p8mulb", { XM, EXxmm }, PREFIX_OPCODE },
+ { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vmuls%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vmuls%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F38DB */
+ /* PREFIX_VEX_0F5A */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "aesimc", { XM, EXx }, PREFIX_OPCODE },
+ { "vcvtp%XS2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
+ { "vcvts%XS2sd", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+ { "vcvtp%XD2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
+ { "vcvts%XD2ss", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F38DC */
+ /* PREFIX_VEX_0F5B */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "aesenc", { XM, EXx }, PREFIX_OPCODE },
+ { "vcvtdq2ps", { XM, EXx }, 0 },
+ { "vcvttps2dq", { XM, EXx }, 0 },
+ { "vcvtps2dq", { XM, EXx }, 0 },
},
- /* PREFIX_0F38DD */
+ /* PREFIX_VEX_0F5C */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "aesenclast", { XM, EXx }, PREFIX_OPCODE },
+ { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vsubs%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vsubs%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F38DE */
+ /* PREFIX_VEX_0F5D */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "aesdec", { XM, EXx }, PREFIX_OPCODE },
+ { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+ { "vmins%XS", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+ { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+ { "vmins%XD", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
},
- /* PREFIX_0F38DF */
+ /* PREFIX_VEX_0F5E */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "aesdeclast", { XM, EXx }, PREFIX_OPCODE },
+ { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vdivs%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
+ { "vdivs%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_0F38F0 */
+ /* PREFIX_VEX_0F5F */
+ {
+ { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+ { "vmaxs%XS", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+ { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
+ { "vmaxs%XD", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
+ },
+
+ /* PREFIX_VEX_0F6F */
{
- { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
{ Bad_Opcode },
- { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
- { "crc32", { Gdq, { CRC32_Fixup, b_mode } }, PREFIX_OPCODE },
+ { "vmovdqu", { XM, EXx }, 0 },
+ { "vmovdqa", { XM, EXx }, 0 },
},
- /* PREFIX_0F38F1 */
+ /* PREFIX_VEX_0F70 */
{
- { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
{ Bad_Opcode },
- { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
- { "crc32", { Gdq, { CRC32_Fixup, v_mode } }, PREFIX_OPCODE },
+ { "vpshufhw", { XM, EXx, Ib }, 0 },
+ { "vpshufd", { XM, EXx, Ib }, 0 },
+ { "vpshuflw", { XM, EXx, Ib }, 0 },
},
- /* PREFIX_0F38F5 */
+ /* PREFIX_VEX_0F7C */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F38F5_PREFIX_2) },
+ { "vhaddpd", { XM, Vex, EXx }, 0 },
+ { "vhaddps", { XM, Vex, EXx }, 0 },
},
- /* PREFIX_0F38F6 */
+ /* PREFIX_VEX_0F7D */
{
- { MOD_TABLE (MOD_0F38F6_PREFIX_0) },
- { "adoxS", { Gdq, Edq}, PREFIX_OPCODE },
- { "adcxS", { Gdq, Edq}, PREFIX_OPCODE },
{ Bad_Opcode },
+ { Bad_Opcode },
+ { "vhsubpd", { XM, Vex, EXx }, 0 },
+ { "vhsubps", { XM, Vex, EXx }, 0 },
},
- /* PREFIX_0F38F8 */
+ /* PREFIX_VEX_0F7E */
{
{ Bad_Opcode },
- { MOD_TABLE (MOD_0F38F8_PREFIX_1) },
- { MOD_TABLE (MOD_0F38F8_PREFIX_2) },
- { MOD_TABLE (MOD_0F38F8_PREFIX_3) },
+ { VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) },
+ { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) },
},
- /* PREFIX_0F38F9 */
+ /* PREFIX_VEX_0F7F */
{
- { MOD_TABLE (MOD_0F38F9_PREFIX_0) },
+ { Bad_Opcode },
+ { "vmovdqu", { EXxS, XM }, 0 },
+ { "vmovdqa", { EXxS, XM }, 0 },
},
- /* PREFIX_0F3A08 */
+ /* PREFIX_VEX_0F90_L_0_W_0 */
{
+ { "kmovw", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "roundps", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "kmovb", { MaskG, MaskBDE }, 0 },
},
- /* PREFIX_0F3A09 */
+ /* PREFIX_VEX_0F90_L_0_W_1 */
{
+ { "kmovq", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "roundpd", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "kmovd", { MaskG, MaskBDE }, 0 },
},
- /* PREFIX_0F3A0A */
+ /* PREFIX_VEX_0F91_L_0_M_0_W_0 */
{
+ { "kmovw", { Ew, MaskG }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "roundss", { XM, EXd, Ib }, PREFIX_OPCODE },
+ { "kmovb", { Eb, MaskG }, 0 },
},
- /* PREFIX_0F3A0B */
+ /* PREFIX_VEX_0F91_L_0_M_0_W_1 */
{
+ { "kmovq", { Eq, MaskG }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "roundsd", { XM, EXq, Ib }, PREFIX_OPCODE },
+ { "kmovd", { Ed, MaskG }, 0 },
},
- /* PREFIX_0F3A0C */
+ /* PREFIX_VEX_0F92_L_0_M_1_W_0 */
{
+ { "kmovw", { MaskG, Edq }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "blendps", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "kmovb", { MaskG, Edq }, 0 },
+ { "kmovd", { MaskG, Edq }, 0 },
},
- /* PREFIX_0F3A0D */
+ /* PREFIX_VEX_0F92_L_0_M_1_W_1 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "blendpd", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { "kmovK", { MaskG, Edq }, 0 },
},
- /* PREFIX_0F3A0E */
+ /* PREFIX_VEX_0F93_L_0_M_1_W_0 */
{
+ { "kmovw", { Gdq, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pblendw", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "kmovb", { Gdq, MaskE }, 0 },
+ { "kmovd", { Gdq, MaskE }, 0 },
},
- /* PREFIX_0F3A14 */
+ /* PREFIX_VEX_0F93_L_0_M_1_W_1 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pextrb", { Edqb, XM, Ib }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { "kmovK", { Gdq, MaskE }, 0 },
},
- /* PREFIX_0F3A15 */
+ /* PREFIX_VEX_0F98_L_0_M_1_W_0 */
{
+ { "kortestw", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pextrw", { Edqw, XM, Ib }, PREFIX_OPCODE },
+ { "kortestb", { MaskG, MaskE }, 0 },
},
- /* PREFIX_0F3A16 */
+ /* PREFIX_VEX_0F98_L_0_M_1_W_1 */
{
+ { "kortestq", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pextrK", { Edq, XM, Ib }, PREFIX_OPCODE },
+ { "kortestd", { MaskG, MaskE }, 0 },
},
- /* PREFIX_0F3A17 */
+ /* PREFIX_VEX_0F99_L_0_M_1_W_0 */
{
+ { "ktestw", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "extractps", { Edqd, XM, Ib }, PREFIX_OPCODE },
+ { "ktestb", { MaskG, MaskE }, 0 },
},
- /* PREFIX_0F3A20 */
+ /* PREFIX_VEX_0F99_L_0_M_1_W_1 */
{
+ { "ktestq", { MaskG, MaskE }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pinsrb", { XM, Edqb, Ib }, PREFIX_OPCODE },
+ { "ktestd", { MaskG, MaskE }, 0 },
},
- /* PREFIX_0F3A21 */
+ /* PREFIX_VEX_0FC2 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "insertps", { XM, EXd, Ib }, PREFIX_OPCODE },
+ { "vcmpps", { XM, Vex, EXx, CMP }, 0 },
+ { "vcmpss", { XMScalar, VexScalar, EXd, CMP }, 0 },
+ { "vcmppd", { XM, Vex, EXx, CMP }, 0 },
+ { "vcmpsd", { XMScalar, VexScalar, EXq, CMP }, 0 },
},
- /* PREFIX_0F3A22 */
+ /* PREFIX_VEX_0FD0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pinsrK", { XM, Edq, Ib }, PREFIX_OPCODE },
+ { "vaddsubpd", { XM, Vex, EXx }, 0 },
+ { "vaddsubps", { XM, Vex, EXx }, 0 },
},
- /* PREFIX_0F3A40 */
+ /* PREFIX_VEX_0FE6 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "dpps", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "vcvtdq2pd", { XM, EXxmmq }, 0 },
+ { "vcvttpd2dq%XY", { XMM, EXx }, 0 },
+ { "vcvtpd2dq%XY", { XMM, EXx }, 0 },
},
- /* PREFIX_0F3A41 */
+ /* PREFIX_VEX_0FF0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "dppd", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_VEX_0FF0_PREFIX_3) },
},
- /* PREFIX_0F3A42 */
+ /* PREFIX_VEX_0F3849_X86_64 */
{
+ { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_0) },
{ Bad_Opcode },
- { Bad_Opcode },
- { "mpsadbw", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_3) },
},
- /* PREFIX_0F3A44 */
+ /* PREFIX_VEX_0F384B_X86_64 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "pclmulqdq", { XM, EXx, PCLMUL }, PREFIX_OPCODE },
+ { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_1) },
+ { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_2) },
+ { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_3) },
},
- /* PREFIX_0F3A60 */
+ /* PREFIX_VEX_0F385C_X86_64 */
{
{ Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_1) },
{ Bad_Opcode },
- { "pcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
},
- /* PREFIX_0F3A61 */
+ /* PREFIX_VEX_0F385E_X86_64 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "pcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+ { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_0) },
+ { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_1) },
+ { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_2) },
+ { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) },
},
- /* PREFIX_0F3A62 */
+ /* PREFIX_VEX_0F38F5_L_0 */
{
+ { "bzhiS", { Gdq, Edq, VexGdq }, 0 },
+ { "pextS", { Gdq, VexGdq, Edq }, 0 },
{ Bad_Opcode },
- { Bad_Opcode },
- { "pcmpistrm", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "pdepS", { Gdq, VexGdq, Edq }, 0 },
},
- /* PREFIX_0F3A63 */
+ /* PREFIX_VEX_0F38F6_L_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pcmpistri", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { "mulxS", { Gdq, VexGdq, Edq }, 0 },
},
- /* PREFIX_0F3ACC */
+ /* PREFIX_VEX_0F38F7_L_0 */
{
- { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
+ { "bextrS", { Gdq, Edq, VexGdq }, 0 },
+ { "sarxS", { Gdq, Edq, VexGdq }, 0 },
+ { "shlxS", { Gdq, Edq, VexGdq }, 0 },
+ { "shrxS", { Gdq, Edq, VexGdq }, 0 },
},
- /* PREFIX_0F3ACE */
+ /* PREFIX_VEX_0F3AF0_L_0 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "gf2p8affineqb", { XM, EXxmm, Ib }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { "rorxS", { Gdq, Edq, Ib }, 0 },
},
- /* PREFIX_0F3ACF */
+#include "i386-dis-evex-prefix.h"
+};
+
+static const struct dis386 x86_64_table[][2] = {
+ /* X86_64_06 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "gf2p8affineinvqb", { XM, EXxmm, Ib }, PREFIX_OPCODE },
+ { "pushP", { es }, 0 },
},
- /* PREFIX_0F3ADF */
+ /* X86_64_07 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "aeskeygenassist", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "popP", { es }, 0 },
},
- /* PREFIX_VEX_0F10 */
+ /* X86_64_0E */
{
- { "vmovups", { XM, EXx }, 0 },
- { "vmovss", { XMVexScalar, VexScalar, EXxmm_md }, 0 },
- { "vmovupd", { XM, EXx }, 0 },
- { "vmovsd", { XMVexScalar, VexScalar, EXxmm_mq }, 0 },
+ { "pushP", { cs }, 0 },
},
- /* PREFIX_VEX_0F11 */
+ /* X86_64_16 */
{
- { "vmovups", { EXxS, XM }, 0 },
- { "vmovss", { EXdVexScalarS, VexScalar, XMScalar }, 0 },
- { "vmovupd", { EXxS, XM }, 0 },
- { "vmovsd", { EXqVexScalarS, VexScalar, XMScalar }, 0 },
+ { "pushP", { ss }, 0 },
},
- /* PREFIX_VEX_0F12 */
+ /* X86_64_17 */
{
- { MOD_TABLE (MOD_VEX_0F12_PREFIX_0) },
- { "vmovsldup", { XM, EXx }, 0 },
- { MOD_TABLE (MOD_VEX_0F12_PREFIX_2) },
- { "vmovddup", { XM, EXymmq }, 0 },
+ { "popP", { ss }, 0 },
},
- /* PREFIX_VEX_0F16 */
+ /* X86_64_1E */
{
- { MOD_TABLE (MOD_VEX_0F16_PREFIX_0) },
- { "vmovshdup", { XM, EXx }, 0 },
- { MOD_TABLE (MOD_VEX_0F16_PREFIX_2) },
+ { "pushP", { ds }, 0 },
},
- /* PREFIX_VEX_0F2A */
+ /* X86_64_1F */
{
- { Bad_Opcode },
- { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
- { Bad_Opcode },
- { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
+ { "popP", { ds }, 0 },
},
- /* PREFIX_VEX_0F2C */
+ /* X86_64_27 */
{
- { Bad_Opcode },
- { "vcvttss2si", { Gdq, EXxmm_md }, 0 },
- { Bad_Opcode },
- { "vcvttsd2si", { Gdq, EXxmm_mq }, 0 },
+ { "daa", { XX }, 0 },
},
- /* PREFIX_VEX_0F2D */
+ /* X86_64_2F */
{
- { Bad_Opcode },
- { "vcvtss2si", { Gdq, EXxmm_md }, 0 },
- { Bad_Opcode },
- { "vcvtsd2si", { Gdq, EXxmm_mq }, 0 },
+ { "das", { XX }, 0 },
},
- /* PREFIX_VEX_0F2E */
+ /* X86_64_37 */
{
- { "vucomiss", { XMScalar, EXxmm_md }, 0 },
- { Bad_Opcode },
- { "vucomisd", { XMScalar, EXxmm_mq }, 0 },
+ { "aaa", { XX }, 0 },
},
- /* PREFIX_VEX_0F2F */
+ /* X86_64_3F */
{
- { "vcomiss", { XMScalar, EXxmm_md }, 0 },
- { Bad_Opcode },
- { "vcomisd", { XMScalar, EXxmm_mq }, 0 },
+ { "aas", { XX }, 0 },
},
- /* PREFIX_VEX_0F41 */
+ /* X86_64_60 */
{
- { VEX_LEN_TABLE (VEX_LEN_0F41_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F41_P_2) },
+ { "pushaP", { XX }, 0 },
},
- /* PREFIX_VEX_0F42 */
+ /* X86_64_61 */
{
- { VEX_LEN_TABLE (VEX_LEN_0F42_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F42_P_2) },
+ { "popaP", { XX }, 0 },
},
- /* PREFIX_VEX_0F44 */
+ /* X86_64_62 */
{
- { VEX_LEN_TABLE (VEX_LEN_0F44_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F44_P_2) },
+ { MOD_TABLE (MOD_62_32BIT) },
+ { EVEX_TABLE (EVEX_0F) },
},
- /* PREFIX_VEX_0F45 */
+ /* X86_64_63 */
{
- { VEX_LEN_TABLE (VEX_LEN_0F45_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F45_P_2) },
+ { "arpl", { Ew, Gw }, 0 },
+ { "movs", { Gv, { MOVSXD_Fixup, movsxd_mode } }, 0 },
},
- /* PREFIX_VEX_0F46 */
+ /* X86_64_6D */
{
- { VEX_LEN_TABLE (VEX_LEN_0F46_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F46_P_2) },
+ { "ins{R|}", { Yzr, indirDX }, 0 },
+ { "ins{G|}", { Yzr, indirDX }, 0 },
},
- /* PREFIX_VEX_0F47 */
+ /* X86_64_6F */
{
- { VEX_LEN_TABLE (VEX_LEN_0F47_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F47_P_2) },
+ { "outs{R|}", { indirDXr, Xz }, 0 },
+ { "outs{G|}", { indirDXr, Xz }, 0 },
},
- /* PREFIX_VEX_0F4A */
+ /* X86_64_82 */
{
- { VEX_LEN_TABLE (VEX_LEN_0F4A_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F4A_P_2) },
+ /* Opcode 0x82 is an alias of opcode 0x80 in 32-bit mode. */
+ { REG_TABLE (REG_80) },
},
- /* PREFIX_VEX_0F4B */
+ /* X86_64_9A */
{
- { VEX_LEN_TABLE (VEX_LEN_0F4B_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F4B_P_2) },
+ { "{l|}call{P|}", { Ap }, 0 },
},
- /* PREFIX_VEX_0F51 */
+ /* X86_64_C2 */
{
- { "vsqrtps", { XM, EXx }, 0 },
- { "vsqrtss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vsqrtpd", { XM, EXx }, 0 },
- { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "retP", { Iw, BND }, 0 },
+ { "ret@", { Iw, BND }, 0 },
},
- /* PREFIX_VEX_0F52 */
+ /* X86_64_C3 */
{
- { "vrsqrtps", { XM, EXx }, 0 },
- { "vrsqrtss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "retP", { BND }, 0 },
+ { "ret@", { BND }, 0 },
},
- /* PREFIX_VEX_0F53 */
+ /* X86_64_C4 */
{
- { "vrcpps", { XM, EXx }, 0 },
- { "vrcpss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { MOD_TABLE (MOD_C4_32BIT) },
+ { VEX_C4_TABLE (VEX_0F) },
},
- /* PREFIX_VEX_0F58 */
+ /* X86_64_C5 */
{
- { "vaddps", { XM, Vex, EXx }, 0 },
- { "vaddss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vaddpd", { XM, Vex, EXx }, 0 },
- { "vaddsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { MOD_TABLE (MOD_C5_32BIT) },
+ { VEX_C5_TABLE (VEX_0F) },
},
- /* PREFIX_VEX_0F59 */
+ /* X86_64_CE */
{
- { "vmulps", { XM, Vex, EXx }, 0 },
- { "vmulss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vmulpd", { XM, Vex, EXx }, 0 },
- { "vmulsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "into", { XX }, 0 },
},
- /* PREFIX_VEX_0F5A */
+ /* X86_64_D4 */
{
- { "vcvtps2pd", { XM, EXxmmq }, 0 },
- { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vcvtpd2ps%XY",{ XMM, EXx }, 0 },
- { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "aam", { Ib }, 0 },
},
- /* PREFIX_VEX_0F5B */
+ /* X86_64_D5 */
{
- { "vcvtdq2ps", { XM, EXx }, 0 },
- { "vcvttps2dq", { XM, EXx }, 0 },
- { "vcvtps2dq", { XM, EXx }, 0 },
+ { "aad", { Ib }, 0 },
},
- /* PREFIX_VEX_0F5C */
+ /* X86_64_E8 */
{
- { "vsubps", { XM, Vex, EXx }, 0 },
- { "vsubss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vsubpd", { XM, Vex, EXx }, 0 },
- { "vsubsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "callP", { Jv, BND }, 0 },
+ { "call@", { Jv, BND }, 0 }
},
- /* PREFIX_VEX_0F5D */
+ /* X86_64_E9 */
{
- { "vminps", { XM, Vex, EXx }, 0 },
- { "vminss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vminpd", { XM, Vex, EXx }, 0 },
- { "vminsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "jmpP", { Jv, BND }, 0 },
+ { "jmp@", { Jv, BND }, 0 }
},
- /* PREFIX_VEX_0F5E */
+ /* X86_64_EA */
{
- { "vdivps", { XM, Vex, EXx }, 0 },
- { "vdivss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vdivpd", { XM, Vex, EXx }, 0 },
- { "vdivsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "{l|}jmp{P|}", { Ap }, 0 },
},
- /* PREFIX_VEX_0F5F */
+ /* X86_64_0F01_REG_0 */
{
- { "vmaxps", { XM, Vex, EXx }, 0 },
- { "vmaxss", { XMScalar, VexScalar, EXxmm_md }, 0 },
- { "vmaxpd", { XM, Vex, EXx }, 0 },
- { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "sgdt{Q|Q}", { M }, 0 },
+ { "sgdt", { M }, 0 },
},
- /* PREFIX_VEX_0F60 */
+ /* X86_64_0F01_REG_1 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpunpcklbw", { XM, Vex, EXx }, 0 },
+ { "sidt{Q|Q}", { M }, 0 },
+ { "sidt", { M }, 0 },
},
- /* PREFIX_VEX_0F61 */
+ /* X86_64_0F01_REG_1_RM_5_PREFIX_2 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpunpcklwd", { XM, Vex, EXx }, 0 },
+ { "seamret", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F62 */
+ /* X86_64_0F01_REG_1_RM_6_PREFIX_2 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpunpckldq", { XM, Vex, EXx }, 0 },
+ { "seamops", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F63 */
+ /* X86_64_0F01_REG_1_RM_7_PREFIX_2 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpacksswb", { XM, Vex, EXx }, 0 },
+ { "seamcall", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F64 */
+ /* X86_64_0F01_REG_2 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpgtb", { XM, Vex, EXx }, 0 },
+ { "lgdt{Q|Q}", { M }, 0 },
+ { "lgdt", { M }, 0 },
},
- /* PREFIX_VEX_0F65 */
+ /* X86_64_0F01_REG_3 */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpgtw", { XM, Vex, EXx }, 0 },
+ { "lidt{Q|Q}", { M }, 0 },
+ { "lidt", { M }, 0 },
},
- /* PREFIX_VEX_0F66 */
+ /* X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpgtd", { XM, Vex, EXx }, 0 },
+ { "uiret", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F67 */
+ /* X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpackuswb", { XM, Vex, EXx }, 0 },
+ { "testui", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F68 */
+ /* X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpunpckhbw", { XM, Vex, EXx }, 0 },
+ { "clui", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F69 */
+ /* X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpunpckhwd", { XM, Vex, EXx }, 0 },
+ { "stui", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F6A */
+ /* X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpunpckhdq", { XM, Vex, EXx }, 0 },
+ { "rmpadjust", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F6B */
+ /* X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpackssdw", { XM, Vex, EXx }, 0 },
+ { "rmpupdate", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F6C */
+ /* X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { "vpunpcklqdq", { XM, Vex, EXx }, 0 },
+ { "psmash", { Skip_MODRM }, 0 },
},
- /* PREFIX_VEX_0F6D */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpunpckhqdq", { XM, Vex, EXx }, 0 },
+ /* X86_64_0F24 */
+ { "movZ", { Em, Td }, 0 },
},
- /* PREFIX_VEX_0F6E */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F6E_P_2) },
- },
-
- /* PREFIX_VEX_0F6F */
- {
- { Bad_Opcode },
- { "vmovdqu", { XM, EXx }, 0 },
- { "vmovdqa", { XM, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F70 */
- {
- { Bad_Opcode },
- { "vpshufhw", { XM, EXx, Ib }, 0 },
- { "vpshufd", { XM, EXx, Ib }, 0 },
- { "vpshuflw", { XM, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F71_REG_2 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrlw", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F71_REG_4 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsraw", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F71_REG_6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsllw", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F72_REG_2 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrld", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F72_REG_4 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrad", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F72_REG_6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpslld", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F73_REG_2 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrlq", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F73_REG_3 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrldq", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F73_REG_6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsllq", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F73_REG_7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpslldq", { Vex, XS, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F74 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpeqb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F75 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpeqw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F76 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpeqd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F77 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F77_P_0) },
- },
-
- /* PREFIX_VEX_0F7C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vhaddpd", { XM, Vex, EXx }, 0 },
- { "vhaddps", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F7D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vhsubpd", { XM, Vex, EXx }, 0 },
- { "vhsubps", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F7E */
- {
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) },
- { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) },
- },
-
- /* PREFIX_VEX_0F7F */
- {
- { Bad_Opcode },
- { "vmovdqu", { EXxS, XM }, 0 },
- { "vmovdqa", { EXxS, XM }, 0 },
- },
-
- /* PREFIX_VEX_0F90 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F90_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F90_P_2) },
- },
-
- /* PREFIX_VEX_0F91 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F91_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F91_P_2) },
- },
-
- /* PREFIX_VEX_0F92 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F92_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F92_P_2) },
- { VEX_LEN_TABLE (VEX_LEN_0F92_P_3) },
- },
-
- /* PREFIX_VEX_0F93 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F93_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F93_P_2) },
- { VEX_LEN_TABLE (VEX_LEN_0F93_P_3) },
- },
-
- /* PREFIX_VEX_0F98 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F98_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F98_P_2) },
- },
-
- /* PREFIX_VEX_0F99 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F99_P_0) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F99_P_2) },
- },
-
- /* PREFIX_VEX_0FC2 */
- {
- { "vcmpps", { XM, Vex, EXx, VCMP }, 0 },
- { "vcmpss", { XMScalar, VexScalar, EXxmm_md, VCMP }, 0 },
- { "vcmppd", { XM, Vex, EXx, VCMP }, 0 },
- { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, VCMP }, 0 },
- },
-
- /* PREFIX_VEX_0FC4 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0FC4_P_2) },
- },
-
- /* PREFIX_VEX_0FC5 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0FC5_P_2) },
- },
-
- /* PREFIX_VEX_0FD0 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vaddsubpd", { XM, Vex, EXx }, 0 },
- { "vaddsubps", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FD1 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrlw", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FD2 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrld", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FD3 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrlq", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FD4 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddq", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FD5 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmullw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FD6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0FD6_P_2) },
- },
-
- /* PREFIX_VEX_0FD7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0FD7_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0FD8 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubusb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FD9 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubusw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FDA */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpminub", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FDB */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpand", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FDC */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddusb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FDD */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddusw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FDE */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaxub", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FDF */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpandn", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE0 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpavgb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE1 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsraw", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FE2 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrad", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FE3 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpavgw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE4 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmulhuw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE5 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmulhw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE6 */
- {
- { Bad_Opcode },
- { "vcvtdq2pd", { XM, EXxmmq }, 0 },
- { "vcvttpd2dq%XY", { XMM, EXx }, 0 },
- { "vcvtpd2dq%XY", { XMM, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0FE7_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0FE8 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubsb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FE9 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FEA */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpminsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FEB */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpor", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FEC */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddsb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FED */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FEE */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaxsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FEF */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpxor", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FF0 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0FF0_PREFIX_3) },
- },
-
- /* PREFIX_VEX_0FF1 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsllw", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FF2 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpslld", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FF3 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsllq", { XM, Vex, EXxmm }, 0 },
- },
-
- /* PREFIX_VEX_0FF4 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmuludq", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FF5 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaddwd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FF6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsadbw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FF7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0FF7_P_2) },
- },
-
- /* PREFIX_VEX_0FF8 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FF9 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FFA */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FFB */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsubq", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FFC */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FFD */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0FFE */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpaddd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3800 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpshufb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3801 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vphaddw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3802 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vphaddd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3803 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vphaddsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3804 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaddubsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3805 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vphsubw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3806 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vphsubd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3807 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vphsubsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3808 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsignb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3809 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsignw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F380A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsignd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F380B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmulhrsw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F380C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F380C_P_2) },
- },
-
- /* PREFIX_VEX_0F380D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F380D_P_2) },
- },
-
- /* PREFIX_VEX_0F380E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F380E_P_2) },
- },
-
- /* PREFIX_VEX_0F380F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F380F_P_2) },
- },
-
- /* PREFIX_VEX_0F3813 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3813_P_2) },
- },
-
- /* PREFIX_VEX_0F3816 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3816_P_2) },
- },
-
- /* PREFIX_VEX_0F3817 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vptest", { XM, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3818 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3818_P_2) },
- },
-
- /* PREFIX_VEX_0F3819 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3819_P_2) },
- },
-
- /* PREFIX_VEX_0F381A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F381A_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F381C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpabsb", { XM, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F381D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpabsw", { XM, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F381E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpabsd", { XM, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3820 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovsxbw", { XM, EXxmmq }, 0 },
- },
-
- /* PREFIX_VEX_0F3821 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovsxbd", { XM, EXxmmqd }, 0 },
- },
-
- /* PREFIX_VEX_0F3822 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovsxbq", { XM, EXxmmdw }, 0 },
- },
-
- /* PREFIX_VEX_0F3823 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovsxwd", { XM, EXxmmq }, 0 },
- },
-
- /* PREFIX_VEX_0F3824 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovsxwq", { XM, EXxmmqd }, 0 },
- },
-
- /* PREFIX_VEX_0F3825 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovsxdq", { XM, EXxmmq }, 0 },
- },
-
- /* PREFIX_VEX_0F3828 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmuldq", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3829 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpeqq", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F382A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F382A_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F382B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpackusdw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F382C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F382C_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F382D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F382D_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F382E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F382E_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F382F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F382F_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F3830 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovzxbw", { XM, EXxmmq }, 0 },
- },
-
- /* PREFIX_VEX_0F3831 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovzxbd", { XM, EXxmmqd }, 0 },
- },
-
- /* PREFIX_VEX_0F3832 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovzxbq", { XM, EXxmmdw }, 0 },
- },
-
- /* PREFIX_VEX_0F3833 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovzxwd", { XM, EXxmmq }, 0 },
- },
-
- /* PREFIX_VEX_0F3834 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovzxwq", { XM, EXxmmqd }, 0 },
- },
-
- /* PREFIX_VEX_0F3835 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmovzxdq", { XM, EXxmmq }, 0 },
- },
-
- /* PREFIX_VEX_0F3836 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3836_P_2) },
- },
-
- /* PREFIX_VEX_0F3837 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpcmpgtq", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3838 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpminsb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3839 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpminsd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F383A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpminuw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F383B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpminud", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F383C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaxsb", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F383D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaxsd", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F383E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaxuw", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F383F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmaxud", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3840 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpmulld", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3841 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3841_P_2) },
- },
-
- /* PREFIX_VEX_0F3845 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsrlv%LW", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3846 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3846_P_2) },
- },
-
- /* PREFIX_VEX_0F3847 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpsllv%LW", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F3858 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3858_P_2) },
- },
-
- /* PREFIX_VEX_0F3859 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3859_P_2) },
- },
-
- /* PREFIX_VEX_0F385A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F385A_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F3878 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3878_P_2) },
- },
-
- /* PREFIX_VEX_0F3879 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3879_P_2) },
- },
-
- /* PREFIX_VEX_0F388C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F388C_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F388E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { MOD_TABLE (MOD_VEX_0F388E_PREFIX_2) },
- },
-
- /* PREFIX_VEX_0F3890 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpgatherd%LW", { XM, MVexVSIBDWpX, Vex }, 0 },
- },
-
- /* PREFIX_VEX_0F3891 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpgatherq%LW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
- },
-
- /* PREFIX_VEX_0F3892 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vgatherdp%XW", { XM, MVexVSIBDWpX, Vex }, 0 },
- },
-
- /* PREFIX_VEX_0F3893 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vgatherqp%XW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
- },
-
- /* PREFIX_VEX_0F3896 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F3897 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F3898 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F3899 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F389A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsub132p%XW", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F389B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
- },
-
- /* PREFIX_VEX_0F389C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F389D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F389E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F389F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38A6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- { Bad_Opcode },
- },
-
- /* PREFIX_VEX_0F38A7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38A8 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38A9 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38AA */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsub213p%XW", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F38AB */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
- },
-
- /* PREFIX_VEX_0F38AC */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38AD */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38AE */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38AF */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38B6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38B7 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38B8 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38B9 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38BA */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38BB */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38BC */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38BD */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38BE */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38BF */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
- },
-
- /* PREFIX_VEX_0F38CF */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F38CF_P_2) },
- },
-
- /* PREFIX_VEX_0F38DB */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38DB_P_2) },
- },
-
- /* PREFIX_VEX_0F38DC */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vaesenc", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F38DD */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vaesenclast", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F38DE */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vaesdec", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F38DF */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vaesdeclast", { XM, Vex, EXx }, 0 },
- },
-
- /* PREFIX_VEX_0F38F2 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F2_P_0) },
- },
-
- /* PREFIX_VEX_0F38F3_REG_1 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_1_P_0) },
- },
-
- /* PREFIX_VEX_0F38F3_REG_2 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_2_P_0) },
- },
-
- /* PREFIX_VEX_0F38F3_REG_3 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3_P_0) },
- },
-
- /* PREFIX_VEX_0F38F5 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_0) },
- { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_1) },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_3) },
- },
-
- /* PREFIX_VEX_0F38F6 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38F6_P_3) },
- },
-
- /* PREFIX_VEX_0F38F7 */
- {
- { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_0) },
- { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_1) },
- { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_2) },
- { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_3) },
- },
-
- /* PREFIX_VEX_0F3A00 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A00_P_2) },
- },
-
- /* PREFIX_VEX_0F3A01 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A01_P_2) },
- },
-
- /* PREFIX_VEX_0F3A02 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A02_P_2) },
- },
-
- /* PREFIX_VEX_0F3A04 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A04_P_2) },
- },
-
- /* PREFIX_VEX_0F3A05 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A05_P_2) },
- },
-
- /* PREFIX_VEX_0F3A06 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A06_P_2) },
- },
-
- /* PREFIX_VEX_0F3A08 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vroundps", { XM, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A09 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vroundpd", { XM, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A0A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vroundss", { XMScalar, VexScalar, EXxmm_md, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A0B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vroundsd", { XMScalar, VexScalar, EXxmm_mq, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A0C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vblendps", { XM, Vex, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A0D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vblendpd", { XM, Vex, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A0E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpblendw", { XM, Vex, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A0F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpalignr", { XM, Vex, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A14 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A14_P_2) },
- },
-
- /* PREFIX_VEX_0F3A15 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A15_P_2) },
- },
-
- /* PREFIX_VEX_0F3A16 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A16_P_2) },
- },
-
- /* PREFIX_VEX_0F3A17 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A17_P_2) },
- },
-
- /* PREFIX_VEX_0F3A18 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A18_P_2) },
- },
-
- /* PREFIX_VEX_0F3A19 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A19_P_2) },
- },
-
- /* PREFIX_VEX_0F3A1D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A1D_P_2) },
- },
-
- /* PREFIX_VEX_0F3A20 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A20_P_2) },
- },
-
- /* PREFIX_VEX_0F3A21 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A21_P_2) },
- },
-
- /* PREFIX_VEX_0F3A22 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A22_P_2) },
- },
-
- /* PREFIX_VEX_0F3A30 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A30_P_2) },
- },
-
- /* PREFIX_VEX_0F3A31 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A31_P_2) },
- },
-
- /* PREFIX_VEX_0F3A32 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A32_P_2) },
- },
-
- /* PREFIX_VEX_0F3A33 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A33_P_2) },
- },
-
- /* PREFIX_VEX_0F3A38 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A38_P_2) },
- },
-
- /* PREFIX_VEX_0F3A39 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A39_P_2) },
- },
-
- /* PREFIX_VEX_0F3A40 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vdpps", { XM, Vex, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A41 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A41_P_2) },
- },
-
- /* PREFIX_VEX_0F3A42 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vmpsadbw", { XM, Vex, EXx, Ib }, 0 },
- },
-
- /* PREFIX_VEX_0F3A44 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, 0 },
- },
-
- /* PREFIX_VEX_0F3A46 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A46_P_2) },
- },
-
- /* PREFIX_VEX_0F3A48 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A48_P_2) },
- },
-
- /* PREFIX_VEX_0F3A49 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A49_P_2) },
- },
-
- /* PREFIX_VEX_0F3A4A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A4A_P_2) },
- },
-
- /* PREFIX_VEX_0F3A4B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A4B_P_2) },
- },
-
- /* PREFIX_VEX_0F3A4C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A4C_P_2) },
- },
-
- /* PREFIX_VEX_0F3A5C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddsubps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A5D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddsubpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A5E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubaddps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A5F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubaddpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A60 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A60_P_2) },
- { Bad_Opcode },
- },
-
- /* PREFIX_VEX_0F3A61 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A61_P_2) },
- },
-
- /* PREFIX_VEX_0F3A62 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A62_P_2) },
- },
-
- /* PREFIX_VEX_0F3A63 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A63_P_2) },
- },
-
- /* PREFIX_VEX_0F3A68 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A69 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmaddpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A6A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6A_P_2) },
- },
-
- /* PREFIX_VEX_0F3A6B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6B_P_2) },
- },
-
- /* PREFIX_VEX_0F3A6C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A6D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfmsubpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A6E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6E_P_2) },
- },
-
- /* PREFIX_VEX_0F3A6F */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6F_P_2) },
- },
-
- /* PREFIX_VEX_0F3A78 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmaddps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A79 */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmaddpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A7A */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7A_P_2) },
- },
-
- /* PREFIX_VEX_0F3A7B */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7B_P_2) },
- },
-
- /* PREFIX_VEX_0F3A7C */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsubps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { Bad_Opcode },
- },
-
- /* PREFIX_VEX_0F3A7D */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { "vfnmsubpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- },
-
- /* PREFIX_VEX_0F3A7E */
- {
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7E_P_2) },
+ /* X86_64_0F26 */
+ { "movZ", { Td, Em }, 0 },
},
- /* PREFIX_VEX_0F3A7F */
+ /* X86_64_0FC7_REG_6_MOD_3_PREFIX_1 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7F_P_2) },
+ { "senduipi", { Eq }, 0 },
},
- /* PREFIX_VEX_0F3ACE */
+ /* X86_64_VEX_0F3849 */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3ACE_P_2) },
+ { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64) },
},
- /* PREFIX_VEX_0F3ACF */
+ /* X86_64_VEX_0F384B */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3ACF_P_2) },
+ { PREFIX_TABLE (PREFIX_VEX_0F384B_X86_64) },
},
- /* PREFIX_VEX_0F3ADF */
+ /* X86_64_VEX_0F385C */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3ADF_P_2) },
+ { PREFIX_TABLE (PREFIX_VEX_0F385C_X86_64) },
},
- /* PREFIX_VEX_0F3AF0 */
+ /* X86_64_VEX_0F385E */
{
{ Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3AF0_P_3) },
- },
-
-#include "i386-dis-evex-prefix.h"
-};
-
-static const struct dis386 x86_64_table[][2] = {
- /* X86_64_06 */
- {
- { "pushP", { es }, 0 },
- },
-
- /* X86_64_07 */
- {
- { "popP", { es }, 0 },
- },
-
- /* X86_64_0E */
- {
- { "pushP", { cs }, 0 },
- },
-
- /* X86_64_16 */
- {
- { "pushP", { ss }, 0 },
- },
-
- /* X86_64_17 */
- {
- { "popP", { ss }, 0 },
- },
-
- /* X86_64_1E */
- {
- { "pushP", { ds }, 0 },
- },
-
- /* X86_64_1F */
- {
- { "popP", { ds }, 0 },
- },
-
- /* X86_64_27 */
- {
- { "daa", { XX }, 0 },
- },
-
- /* X86_64_2F */
- {
- { "das", { XX }, 0 },
- },
-
- /* X86_64_37 */
- {
- { "aaa", { XX }, 0 },
- },
-
- /* X86_64_3F */
- {
- { "aas", { XX }, 0 },
- },
-
- /* X86_64_60 */
- {
- { "pushaP", { XX }, 0 },
- },
-
- /* X86_64_61 */
- {
- { "popaP", { XX }, 0 },
- },
-
- /* X86_64_62 */
- {
- { MOD_TABLE (MOD_62_32BIT) },
- { EVEX_TABLE (EVEX_0F) },
- },
-
- /* X86_64_63 */
- {
- { "arpl", { Ew, Gw }, 0 },
- { "movs", { { OP_G, movsxd_mode }, { MOVSXD_Fixup, movsxd_mode } }, 0 },
- },
-
- /* X86_64_6D */
- {
- { "ins{R|}", { Yzr, indirDX }, 0 },
- { "ins{G|}", { Yzr, indirDX }, 0 },
- },
-
- /* X86_64_6F */
- {
- { "outs{R|}", { indirDXr, Xz }, 0 },
- { "outs{G|}", { indirDXr, Xz }, 0 },
- },
-
- /* X86_64_82 */
- {
- /* Opcode 0x82 is an alias of opcode 0x80 in 32-bit mode. */
- { REG_TABLE (REG_80) },
- },
-
- /* X86_64_9A */
- {
- { "{l|}call{T|}", { Ap }, 0 },
- },
-
- /* X86_64_C2 */
- {
- { "retP", { Iw, BND }, 0 },
- { "ret@", { Iw, BND }, 0 },
- },
-
- /* X86_64_C3 */
- {
- { "retP", { BND }, 0 },
- { "ret@", { BND }, 0 },
- },
-
- /* X86_64_C4 */
- {
- { MOD_TABLE (MOD_C4_32BIT) },
- { VEX_C4_TABLE (VEX_0F) },
- },
-
- /* X86_64_C5 */
- {
- { MOD_TABLE (MOD_C5_32BIT) },
- { VEX_C5_TABLE (VEX_0F) },
- },
-
- /* X86_64_CE */
- {
- { "into", { XX }, 0 },
- },
-
- /* X86_64_D4 */
- {
- { "aam", { Ib }, 0 },
- },
-
- /* X86_64_D5 */
- {
- { "aad", { Ib }, 0 },
- },
-
- /* X86_64_E8 */
- {
- { "callP", { Jv, BND }, 0 },
- { "call@", { Jv, BND }, 0 }
- },
-
- /* X86_64_E9 */
- {
- { "jmpP", { Jv, BND }, 0 },
- { "jmp@", { Jv, BND }, 0 }
- },
-
- /* X86_64_EA */
- {
- { "{l|}jmp{T|}", { Ap }, 0 },
- },
-
- /* X86_64_0F01_REG_0 */
- {
- { "sgdt{Q|Q}", { M }, 0 },
- { "sgdt", { M }, 0 },
- },
-
- /* X86_64_0F01_REG_1 */
- {
- { "sidt{Q|Q}", { M }, 0 },
- { "sidt", { M }, 0 },
- },
-
- /* X86_64_0F01_REG_2 */
- {
- { "lgdt{Q|Q}", { M }, 0 },
- { "lgdt", { M }, 0 },
- },
-
- /* X86_64_0F01_REG_3 */
- {
- { "lidt{Q|Q}", { M }, 0 },
- { "lidt", { M }, 0 },
+ { PREFIX_TABLE (PREFIX_VEX_0F385E_X86_64) },
},
};
{ Bad_Opcode },
{ Bad_Opcode },
/* 10 */
- { PREFIX_TABLE (PREFIX_0F3810) },
+ { "pblendvb", { XM, EXx, XMM0 }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3814) },
- { PREFIX_TABLE (PREFIX_0F3815) },
+ { "blendvps", { XM, EXx, XMM0 }, PREFIX_DATA },
+ { "blendvpd", { XM, EXx, XMM0 }, PREFIX_DATA },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3817) },
+ { "ptest", { XM, EXx }, PREFIX_DATA },
/* 18 */
{ Bad_Opcode },
{ Bad_Opcode },
{ "pabsd", { MX, EM }, PREFIX_OPCODE },
{ Bad_Opcode },
/* 20 */
- { PREFIX_TABLE (PREFIX_0F3820) },
- { PREFIX_TABLE (PREFIX_0F3821) },
- { PREFIX_TABLE (PREFIX_0F3822) },
- { PREFIX_TABLE (PREFIX_0F3823) },
- { PREFIX_TABLE (PREFIX_0F3824) },
- { PREFIX_TABLE (PREFIX_0F3825) },
+ { "pmovsxbw", { XM, EXq }, PREFIX_DATA },
+ { "pmovsxbd", { XM, EXd }, PREFIX_DATA },
+ { "pmovsxbq", { XM, EXw }, PREFIX_DATA },
+ { "pmovsxwd", { XM, EXq }, PREFIX_DATA },
+ { "pmovsxwq", { XM, EXd }, PREFIX_DATA },
+ { "pmovsxdq", { XM, EXq }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 28 */
- { PREFIX_TABLE (PREFIX_0F3828) },
- { PREFIX_TABLE (PREFIX_0F3829) },
- { PREFIX_TABLE (PREFIX_0F382A) },
- { PREFIX_TABLE (PREFIX_0F382B) },
+ { "pmuldq", { XM, EXx }, PREFIX_DATA },
+ { "pcmpeqq", { XM, EXx }, PREFIX_DATA },
+ { MOD_TABLE (MOD_0F382A) },
+ { "packusdw", { XM, EXx }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 30 */
- { PREFIX_TABLE (PREFIX_0F3830) },
- { PREFIX_TABLE (PREFIX_0F3831) },
- { PREFIX_TABLE (PREFIX_0F3832) },
- { PREFIX_TABLE (PREFIX_0F3833) },
- { PREFIX_TABLE (PREFIX_0F3834) },
- { PREFIX_TABLE (PREFIX_0F3835) },
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3837) },
+ { "pmovzxbw", { XM, EXq }, PREFIX_DATA },
+ { "pmovzxbd", { XM, EXd }, PREFIX_DATA },
+ { "pmovzxbq", { XM, EXw }, PREFIX_DATA },
+ { "pmovzxwd", { XM, EXq }, PREFIX_DATA },
+ { "pmovzxwq", { XM, EXd }, PREFIX_DATA },
+ { "pmovzxdq", { XM, EXq }, PREFIX_DATA },
+ { Bad_Opcode },
+ { "pcmpgtq", { XM, EXx }, PREFIX_DATA },
/* 38 */
- { PREFIX_TABLE (PREFIX_0F3838) },
- { PREFIX_TABLE (PREFIX_0F3839) },
- { PREFIX_TABLE (PREFIX_0F383A) },
- { PREFIX_TABLE (PREFIX_0F383B) },
- { PREFIX_TABLE (PREFIX_0F383C) },
- { PREFIX_TABLE (PREFIX_0F383D) },
- { PREFIX_TABLE (PREFIX_0F383E) },
- { PREFIX_TABLE (PREFIX_0F383F) },
+ { "pminsb", { XM, EXx }, PREFIX_DATA },
+ { "pminsd", { XM, EXx }, PREFIX_DATA },
+ { "pminuw", { XM, EXx }, PREFIX_DATA },
+ { "pminud", { XM, EXx }, PREFIX_DATA },
+ { "pmaxsb", { XM, EXx }, PREFIX_DATA },
+ { "pmaxsd", { XM, EXx }, PREFIX_DATA },
+ { "pmaxuw", { XM, EXx }, PREFIX_DATA },
+ { "pmaxud", { XM, EXx }, PREFIX_DATA },
/* 40 */
- { PREFIX_TABLE (PREFIX_0F3840) },
- { PREFIX_TABLE (PREFIX_0F3841) },
+ { "pmulld", { XM, EXx }, PREFIX_DATA },
+ { "phminposuw", { XM, EXx }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 80 */
- { PREFIX_TABLE (PREFIX_0F3880) },
- { PREFIX_TABLE (PREFIX_0F3881) },
- { PREFIX_TABLE (PREFIX_0F3882) },
+ { "invept", { Gm, Mo }, PREFIX_DATA },
+ { "invvpid", { Gm, Mo }, PREFIX_DATA },
+ { "invpcid", { Gm, M }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* c8 */
- { PREFIX_TABLE (PREFIX_0F38C8) },
- { PREFIX_TABLE (PREFIX_0F38C9) },
- { PREFIX_TABLE (PREFIX_0F38CA) },
- { PREFIX_TABLE (PREFIX_0F38CB) },
- { PREFIX_TABLE (PREFIX_0F38CC) },
- { PREFIX_TABLE (PREFIX_0F38CD) },
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F38CF) },
+ { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha1msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha1msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha256rnds2", { XM, EXxmm, XMM0 }, PREFIX_OPCODE },
+ { "sha256msg1", { XM, EXxmm }, PREFIX_OPCODE },
+ { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
+ { Bad_Opcode },
+ { "gf2p8mulb", { XM, EXxmm }, PREFIX_DATA },
/* d0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* d8 */
+ { PREFIX_TABLE (PREFIX_0F38D8) },
{ Bad_Opcode },
{ Bad_Opcode },
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F38DB) },
+ { "aesimc", { XM, EXx }, PREFIX_DATA },
{ PREFIX_TABLE (PREFIX_0F38DC) },
{ PREFIX_TABLE (PREFIX_0F38DD) },
{ PREFIX_TABLE (PREFIX_0F38DE) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F38F5) },
+ { MOD_TABLE (MOD_0F38F5) },
{ PREFIX_TABLE (PREFIX_0F38F6) },
{ Bad_Opcode },
/* f8 */
{ PREFIX_TABLE (PREFIX_0F38F8) },
- { PREFIX_TABLE (PREFIX_0F38F9) },
- { Bad_Opcode },
- { Bad_Opcode },
+ { MOD_TABLE (MOD_0F38F9) },
+ { PREFIX_TABLE (PREFIX_0F38FA) },
+ { PREFIX_TABLE (PREFIX_0F38FB) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 08 */
- { PREFIX_TABLE (PREFIX_0F3A08) },
- { PREFIX_TABLE (PREFIX_0F3A09) },
- { PREFIX_TABLE (PREFIX_0F3A0A) },
- { PREFIX_TABLE (PREFIX_0F3A0B) },
- { PREFIX_TABLE (PREFIX_0F3A0C) },
- { PREFIX_TABLE (PREFIX_0F3A0D) },
- { PREFIX_TABLE (PREFIX_0F3A0E) },
+ { "roundps", { XM, EXx, Ib }, PREFIX_DATA },
+ { "roundpd", { XM, EXx, Ib }, PREFIX_DATA },
+ { "roundss", { XM, EXd, Ib }, PREFIX_DATA },
+ { "roundsd", { XM, EXq, Ib }, PREFIX_DATA },
+ { "blendps", { XM, EXx, Ib }, PREFIX_DATA },
+ { "blendpd", { XM, EXx, Ib }, PREFIX_DATA },
+ { "pblendw", { XM, EXx, Ib }, PREFIX_DATA },
{ "palignr", { MX, EM, Ib }, PREFIX_OPCODE },
/* 10 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3A14) },
- { PREFIX_TABLE (PREFIX_0F3A15) },
- { PREFIX_TABLE (PREFIX_0F3A16) },
- { PREFIX_TABLE (PREFIX_0F3A17) },
+ { "pextrb", { Edb, XM, Ib }, PREFIX_DATA },
+ { "pextrw", { Edw, XM, Ib }, PREFIX_DATA },
+ { "pextrK", { Edq, XM, Ib }, PREFIX_DATA },
+ { "extractps", { Ed, XM, Ib }, PREFIX_DATA },
/* 18 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 20 */
- { PREFIX_TABLE (PREFIX_0F3A20) },
- { PREFIX_TABLE (PREFIX_0F3A21) },
- { PREFIX_TABLE (PREFIX_0F3A22) },
+ { "pinsrb", { XM, Edb, Ib }, PREFIX_DATA },
+ { "insertps", { XM, EXd, Ib }, PREFIX_DATA },
+ { "pinsrK", { XM, Edq, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 40 */
- { PREFIX_TABLE (PREFIX_0F3A40) },
- { PREFIX_TABLE (PREFIX_0F3A41) },
- { PREFIX_TABLE (PREFIX_0F3A42) },
+ { "dpps", { XM, EXx, Ib }, PREFIX_DATA },
+ { "dppd", { XM, EXx, Ib }, PREFIX_DATA },
+ { "mpsadbw", { XM, EXx, Ib }, PREFIX_DATA },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3A44) },
+ { "pclmulqdq", { XM, EXx, PCLMUL }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 60 */
- { PREFIX_TABLE (PREFIX_0F3A60) },
- { PREFIX_TABLE (PREFIX_0F3A61) },
- { PREFIX_TABLE (PREFIX_0F3A62) },
- { PREFIX_TABLE (PREFIX_0F3A63) },
+ { "pcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
+ { "pcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
+ { "pcmpistrm", { XM, EXx, Ib }, PREFIX_DATA },
+ { "pcmpistri", { XM, EXx, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3ACC) },
+ { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3ACE) },
- { PREFIX_TABLE (PREFIX_0F3ACF) },
+ { "gf2p8affineqb", { XM, EXxmm, Ib }, PREFIX_DATA },
+ { "gf2p8affineinvqb", { XM, EXxmm, Ib }, PREFIX_DATA },
/* d0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F3ADF) },
+ { "aeskeygenassist", { XM, EXx, Ib }, PREFIX_DATA },
/* e0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* f0 */
- { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_0F3A0F) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacssww", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacsswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacssdql", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_85) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_86) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_87) },
/* 88 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacssdd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacssdqh", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_8E) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_8F) },
/* 90 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacsww", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacsdql", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_95) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_96) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_97) },
/* 98 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacsdd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacsdqh", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_9E) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_9F) },
/* a0 */
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpcmov", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpperm", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpcmov", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_A3) },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmadcsswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_A6) },
{ Bad_Opcode },
/* a8 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmadcswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_B6) },
{ Bad_Opcode },
/* b8 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* c0 */
- { "vprotb", { XM, Vex_2src_1, Ib }, 0 },
- { "vprotw", { XM, Vex_2src_1, Ib }, 0 },
- { "vprotd", { XM, Vex_2src_1, Ib }, 0 },
- { "vprotq", { XM, Vex_2src_1, Ib }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_C0) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_C1) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_C2) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_08_C3) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{
/* 00 */
{ Bad_Opcode },
- { REG_TABLE (REG_XOP_TBM_01) },
- { REG_TABLE (REG_XOP_TBM_02) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_01) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_02) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 10 */
{ Bad_Opcode },
{ Bad_Opcode },
- { REG_TABLE (REG_XOP_LWPCB) },
+ { MOD_TABLE (MOD_XOP_09_12) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 80 */
- { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_80) },
- { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_81) },
- { "vfrczss", { XM, EXd }, 0 },
- { "vfrczsd", { XM, EXq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_80) },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_81) },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_82) },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_83) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 90 */
- { "vprotb", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vprotw", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vprotd", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vprotq", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshlb", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshlw", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshld", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshlq", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_90) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_91) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_92) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_93) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_94) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_95) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_96) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_97) },
/* 98 */
- { "vpshab", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshaw", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshad", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshaq", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_98) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_99) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_9A) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_9B) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* c0 */
{ Bad_Opcode },
- { "vphaddbw", { XM, EXxmm }, 0 },
- { "vphaddbd", { XM, EXxmm }, 0 },
- { "vphaddbq", { XM, EXxmm }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_C1) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_C2) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_C3) },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vphaddwd", { XM, EXxmm }, 0 },
- { "vphaddwq", { XM, EXxmm }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_C6) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_C7) },
/* c8 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vphadddq", { XM, EXxmm }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_CB) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* d0 */
{ Bad_Opcode },
- { "vphaddubw", { XM, EXxmm }, 0 },
- { "vphaddubd", { XM, EXxmm }, 0 },
- { "vphaddubq", { XM, EXxmm }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_D1) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_D2) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_D3) },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vphadduwd", { XM, EXxmm }, 0 },
- { "vphadduwq", { XM, EXxmm }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_D6) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_D7) },
/* d8 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vphaddudq", { XM, EXxmm }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_DB) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* e0 */
{ Bad_Opcode },
- { "vphsubbw", { XM, EXxmm }, 0 },
- { "vphsubwd", { XM, EXxmm }, 0 },
- { "vphsubdq", { XM, EXxmm }, 0 },
- { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_E1) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_E2) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_E3) },
+ { Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 10 */
{ "bextrS", { Gdq, Edq, Id }, 0 },
{ Bad_Opcode },
- { REG_TABLE (REG_XOP_LWP) },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_0A_12) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 40 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F41) },
- { PREFIX_TABLE (PREFIX_VEX_0F42) },
+ { VEX_LEN_TABLE (VEX_LEN_0F41) },
+ { VEX_LEN_TABLE (VEX_LEN_0F42) },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F44) },
- { PREFIX_TABLE (PREFIX_VEX_0F45) },
- { PREFIX_TABLE (PREFIX_VEX_0F46) },
- { PREFIX_TABLE (PREFIX_VEX_0F47) },
+ { VEX_LEN_TABLE (VEX_LEN_0F44) },
+ { VEX_LEN_TABLE (VEX_LEN_0F45) },
+ { VEX_LEN_TABLE (VEX_LEN_0F46) },
+ { VEX_LEN_TABLE (VEX_LEN_0F47) },
/* 48 */
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F4A) },
- { PREFIX_TABLE (PREFIX_VEX_0F4B) },
+ { VEX_LEN_TABLE (VEX_LEN_0F4A) },
+ { VEX_LEN_TABLE (VEX_LEN_0F4B) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F5E) },
{ PREFIX_TABLE (PREFIX_VEX_0F5F) },
/* 60 */
- { PREFIX_TABLE (PREFIX_VEX_0F60) },
- { PREFIX_TABLE (PREFIX_VEX_0F61) },
- { PREFIX_TABLE (PREFIX_VEX_0F62) },
- { PREFIX_TABLE (PREFIX_VEX_0F63) },
- { PREFIX_TABLE (PREFIX_VEX_0F64) },
- { PREFIX_TABLE (PREFIX_VEX_0F65) },
- { PREFIX_TABLE (PREFIX_VEX_0F66) },
- { PREFIX_TABLE (PREFIX_VEX_0F67) },
+ { "vpunpcklbw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpunpcklwd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpunpckldq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpacksswb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpackuswb", { XM, Vex, EXx }, PREFIX_DATA },
/* 68 */
- { PREFIX_TABLE (PREFIX_VEX_0F68) },
- { PREFIX_TABLE (PREFIX_VEX_0F69) },
- { PREFIX_TABLE (PREFIX_VEX_0F6A) },
- { PREFIX_TABLE (PREFIX_VEX_0F6B) },
- { PREFIX_TABLE (PREFIX_VEX_0F6C) },
- { PREFIX_TABLE (PREFIX_VEX_0F6D) },
- { PREFIX_TABLE (PREFIX_VEX_0F6E) },
+ { "vpunpckhbw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpunpckhwd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpunpckhdq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpackssdw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpunpcklqdq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpunpckhqdq", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0F6E) },
{ PREFIX_TABLE (PREFIX_VEX_0F6F) },
/* 70 */
{ PREFIX_TABLE (PREFIX_VEX_0F70) },
- { REG_TABLE (REG_VEX_0F71) },
- { REG_TABLE (REG_VEX_0F72) },
- { REG_TABLE (REG_VEX_0F73) },
- { PREFIX_TABLE (PREFIX_VEX_0F74) },
- { PREFIX_TABLE (PREFIX_VEX_0F75) },
- { PREFIX_TABLE (PREFIX_VEX_0F76) },
- { PREFIX_TABLE (PREFIX_VEX_0F77) },
+ { MOD_TABLE (MOD_VEX_0F71) },
+ { MOD_TABLE (MOD_VEX_0F72) },
+ { MOD_TABLE (MOD_VEX_0F73) },
+ { "vpcmpeqb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqd", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0F77) },
/* 78 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 90 */
- { PREFIX_TABLE (PREFIX_VEX_0F90) },
- { PREFIX_TABLE (PREFIX_VEX_0F91) },
- { PREFIX_TABLE (PREFIX_VEX_0F92) },
- { PREFIX_TABLE (PREFIX_VEX_0F93) },
+ { VEX_LEN_TABLE (VEX_LEN_0F90) },
+ { VEX_LEN_TABLE (VEX_LEN_0F91) },
+ { VEX_LEN_TABLE (VEX_LEN_0F92) },
+ { VEX_LEN_TABLE (VEX_LEN_0F93) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 98 */
- { PREFIX_TABLE (PREFIX_VEX_0F98) },
- { PREFIX_TABLE (PREFIX_VEX_0F99) },
+ { VEX_LEN_TABLE (VEX_LEN_0F98) },
+ { VEX_LEN_TABLE (VEX_LEN_0F99) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0FC2) },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0FC4) },
- { PREFIX_TABLE (PREFIX_VEX_0FC5) },
+ { VEX_LEN_TABLE (VEX_LEN_0FC4) },
+ { VEX_LEN_TABLE (VEX_LEN_0FC5) },
{ "vshufpX", { XM, Vex, EXx, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
/* c8 */
{ Bad_Opcode },
/* d0 */
{ PREFIX_TABLE (PREFIX_VEX_0FD0) },
- { PREFIX_TABLE (PREFIX_VEX_0FD1) },
- { PREFIX_TABLE (PREFIX_VEX_0FD2) },
- { PREFIX_TABLE (PREFIX_VEX_0FD3) },
- { PREFIX_TABLE (PREFIX_VEX_0FD4) },
- { PREFIX_TABLE (PREFIX_VEX_0FD5) },
- { PREFIX_TABLE (PREFIX_VEX_0FD6) },
- { PREFIX_TABLE (PREFIX_VEX_0FD7) },
+ { "vpsrlw", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpsrld", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpsrlq", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpaddq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmullw", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0FD6) },
+ { MOD_TABLE (MOD_VEX_0FD7) },
/* d8 */
- { PREFIX_TABLE (PREFIX_VEX_0FD8) },
- { PREFIX_TABLE (PREFIX_VEX_0FD9) },
- { PREFIX_TABLE (PREFIX_VEX_0FDA) },
- { PREFIX_TABLE (PREFIX_VEX_0FDB) },
- { PREFIX_TABLE (PREFIX_VEX_0FDC) },
- { PREFIX_TABLE (PREFIX_VEX_0FDD) },
- { PREFIX_TABLE (PREFIX_VEX_0FDE) },
- { PREFIX_TABLE (PREFIX_VEX_0FDF) },
+ { "vpsubusb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsubusw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpminub", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpand", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddusb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddusw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaxub", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpandn", { XM, Vex, EXx }, PREFIX_DATA },
/* e0 */
- { PREFIX_TABLE (PREFIX_VEX_0FE0) },
- { PREFIX_TABLE (PREFIX_VEX_0FE1) },
- { PREFIX_TABLE (PREFIX_VEX_0FE2) },
- { PREFIX_TABLE (PREFIX_VEX_0FE3) },
- { PREFIX_TABLE (PREFIX_VEX_0FE4) },
- { PREFIX_TABLE (PREFIX_VEX_0FE5) },
+ { "vpavgb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsraw", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpsrad", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpavgw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmulhuw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmulhw", { XM, Vex, EXx }, PREFIX_DATA },
{ PREFIX_TABLE (PREFIX_VEX_0FE6) },
- { PREFIX_TABLE (PREFIX_VEX_0FE7) },
+ { MOD_TABLE (MOD_VEX_0FE7) },
/* e8 */
- { PREFIX_TABLE (PREFIX_VEX_0FE8) },
- { PREFIX_TABLE (PREFIX_VEX_0FE9) },
- { PREFIX_TABLE (PREFIX_VEX_0FEA) },
- { PREFIX_TABLE (PREFIX_VEX_0FEB) },
- { PREFIX_TABLE (PREFIX_VEX_0FEC) },
- { PREFIX_TABLE (PREFIX_VEX_0FED) },
- { PREFIX_TABLE (PREFIX_VEX_0FEE) },
- { PREFIX_TABLE (PREFIX_VEX_0FEF) },
+ { "vpsubsb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsubsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpminsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpor", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddsb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaxsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpxor", { XM, Vex, EXx }, PREFIX_DATA },
/* f0 */
{ PREFIX_TABLE (PREFIX_VEX_0FF0) },
- { PREFIX_TABLE (PREFIX_VEX_0FF1) },
- { PREFIX_TABLE (PREFIX_VEX_0FF2) },
- { PREFIX_TABLE (PREFIX_VEX_0FF3) },
- { PREFIX_TABLE (PREFIX_VEX_0FF4) },
- { PREFIX_TABLE (PREFIX_VEX_0FF5) },
- { PREFIX_TABLE (PREFIX_VEX_0FF6) },
- { PREFIX_TABLE (PREFIX_VEX_0FF7) },
+ { "vpsllw", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpslld", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpsllq", { XM, Vex, EXxmm }, PREFIX_DATA },
+ { "vpmuludq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaddwd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsadbw", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0FF7) },
/* f8 */
- { PREFIX_TABLE (PREFIX_VEX_0FF8) },
- { PREFIX_TABLE (PREFIX_VEX_0FF9) },
- { PREFIX_TABLE (PREFIX_VEX_0FFA) },
- { PREFIX_TABLE (PREFIX_VEX_0FFB) },
- { PREFIX_TABLE (PREFIX_VEX_0FFC) },
- { PREFIX_TABLE (PREFIX_VEX_0FFD) },
- { PREFIX_TABLE (PREFIX_VEX_0FFE) },
+ { "vpsubb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsubw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsubd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsubq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpaddd", { XM, Vex, EXx }, PREFIX_DATA },
{ Bad_Opcode },
},
/* VEX_0F38 */
{
/* 00 */
- { PREFIX_TABLE (PREFIX_VEX_0F3800) },
- { PREFIX_TABLE (PREFIX_VEX_0F3801) },
- { PREFIX_TABLE (PREFIX_VEX_0F3802) },
- { PREFIX_TABLE (PREFIX_VEX_0F3803) },
- { PREFIX_TABLE (PREFIX_VEX_0F3804) },
- { PREFIX_TABLE (PREFIX_VEX_0F3805) },
- { PREFIX_TABLE (PREFIX_VEX_0F3806) },
- { PREFIX_TABLE (PREFIX_VEX_0F3807) },
+ { "vpshufb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vphaddw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vphaddd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vphaddsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaddubsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vphsubw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vphsubd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vphsubsw", { XM, Vex, EXx }, PREFIX_DATA },
/* 08 */
- { PREFIX_TABLE (PREFIX_VEX_0F3808) },
- { PREFIX_TABLE (PREFIX_VEX_0F3809) },
- { PREFIX_TABLE (PREFIX_VEX_0F380A) },
- { PREFIX_TABLE (PREFIX_VEX_0F380B) },
- { PREFIX_TABLE (PREFIX_VEX_0F380C) },
- { PREFIX_TABLE (PREFIX_VEX_0F380D) },
- { PREFIX_TABLE (PREFIX_VEX_0F380E) },
- { PREFIX_TABLE (PREFIX_VEX_0F380F) },
+ { "vpsignb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsignw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpsignd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmulhrsw", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_W_TABLE (VEX_W_0F380C) },
+ { VEX_W_TABLE (VEX_W_0F380D) },
+ { VEX_W_TABLE (VEX_W_0F380E) },
+ { VEX_W_TABLE (VEX_W_0F380F) },
/* 10 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3813) },
+ { VEX_W_TABLE (VEX_W_0F3813) },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3816) },
- { PREFIX_TABLE (PREFIX_VEX_0F3817) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3816) },
+ { "vptest", { XM, EXx }, PREFIX_DATA },
/* 18 */
- { PREFIX_TABLE (PREFIX_VEX_0F3818) },
- { PREFIX_TABLE (PREFIX_VEX_0F3819) },
- { PREFIX_TABLE (PREFIX_VEX_0F381A) },
+ { VEX_W_TABLE (VEX_W_0F3818) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3819) },
+ { MOD_TABLE (MOD_VEX_0F381A) },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F381C) },
- { PREFIX_TABLE (PREFIX_VEX_0F381D) },
- { PREFIX_TABLE (PREFIX_VEX_0F381E) },
+ { "vpabsb", { XM, EXx }, PREFIX_DATA },
+ { "vpabsw", { XM, EXx }, PREFIX_DATA },
+ { "vpabsd", { XM, EXx }, PREFIX_DATA },
{ Bad_Opcode },
/* 20 */
- { PREFIX_TABLE (PREFIX_VEX_0F3820) },
- { PREFIX_TABLE (PREFIX_VEX_0F3821) },
- { PREFIX_TABLE (PREFIX_VEX_0F3822) },
- { PREFIX_TABLE (PREFIX_VEX_0F3823) },
- { PREFIX_TABLE (PREFIX_VEX_0F3824) },
- { PREFIX_TABLE (PREFIX_VEX_0F3825) },
+ { "vpmovsxbw", { XM, EXxmmq }, PREFIX_DATA },
+ { "vpmovsxbd", { XM, EXxmmqd }, PREFIX_DATA },
+ { "vpmovsxbq", { XM, EXxmmdw }, PREFIX_DATA },
+ { "vpmovsxwd", { XM, EXxmmq }, PREFIX_DATA },
+ { "vpmovsxwq", { XM, EXxmmqd }, PREFIX_DATA },
+ { "vpmovsxdq", { XM, EXxmmq }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 28 */
- { PREFIX_TABLE (PREFIX_VEX_0F3828) },
- { PREFIX_TABLE (PREFIX_VEX_0F3829) },
- { PREFIX_TABLE (PREFIX_VEX_0F382A) },
- { PREFIX_TABLE (PREFIX_VEX_0F382B) },
- { PREFIX_TABLE (PREFIX_VEX_0F382C) },
- { PREFIX_TABLE (PREFIX_VEX_0F382D) },
- { PREFIX_TABLE (PREFIX_VEX_0F382E) },
- { PREFIX_TABLE (PREFIX_VEX_0F382F) },
+ { "vpmuldq", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqq", { XM, Vex, EXx }, PREFIX_DATA },
+ { MOD_TABLE (MOD_VEX_0F382A) },
+ { "vpackusdw", { XM, Vex, EXx }, PREFIX_DATA },
+ { MOD_TABLE (MOD_VEX_0F382C) },
+ { MOD_TABLE (MOD_VEX_0F382D) },
+ { MOD_TABLE (MOD_VEX_0F382E) },
+ { MOD_TABLE (MOD_VEX_0F382F) },
/* 30 */
- { PREFIX_TABLE (PREFIX_VEX_0F3830) },
- { PREFIX_TABLE (PREFIX_VEX_0F3831) },
- { PREFIX_TABLE (PREFIX_VEX_0F3832) },
- { PREFIX_TABLE (PREFIX_VEX_0F3833) },
- { PREFIX_TABLE (PREFIX_VEX_0F3834) },
- { PREFIX_TABLE (PREFIX_VEX_0F3835) },
- { PREFIX_TABLE (PREFIX_VEX_0F3836) },
- { PREFIX_TABLE (PREFIX_VEX_0F3837) },
+ { "vpmovzxbw", { XM, EXxmmq }, PREFIX_DATA },
+ { "vpmovzxbd", { XM, EXxmmqd }, PREFIX_DATA },
+ { "vpmovzxbq", { XM, EXxmmdw }, PREFIX_DATA },
+ { "vpmovzxwd", { XM, EXxmmq }, PREFIX_DATA },
+ { "vpmovzxwq", { XM, EXxmmqd }, PREFIX_DATA },
+ { "vpmovzxdq", { XM, EXxmmq }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0F3836) },
+ { "vpcmpgtq", { XM, Vex, EXx }, PREFIX_DATA },
/* 38 */
- { PREFIX_TABLE (PREFIX_VEX_0F3838) },
- { PREFIX_TABLE (PREFIX_VEX_0F3839) },
- { PREFIX_TABLE (PREFIX_VEX_0F383A) },
- { PREFIX_TABLE (PREFIX_VEX_0F383B) },
- { PREFIX_TABLE (PREFIX_VEX_0F383C) },
- { PREFIX_TABLE (PREFIX_VEX_0F383D) },
- { PREFIX_TABLE (PREFIX_VEX_0F383E) },
- { PREFIX_TABLE (PREFIX_VEX_0F383F) },
+ { "vpminsb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpminsd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpminuw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpminud", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaxsb", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaxsd", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaxuw", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vpmaxud", { XM, Vex, EXx }, PREFIX_DATA },
/* 40 */
- { PREFIX_TABLE (PREFIX_VEX_0F3840) },
- { PREFIX_TABLE (PREFIX_VEX_0F3841) },
+ { "vpmulld", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0F3841) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3845) },
- { PREFIX_TABLE (PREFIX_VEX_0F3846) },
- { PREFIX_TABLE (PREFIX_VEX_0F3847) },
+ { "vpsrlv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+ { VEX_W_TABLE (VEX_W_0F3846) },
+ { "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
/* 48 */
{ Bad_Opcode },
+ { X86_64_TABLE (X86_64_VEX_0F3849) },
{ Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
+ { X86_64_TABLE (X86_64_VEX_0F384B) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 50 */
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F3850) },
+ { VEX_W_TABLE (VEX_W_0F3851) },
+ { VEX_W_TABLE (VEX_W_0F3852) },
+ { VEX_W_TABLE (VEX_W_0F3853) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 58 */
- { PREFIX_TABLE (PREFIX_VEX_0F3858) },
- { PREFIX_TABLE (PREFIX_VEX_0F3859) },
- { PREFIX_TABLE (PREFIX_VEX_0F385A) },
- { Bad_Opcode },
- { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F3858) },
+ { VEX_W_TABLE (VEX_W_0F3859) },
+ { MOD_TABLE (MOD_VEX_0F385A) },
{ Bad_Opcode },
+ { X86_64_TABLE (X86_64_VEX_0F385C) },
{ Bad_Opcode },
+ { X86_64_TABLE (X86_64_VEX_0F385E) },
{ Bad_Opcode },
/* 60 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 78 */
- { PREFIX_TABLE (PREFIX_VEX_0F3878) },
- { PREFIX_TABLE (PREFIX_VEX_0F3879) },
+ { VEX_W_TABLE (VEX_W_0F3878) },
+ { VEX_W_TABLE (VEX_W_0F3879) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F388C) },
+ { MOD_TABLE (MOD_VEX_0F388C) },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F388E) },
+ { MOD_TABLE (MOD_VEX_0F388E) },
{ Bad_Opcode },
/* 90 */
- { PREFIX_TABLE (PREFIX_VEX_0F3890) },
- { PREFIX_TABLE (PREFIX_VEX_0F3891) },
- { PREFIX_TABLE (PREFIX_VEX_0F3892) },
- { PREFIX_TABLE (PREFIX_VEX_0F3893) },
+ { "vpgatherd%DQ", { XM, MVexVSIBDWpX, VexGatherD }, PREFIX_DATA },
+ { "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, PREFIX_DATA },
+ { "vgatherdp%XW", { XM, MVexVSIBDWpX, VexGatherD }, PREFIX_DATA },
+ { "vgatherqp%XW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3896) },
- { PREFIX_TABLE (PREFIX_VEX_0F3897) },
+ { "vfmaddsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmsubadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
/* 98 */
- { PREFIX_TABLE (PREFIX_VEX_0F3898) },
- { PREFIX_TABLE (PREFIX_VEX_0F3899) },
- { PREFIX_TABLE (PREFIX_VEX_0F389A) },
- { PREFIX_TABLE (PREFIX_VEX_0F389B) },
- { PREFIX_TABLE (PREFIX_VEX_0F389C) },
- { PREFIX_TABLE (PREFIX_VEX_0F389D) },
- { PREFIX_TABLE (PREFIX_VEX_0F389E) },
- { PREFIX_TABLE (PREFIX_VEX_0F389F) },
+ { "vfmadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmadd132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfmsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmsub132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfnmadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfnmadd132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfnmsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfnmsub132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* a0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38A6) },
- { PREFIX_TABLE (PREFIX_VEX_0F38A7) },
+ { "vfmaddsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmsubadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
/* a8 */
- { PREFIX_TABLE (PREFIX_VEX_0F38A8) },
- { PREFIX_TABLE (PREFIX_VEX_0F38A9) },
- { PREFIX_TABLE (PREFIX_VEX_0F38AA) },
- { PREFIX_TABLE (PREFIX_VEX_0F38AB) },
- { PREFIX_TABLE (PREFIX_VEX_0F38AC) },
- { PREFIX_TABLE (PREFIX_VEX_0F38AD) },
- { PREFIX_TABLE (PREFIX_VEX_0F38AE) },
- { PREFIX_TABLE (PREFIX_VEX_0F38AF) },
+ { "vfmadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmadd213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmsub213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfnmadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfnmadd213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfnmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfnmsub213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* b0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38B6) },
- { PREFIX_TABLE (PREFIX_VEX_0F38B7) },
+ { "vfmaddsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmsubadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
/* b8 */
- { PREFIX_TABLE (PREFIX_VEX_0F38B8) },
- { PREFIX_TABLE (PREFIX_VEX_0F38B9) },
- { PREFIX_TABLE (PREFIX_VEX_0F38BA) },
- { PREFIX_TABLE (PREFIX_VEX_0F38BB) },
- { PREFIX_TABLE (PREFIX_VEX_0F38BC) },
- { PREFIX_TABLE (PREFIX_VEX_0F38BD) },
- { PREFIX_TABLE (PREFIX_VEX_0F38BE) },
- { PREFIX_TABLE (PREFIX_VEX_0F38BF) },
+ { "vfmadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmadd231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfmsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfmsub231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfnmadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfnmadd231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
+ { "vfnmsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vfnmsub231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* c0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38CF) },
+ { VEX_W_TABLE (VEX_W_0F38CF) },
/* d0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38DB) },
- { PREFIX_TABLE (PREFIX_VEX_0F38DC) },
- { PREFIX_TABLE (PREFIX_VEX_0F38DD) },
- { PREFIX_TABLE (PREFIX_VEX_0F38DE) },
- { PREFIX_TABLE (PREFIX_VEX_0F38DF) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38DB) },
+ { "vaesenc", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vaesenclast", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vaesdec", { XM, Vex, EXx }, PREFIX_DATA },
+ { "vaesdeclast", { XM, Vex, EXx }, PREFIX_DATA },
/* e0 */
{ Bad_Opcode },
{ Bad_Opcode },
/* f0 */
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F2) },
- { REG_TABLE (REG_VEX_0F38F3) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F2) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F3) },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F38F5) },
- { PREFIX_TABLE (PREFIX_VEX_0F38F6) },
- { PREFIX_TABLE (PREFIX_VEX_0F38F7) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F5) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F6) },
+ { VEX_LEN_TABLE (VEX_LEN_0F38F7) },
/* f8 */
{ Bad_Opcode },
{ Bad_Opcode },
/* VEX_0F3A */
{
/* 00 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A00) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A01) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A02) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A00) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A01) },
+ { VEX_W_TABLE (VEX_W_0F3A02) },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3A04) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A05) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A06) },
+ { VEX_W_TABLE (VEX_W_0F3A04) },
+ { VEX_W_TABLE (VEX_W_0F3A05) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A06) },
{ Bad_Opcode },
/* 08 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A08) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A09) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A0A) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A0B) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A0C) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A0D) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A0E) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A0F) },
+ { "vroundps", { XM, EXx, Ib }, PREFIX_DATA },
+ { "vroundpd", { XM, EXx, Ib }, PREFIX_DATA },
+ { "vroundss", { XMScalar, VexScalar, EXd, Ib }, PREFIX_DATA },
+ { "vroundsd", { XMScalar, VexScalar, EXq, Ib }, PREFIX_DATA },
+ { "vblendps", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+ { "vblendpd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+ { "vpblendw", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+ { "vpalignr", { XM, Vex, EXx, Ib }, PREFIX_DATA },
/* 10 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3A14) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A15) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A16) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A17) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A14) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A15) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A16) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A17) },
/* 18 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A18) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A19) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A18) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A19) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3A1D) },
+ { VEX_W_TABLE (VEX_W_0F3A1D) },
{ Bad_Opcode },
{ Bad_Opcode },
/* 20 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A20) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A21) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A22) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A20) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A21) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A22) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 30 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A30) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A31) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A32) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A33) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A30) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A31) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A32) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A33) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 38 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A38) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A39) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A38) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A39) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 40 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A40) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A41) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A42) },
+ { "vdpps", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A41) },
+ { "vmpsadbw", { XM, Vex, EXx, Ib }, PREFIX_DATA },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3A44) },
+ { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, PREFIX_DATA },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3A46) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A46) },
{ Bad_Opcode },
/* 48 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A48) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A49) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A4A) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A4B) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A4C) },
+ { "vpermil2ps", { XM, Vex, EXx, XMVexI4, VexI4 }, PREFIX_DATA },
+ { "vpermil2pd", { XM, Vex, EXx, XMVexI4, VexI4 }, PREFIX_DATA },
+ { VEX_W_TABLE (VEX_W_0F3A4A) },
+ { VEX_W_TABLE (VEX_W_0F3A4B) },
+ { VEX_W_TABLE (VEX_W_0F3A4C) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3A5C) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A5D) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A5E) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A5F) },
+ { "vfmaddsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmaddsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmsubaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmsubaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
/* 60 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A60) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A61) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A62) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A63) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A60) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A61) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A62) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3A63) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 68 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A68) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A69) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A6A) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A6B) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A6C) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A6D) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A6E) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A6F) },
+ { "vfmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmaddss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmaddsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfmsubss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmsubsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
/* 70 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 78 */
- { PREFIX_TABLE (PREFIX_VEX_0F3A78) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A79) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A7A) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A7B) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A7C) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A7D) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A7E) },
- { PREFIX_TABLE (PREFIX_VEX_0F3A7F) },
+ { "vfnmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfnmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfnmaddss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmaddsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfnmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+ { "vfnmsubss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmsubsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
/* 80 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE(PREFIX_VEX_0F3ACE) },
- { PREFIX_TABLE(PREFIX_VEX_0F3ACF) },
+ { VEX_W_TABLE (VEX_W_0F3ACE) },
+ { VEX_W_TABLE (VEX_W_0F3ACF) },
/* d0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3ADF) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3ADF) },
/* e0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* f0 */
- { PREFIX_TABLE (PREFIX_VEX_0F3AF0) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3AF0) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F12_P_0_M_0 / VEX_LEN_0F12_P_2_M_0 */
{
- { "vmovlpX", { XM, Vex128, EXq }, 0 },
+ { "vmovlpX", { XM, Vex, EXq }, PREFIX_OPCODE },
},
/* VEX_LEN_0F12_P_0_M_1 */
{
- { "vmovhlps", { XM, Vex128, EXq }, 0 },
+ { "vmovhlp%XS", { XM, Vex, EXq }, 0 },
},
/* VEX_LEN_0F13_M_0 */
/* VEX_LEN_0F16_P_0_M_0 / VEX_LEN_0F16_P_2_M_0 */
{
- { "vmovhpX", { XM, Vex128, EXq }, 0 },
+ { "vmovhpX", { XM, Vex, EXq }, PREFIX_OPCODE },
},
/* VEX_LEN_0F16_P_0_M_1 */
{
- { "vmovlhps", { XM, Vex128, EXq }, 0 },
+ { "vmovlhp%XS", { XM, Vex, EXq }, 0 },
},
/* VEX_LEN_0F17_M_0 */
{ "vmovhpX", { EXq, XM }, PREFIX_OPCODE },
},
- /* VEX_LEN_0F41_P_0 */
+ /* VEX_LEN_0F41 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F41_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_0F41_L_1) },
},
- /* VEX_LEN_0F41_P_2 */
+
+ /* VEX_LEN_0F42 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F41_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_0F42_L_1) },
},
- /* VEX_LEN_0F42_P_0 */
+
+ /* VEX_LEN_0F44 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F42_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_0F44_L_0) },
},
- /* VEX_LEN_0F42_P_2 */
+
+ /* VEX_LEN_0F45 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F42_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_0F45_L_1) },
},
- /* VEX_LEN_0F44_P_0 */
+
+ /* VEX_LEN_0F46 */
{
- { VEX_W_TABLE (VEX_W_0F44_P_0_LEN_0) },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_VEX_0F46_L_1) },
},
- /* VEX_LEN_0F44_P_2 */
+
+ /* VEX_LEN_0F47 */
{
- { VEX_W_TABLE (VEX_W_0F44_P_2_LEN_0) },
+ { Bad_Opcode },
+ { MOD_TABLE (MOD_VEX_0F47_L_1) },
},
- /* VEX_LEN_0F45_P_0 */
+
+ /* VEX_LEN_0F4A */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F45_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_0F4A_L_1) },
},
- /* VEX_LEN_0F45_P_2 */
+
+ /* VEX_LEN_0F4B */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F45_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_0F4B_L_1) },
},
- /* VEX_LEN_0F46_P_0 */
+
+ /* VEX_LEN_0F6E */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F46_P_0_LEN_1) },
+ { "vmovK", { XMScalar, Edq }, PREFIX_DATA },
},
- /* VEX_LEN_0F46_P_2 */
+
+ /* VEX_LEN_0F77 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F46_P_2_LEN_1) },
+ { "vzeroupper", { XX }, 0 },
+ { "vzeroall", { XX }, 0 },
},
- /* VEX_LEN_0F47_P_0 */
+
+ /* VEX_LEN_0F7E_P_1 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F47_P_0_LEN_1) },
+ { "vmovq", { XMScalar, EXq }, 0 },
},
- /* VEX_LEN_0F47_P_2 */
+
+ /* VEX_LEN_0F7E_P_2 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F47_P_2_LEN_1) },
+ { "vmovK", { Edq, XMScalar }, 0 },
+ },
+
+ /* VEX_LEN_0F90 */
+ {
+ { VEX_W_TABLE (VEX_W_0F90_L_0) },
+ },
+
+ /* VEX_LEN_0F91 */
+ {
+ { MOD_TABLE (MOD_VEX_0F91_L_0) },
+ },
+
+ /* VEX_LEN_0F92 */
+ {
+ { MOD_TABLE (MOD_VEX_0F92_L_0) },
+ },
+
+ /* VEX_LEN_0F93 */
+ {
+ { MOD_TABLE (MOD_VEX_0F93_L_0) },
+ },
+
+ /* VEX_LEN_0F98 */
+ {
+ { MOD_TABLE (MOD_VEX_0F98_L_0) },
+ },
+
+ /* VEX_LEN_0F99 */
+ {
+ { MOD_TABLE (MOD_VEX_0F99_L_0) },
+ },
+
+ /* VEX_LEN_0FAE_R_2_M_0 */
+ {
+ { "vldmxcsr", { Md }, 0 },
+ },
+
+ /* VEX_LEN_0FAE_R_3_M_0 */
+ {
+ { "vstmxcsr", { Md }, 0 },
+ },
+
+ /* VEX_LEN_0FC4 */
+ {
+ { "vpinsrw", { XM, Vex, Edw, Ib }, PREFIX_DATA },
+ },
+
+ /* VEX_LEN_0FC5 */
+ {
+ { "vpextrw", { Gd, XS, Ib }, PREFIX_DATA },
+ },
+
+ /* VEX_LEN_0FD6 */
+ {
+ { "vmovq", { EXqS, XMScalar }, PREFIX_DATA },
+ },
+
+ /* VEX_LEN_0FF7 */
+ {
+ { "vmaskmovdqu", { XM, XS }, PREFIX_DATA },
},
- /* VEX_LEN_0F4A_P_0 */
+
+ /* VEX_LEN_0F3816 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F4A_P_0_LEN_1) },
+ { VEX_W_TABLE (VEX_W_0F3816_L_1) },
},
- /* VEX_LEN_0F4A_P_2 */
+
+ /* VEX_LEN_0F3819 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F4A_P_2_LEN_1) },
+ { VEX_W_TABLE (VEX_W_0F3819_L_1) },
},
- /* VEX_LEN_0F4B_P_0 */
+
+ /* VEX_LEN_0F381A_M_0 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F4B_P_0_LEN_1) },
+ { VEX_W_TABLE (VEX_W_0F381A_M_0_L_1) },
},
- /* VEX_LEN_0F4B_P_2 */
+
+ /* VEX_LEN_0F3836 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F4B_P_2_LEN_1) },
+ { VEX_W_TABLE (VEX_W_0F3836) },
},
- /* VEX_LEN_0F6E_P_2 */
+ /* VEX_LEN_0F3841 */
{
- { "vmovK", { XMScalar, Edq }, 0 },
+ { "vphminposuw", { XM, EXx }, PREFIX_DATA },
},
- /* VEX_LEN_0F77_P_1 */
+ /* VEX_LEN_0F3849_X86_64_P_0_W_0_M_0 */
{
- { "vzeroupper", { XX }, 0 },
- { "vzeroall", { XX }, 0 },
+ { "ldtilecfg", { M }, 0 },
},
- /* VEX_LEN_0F7E_P_1 */
+ /* VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0 */
{
- { "vmovq", { XMScalar, EXxmm_mq }, 0 },
+ { "tilerelease", { Skip_MODRM }, 0 },
},
- /* VEX_LEN_0F7E_P_2 */
+ /* VEX_LEN_0F3849_X86_64_P_2_W_0_M_0 */
{
- { "vmovK", { Edq, XMScalar }, 0 },
+ { "sttilecfg", { M }, 0 },
},
- /* VEX_LEN_0F90_P_0 */
+ /* VEX_LEN_0F3849_X86_64_P_3_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F90_P_0_LEN_0) },
+ { "tilezero", { TMM, Skip_MODRM }, 0 },
},
- /* VEX_LEN_0F90_P_2 */
+ /* VEX_LEN_0F384B_X86_64_P_1_W_0_M_0 */
+ {
+ { "tilestored", { MVexSIBMEM, TMM }, 0 },
+ },
+ /* VEX_LEN_0F384B_X86_64_P_2_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F90_P_2_LEN_0) },
+ { "tileloaddt1", { TMM, MVexSIBMEM }, 0 },
},
- /* VEX_LEN_0F91_P_0 */
+ /* VEX_LEN_0F384B_X86_64_P_3_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F91_P_0_LEN_0) },
+ { "tileloadd", { TMM, MVexSIBMEM }, 0 },
},
- /* VEX_LEN_0F91_P_2 */
+ /* VEX_LEN_0F385A_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F91_P_2_LEN_0) },
+ { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F385A_M_0_L_0) },
},
- /* VEX_LEN_0F92_P_0 */
+ /* VEX_LEN_0F385C_X86_64_P_1_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F92_P_0_LEN_0) },
+ { "tdpbf16ps", { TMM, EXtmm, VexTmm }, 0 },
},
- /* VEX_LEN_0F92_P_2 */
+ /* VEX_LEN_0F385E_X86_64_P_0_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F92_P_2_LEN_0) },
+ { "tdpbuud", {TMM, EXtmm, VexTmm }, 0 },
},
- /* VEX_LEN_0F92_P_3 */
+ /* VEX_LEN_0F385E_X86_64_P_1_W_0_M_0 */
{
- { MOD_TABLE (MOD_VEX_0F92_P_3_LEN_0) },
+ { "tdpbsud", {TMM, EXtmm, VexTmm }, 0 },
},
- /* VEX_LEN_0F93_P_0 */
+ /* VEX_LEN_0F385E_X86_64_P_2_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F93_P_0_LEN_0) },
+ { "tdpbusd", {TMM, EXtmm, VexTmm }, 0 },
},
- /* VEX_LEN_0F93_P_2 */
+ /* VEX_LEN_0F385E_X86_64_P_3_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F93_P_2_LEN_0) },
+ { "tdpbssd", {TMM, EXtmm, VexTmm }, 0 },
},
- /* VEX_LEN_0F93_P_3 */
+ /* VEX_LEN_0F38DB */
{
- { MOD_TABLE (MOD_VEX_0F93_P_3_LEN_0) },
+ { "vaesimc", { XM, EXx }, PREFIX_DATA },
},
- /* VEX_LEN_0F98_P_0 */
+ /* VEX_LEN_0F38F2 */
{
- { VEX_W_TABLE (VEX_W_0F98_P_0_LEN_0) },
+ { "andnS", { Gdq, VexGdq, Edq }, PREFIX_OPCODE },
},
- /* VEX_LEN_0F98_P_2 */
+ /* VEX_LEN_0F38F3 */
{
- { VEX_W_TABLE (VEX_W_0F98_P_2_LEN_0) },
+ { REG_TABLE(REG_VEX_0F38F3_L_0) },
},
- /* VEX_LEN_0F99_P_0 */
+ /* VEX_LEN_0F38F5 */
{
- { VEX_W_TABLE (VEX_W_0F99_P_0_LEN_0) },
+ { PREFIX_TABLE(PREFIX_VEX_0F38F5_L_0) },
},
- /* VEX_LEN_0F99_P_2 */
+ /* VEX_LEN_0F38F6 */
{
- { VEX_W_TABLE (VEX_W_0F99_P_2_LEN_0) },
+ { PREFIX_TABLE(PREFIX_VEX_0F38F6_L_0) },
},
- /* VEX_LEN_0FAE_R_2_M_0 */
+ /* VEX_LEN_0F38F7 */
{
- { "vldmxcsr", { Md }, 0 },
+ { PREFIX_TABLE(PREFIX_VEX_0F38F7_L_0) },
},
- /* VEX_LEN_0FAE_R_3_M_0 */
+ /* VEX_LEN_0F3A00 */
{
- { "vstmxcsr", { Md }, 0 },
+ { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F3A00_L_1) },
+ },
+
+ /* VEX_LEN_0F3A01 */
+ {
+ { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F3A01_L_1) },
+ },
+
+ /* VEX_LEN_0F3A06 */
+ {
+ { Bad_Opcode },
+ { VEX_W_TABLE (VEX_W_0F3A06_L_1) },
},
- /* VEX_LEN_0FC4_P_2 */
+ /* VEX_LEN_0F3A14 */
{
- { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 },
+ { "vpextrb", { Edb, XM, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0FC5_P_2 */
+ /* VEX_LEN_0F3A15 */
{
- { "vpextrw", { Gdq, XS, Ib }, 0 },
+ { "vpextrw", { Edw, XM, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0FD6_P_2 */
+ /* VEX_LEN_0F3A16 */
{
- { "vmovq", { EXqVexScalarS, XMScalar }, 0 },
+ { "vpextrK", { Edq, XM, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0FF7_P_2 */
+ /* VEX_LEN_0F3A17 */
{
- { "vmaskmovdqu", { XM, XS }, 0 },
+ { "vextractps", { Ed, XM, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F3816_P_2 */
+ /* VEX_LEN_0F3A18 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3816_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A18_L_1) },
},
- /* VEX_LEN_0F3819_P_2 */
+ /* VEX_LEN_0F3A19 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3819_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A19_L_1) },
+ },
+
+ /* VEX_LEN_0F3A20 */
+ {
+ { "vpinsrb", { XM, Vex, Edb, Ib }, PREFIX_DATA },
+ },
+
+ /* VEX_LEN_0F3A21 */
+ {
+ { "vinsertps", { XM, Vex, EXd, Ib }, PREFIX_DATA },
+ },
+
+ /* VEX_LEN_0F3A22 */
+ {
+ { "vpinsrK", { XM, Vex, Edq, Ib }, PREFIX_DATA },
+ },
+
+ /* VEX_LEN_0F3A30 */
+ {
+ { MOD_TABLE (MOD_VEX_0F3A30_L_0) },
+ },
+
+ /* VEX_LEN_0F3A31 */
+ {
+ { MOD_TABLE (MOD_VEX_0F3A31_L_0) },
},
- /* VEX_LEN_0F381A_P_2_M_0 */
+ /* VEX_LEN_0F3A32 */
+ {
+ { MOD_TABLE (MOD_VEX_0F3A32_L_0) },
+ },
+
+ /* VEX_LEN_0F3A33 */
+ {
+ { MOD_TABLE (MOD_VEX_0F3A33_L_0) },
+ },
+
+ /* VEX_LEN_0F3A38 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0) },
+ { VEX_W_TABLE (VEX_W_0F3A38_L_1) },
},
- /* VEX_LEN_0F3836_P_2 */
+ /* VEX_LEN_0F3A39 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3836_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A39_L_1) },
},
- /* VEX_LEN_0F3841_P_2 */
+ /* VEX_LEN_0F3A41 */
{
- { "vphminposuw", { XM, EXx }, 0 },
+ { "vdppd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F385A_P_2_M_0 */
+ /* VEX_LEN_0F3A46 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0) },
+ { VEX_W_TABLE (VEX_W_0F3A46_L_1) },
},
- /* VEX_LEN_0F38DB_P_2 */
+ /* VEX_LEN_0F3A60 */
{
- { "vaesimc", { XM, EXx }, 0 },
+ { "vpcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F38F2_P_0 */
+ /* VEX_LEN_0F3A61 */
{
- { "andnS", { Gdq, VexGdq, Edq }, 0 },
+ { "vpcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F38F3_R_1_P_0 */
+ /* VEX_LEN_0F3A62 */
{
- { "blsrS", { VexGdq, Edq }, 0 },
+ { "vpcmpistrm", { XM, EXx, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F38F3_R_2_P_0 */
+ /* VEX_LEN_0F3A63 */
{
- { "blsmskS", { VexGdq, Edq }, 0 },
+ { "vpcmpistri", { XM, EXx, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F38F3_R_3_P_0 */
+ /* VEX_LEN_0F3ADF */
{
- { "blsiS", { VexGdq, Edq }, 0 },
+ { "vaeskeygenassist", { XM, EXx, Ib }, PREFIX_DATA },
},
- /* VEX_LEN_0F38F5_P_0 */
+ /* VEX_LEN_0F3AF0 */
{
- { "bzhiS", { Gdq, Edq, VexGdq }, 0 },
+ { PREFIX_TABLE (PREFIX_VEX_0F3AF0_L_0) },
},
- /* VEX_LEN_0F38F5_P_1 */
+ /* VEX_LEN_0FXOP_08_85 */
{
- { "pextS", { Gdq, VexGdq, Edq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_85_L_0) },
},
- /* VEX_LEN_0F38F5_P_3 */
+ /* VEX_LEN_0FXOP_08_86 */
{
- { "pdepS", { Gdq, VexGdq, Edq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_86_L_0) },
},
- /* VEX_LEN_0F38F6_P_3 */
+ /* VEX_LEN_0FXOP_08_87 */
{
- { "mulxS", { Gdq, VexGdq, Edq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_87_L_0) },
},
- /* VEX_LEN_0F38F7_P_0 */
+ /* VEX_LEN_0FXOP_08_8E */
{
- { "bextrS", { Gdq, Edq, VexGdq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_8E_L_0) },
},
- /* VEX_LEN_0F38F7_P_1 */
+ /* VEX_LEN_0FXOP_08_8F */
{
- { "sarxS", { Gdq, Edq, VexGdq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_8F_L_0) },
},
- /* VEX_LEN_0F38F7_P_2 */
+ /* VEX_LEN_0FXOP_08_95 */
{
- { "shlxS", { Gdq, Edq, VexGdq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_95_L_0) },
},
- /* VEX_LEN_0F38F7_P_3 */
+ /* VEX_LEN_0FXOP_08_96 */
{
- { "shrxS", { Gdq, Edq, VexGdq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_96_L_0) },
},
- /* VEX_LEN_0F3A00_P_2 */
+ /* VEX_LEN_0FXOP_08_97 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A00_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_97_L_0) },
},
- /* VEX_LEN_0F3A01_P_2 */
+ /* VEX_LEN_0FXOP_08_9E */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A01_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_9E_L_0) },
},
- /* VEX_LEN_0F3A06_P_2 */
+ /* VEX_LEN_0FXOP_08_9F */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A06_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_9F_L_0) },
},
- /* VEX_LEN_0F3A14_P_2 */
+ /* VEX_LEN_0FXOP_08_A3 */
{
- { "vpextrb", { Edqb, XM, Ib }, 0 },
+ { "vpperm", { XM, Vex, EXx, XMVexI4 }, 0 },
},
- /* VEX_LEN_0F3A15_P_2 */
+ /* VEX_LEN_0FXOP_08_A6 */
{
- { "vpextrw", { Edqw, XM, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_A6_L_0) },
},
- /* VEX_LEN_0F3A16_P_2 */
+ /* VEX_LEN_0FXOP_08_B6 */
{
- { "vpextrK", { Edq, XM, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_B6_L_0) },
},
- /* VEX_LEN_0F3A17_P_2 */
+ /* VEX_LEN_0FXOP_08_C0 */
{
- { "vextractps", { Edqd, XM, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_C0_L_0) },
},
- /* VEX_LEN_0F3A18_P_2 */
+ /* VEX_LEN_0FXOP_08_C1 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A18_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_C1_L_0) },
},
- /* VEX_LEN_0F3A19_P_2 */
+ /* VEX_LEN_0FXOP_08_C2 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A19_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_C2_L_0) },
},
- /* VEX_LEN_0F3A20_P_2 */
+ /* VEX_LEN_0FXOP_08_C3 */
{
- { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_C3_L_0) },
},
- /* VEX_LEN_0F3A21_P_2 */
+ /* VEX_LEN_0FXOP_08_CC */
{
- { "vinsertps", { XM, Vex128, EXd, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_CC_L_0) },
},
- /* VEX_LEN_0F3A22_P_2 */
+ /* VEX_LEN_0FXOP_08_CD */
{
- { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_CD_L_0) },
},
- /* VEX_LEN_0F3A30_P_2 */
+ /* VEX_LEN_0FXOP_08_CE */
{
- { VEX_W_TABLE (VEX_W_0F3A30_P_2_LEN_0) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_CE_L_0) },
},
- /* VEX_LEN_0F3A31_P_2 */
+ /* VEX_LEN_0FXOP_08_CF */
{
- { VEX_W_TABLE (VEX_W_0F3A31_P_2_LEN_0) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_CF_L_0) },
},
- /* VEX_LEN_0F3A32_P_2 */
+ /* VEX_LEN_0FXOP_08_EC */
{
- { VEX_W_TABLE (VEX_W_0F3A32_P_2_LEN_0) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_EC_L_0) },
},
- /* VEX_LEN_0F3A33_P_2 */
+ /* VEX_LEN_0FXOP_08_ED */
{
- { VEX_W_TABLE (VEX_W_0F3A33_P_2_LEN_0) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_ED_L_0) },
},
- /* VEX_LEN_0F3A38_P_2 */
+ /* VEX_LEN_0FXOP_08_EE */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A38_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_EE_L_0) },
},
- /* VEX_LEN_0F3A39_P_2 */
+ /* VEX_LEN_0FXOP_08_EF */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A39_P_2) },
+ { VEX_W_TABLE (VEX_W_0FXOP_08_EF_L_0) },
},
- /* VEX_LEN_0F3A41_P_2 */
+ /* VEX_LEN_0FXOP_09_01 */
{
- { "vdppd", { XM, Vex128, EXx, Ib }, 0 },
+ { REG_TABLE (REG_XOP_09_01_L_0) },
},
- /* VEX_LEN_0F3A46_P_2 */
+ /* VEX_LEN_0FXOP_09_02 */
{
- { Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A46_P_2) },
+ { REG_TABLE (REG_XOP_09_02_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_12_M_1 */
+ {
+ { REG_TABLE (REG_XOP_09_12_M_1_L_0) },
},
- /* VEX_LEN_0F3A60_P_2 */
+ /* VEX_LEN_0FXOP_09_82_W_0 */
{
- { "vpcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+ { "vfrczss", { XM, EXd }, 0 },
},
- /* VEX_LEN_0F3A61_P_2 */
+ /* VEX_LEN_0FXOP_09_83_W_0 */
{
- { "vpcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+ { "vfrczsd", { XM, EXq }, 0 },
},
- /* VEX_LEN_0F3A62_P_2 */
+ /* VEX_LEN_0FXOP_09_90 */
{
- { "vpcmpistrm", { XM, EXx, Ib }, 0 },
+ { "vprotb", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A63_P_2 */
+ /* VEX_LEN_0FXOP_09_91 */
{
- { "vpcmpistri", { XM, EXx, Ib }, 0 },
+ { "vprotw", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A6A_P_2 */
+ /* VEX_LEN_0FXOP_09_92 */
{
- { "vfmaddss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
+ { "vprotd", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A6B_P_2 */
+ /* VEX_LEN_0FXOP_09_93 */
{
- { "vfmaddsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
+ { "vprotq", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A6E_P_2 */
+ /* VEX_LEN_0FXOP_09_94 */
{
- { "vfmsubss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
+ { "vpshlb", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A6F_P_2 */
+ /* VEX_LEN_0FXOP_09_95 */
{
- { "vfmsubsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
+ { "vpshlw", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A7A_P_2 */
+ /* VEX_LEN_0FXOP_09_96 */
{
- { "vfnmaddss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
+ { "vpshld", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A7B_P_2 */
+ /* VEX_LEN_0FXOP_09_97 */
{
- { "vfnmaddsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
+ { "vpshlq", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A7E_P_2 */
+ /* VEX_LEN_0FXOP_09_98 */
{
- { "vfnmsubss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
+ { "vpshab", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3A7F_P_2 */
+ /* VEX_LEN_0FXOP_09_99 */
{
- { "vfnmsubsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
+ { "vpshaw", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3ADF_P_2 */
+ /* VEX_LEN_0FXOP_09_9A */
{
- { "vaeskeygenassist", { XM, EXx, Ib }, 0 },
+ { "vpshad", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0F3AF0_P_3 */
+ /* VEX_LEN_0FXOP_09_9B */
{
- { "rorxS", { Gdq, Edq, Ib }, 0 },
+ { "vpshaq", { XM, EXx, VexW }, 0 },
},
- /* VEX_LEN_0FXOP_08_CC */
+ /* VEX_LEN_0FXOP_09_C1 */
{
- { "vpcomb", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_C1_L_0) },
},
- /* VEX_LEN_0FXOP_08_CD */
+ /* VEX_LEN_0FXOP_09_C2 */
{
- { "vpcomw", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_C2_L_0) },
},
- /* VEX_LEN_0FXOP_08_CE */
+ /* VEX_LEN_0FXOP_09_C3 */
{
- { "vpcomd", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_C3_L_0) },
},
- /* VEX_LEN_0FXOP_08_CF */
+ /* VEX_LEN_0FXOP_09_C6 */
{
- { "vpcomq", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_C6_L_0) },
},
- /* VEX_LEN_0FXOP_08_EC */
+ /* VEX_LEN_0FXOP_09_C7 */
{
- { "vpcomub", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_C7_L_0) },
},
- /* VEX_LEN_0FXOP_08_ED */
+ /* VEX_LEN_0FXOP_09_CB */
{
- { "vpcomuw", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_CB_L_0) },
},
- /* VEX_LEN_0FXOP_08_EE */
+ /* VEX_LEN_0FXOP_09_D1 */
{
- { "vpcomud", { XM, Vex128, EXx, VPCOM }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_D1_L_0) },
},
- /* VEX_LEN_0FXOP_08_EF */
+ /* VEX_LEN_0FXOP_09_D2 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_D2_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_D3 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_D3_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_D6 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_D6_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_D7 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_D7_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_DB */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_DB_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_E1 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_E1_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_E2 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_E2_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_09_E3 */
+ {
+ { VEX_W_TABLE (VEX_W_0FXOP_09_E3_L_0) },
+ },
+
+ /* VEX_LEN_0FXOP_0A_12 */
{
- { "vpcomuq", { XM, Vex128, EXx, VPCOM }, 0 },
+ { REG_TABLE (REG_XOP_0A_12_L_0) },
},
+};
+
+#include "i386-dis-evex-len.h"
- /* VEX_LEN_0FXOP_09_80 */
+static const struct dis386 vex_w_table[][2] = {
+ {
+ /* VEX_W_0F41_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F41_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F41_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F42_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F42_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F42_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F44_L_0_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F44_L_0_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F44_L_0_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F45_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F45_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F45_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F46_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F46_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F46_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F47_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F47_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F47_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F4A_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F4A_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F4A_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F4B_L_1_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F4B_L_1_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F4B_L_1_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F90_L_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F90_L_0_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F90_L_0_W_1) },
+ },
+ {
+ /* VEX_W_0F91_L_0_M_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F91_L_0_M_0_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F91_L_0_M_0_W_1) },
+ },
+ {
+ /* VEX_W_0F92_L_0_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F92_L_0_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F92_L_0_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F93_L_0_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F93_L_0_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F93_L_0_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F98_L_0_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F98_L_0_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F98_L_0_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F99_L_0_M_1 */
+ { PREFIX_TABLE (PREFIX_VEX_0F99_L_0_M_1_W_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F99_L_0_M_1_W_1) },
+ },
+ {
+ /* VEX_W_0F380C */
+ { "vpermilps", { XM, Vex, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F380D */
+ { "vpermilpd", { XM, Vex, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F380E */
+ { "vtestps", { XM, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F380F */
+ { "vtestpd", { XM, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3813 */
+ { "vcvtph2ps", { XM, EXxmmq }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3816_L_1 */
+ { "vpermps", { XM, Vex, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3818 */
+ { "vbroadcastss", { XM, EXd }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3819_L_1 */
+ { "vbroadcastsd", { XM, EXq }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F381A_M_0_L_1 */
+ { "vbroadcastf128", { XM, Mxmm }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F382C_M_0 */
+ { "vmaskmovps", { XM, Vex, Mx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F382D_M_0 */
+ { "vmaskmovpd", { XM, Vex, Mx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F382E_M_0 */
+ { "vmaskmovps", { Mx, Vex, XM }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F382F_M_0 */
+ { "vmaskmovpd", { Mx, Vex, XM }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3836 */
+ { "vpermd", { XM, Vex, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3846 */
+ { "vpsravd", { XM, Vex, EXx }, PREFIX_DATA },
+ },
+ {
+ /* VEX_W_0F3849_X86_64_P_0 */
+ { MOD_TABLE (MOD_VEX_0F3849_X86_64_P_0_W_0) },
+ },
+ {
+ /* VEX_W_0F3849_X86_64_P_2 */
+ { MOD_TABLE (MOD_VEX_0F3849_X86_64_P_2_W_0) },
+ },
+ {
+ /* VEX_W_0F3849_X86_64_P_3 */
+ { MOD_TABLE (MOD_VEX_0F3849_X86_64_P_3_W_0) },
+ },
+ {
+ /* VEX_W_0F384B_X86_64_P_1 */
+ { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_1_W_0) },
+ },
+ {
+ /* VEX_W_0F384B_X86_64_P_2 */
+ { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_2_W_0) },
+ },
+ {
+ /* VEX_W_0F384B_X86_64_P_3 */
+ { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_3_W_0) },
+ },
+ {
+ /* VEX_W_0F3850 */
+ { "%XV vpdpbusd", { XM, Vex, EXx }, 0 },
+ },
{
- { "vfrczps", { XM, EXxmm }, 0 },
- { "vfrczps", { XM, EXymmq }, 0 },
+ /* VEX_W_0F3851 */
+ { "%XV vpdpbusds", { XM, Vex, EXx }, 0 },
},
-
- /* VEX_LEN_0FXOP_09_81 */
{
- { "vfrczpd", { XM, EXxmm }, 0 },
- { "vfrczpd", { XM, EXymmq }, 0 },
+ /* VEX_W_0F3852 */
+ { "%XV vpdpwssd", { XM, Vex, EXx }, 0 },
},
-};
-
-#include "i386-dis-evex-len.h"
-
-static const struct dis386 vex_w_table[][2] = {
{
- /* VEX_W_0F41_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F41_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F41_P_0_LEN_1) },
+ /* VEX_W_0F3853 */
+ { "%XV vpdpwssds", { XM, Vex, EXx }, 0 },
},
{
- /* VEX_W_0F41_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F41_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F41_P_2_LEN_1) }
+ /* VEX_W_0F3858 */
+ { "vpbroadcastd", { XM, EXd }, PREFIX_DATA },
},
{
- /* VEX_W_0F42_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F42_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F42_P_0_LEN_1) },
+ /* VEX_W_0F3859 */
+ { "vpbroadcastq", { XM, EXq }, PREFIX_DATA },
},
{
- /* VEX_W_0F42_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F42_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F42_P_2_LEN_1) },
+ /* VEX_W_0F385A_M_0_L_0 */
+ { "vbroadcasti128", { XM, Mxmm }, PREFIX_DATA },
},
{
- /* VEX_W_0F44_P_0_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F44_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F44_P_0_LEN_1) },
+ /* VEX_W_0F385C_X86_64_P_1 */
+ { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_1_W_0) },
},
{
- /* VEX_W_0F44_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F44_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F44_P_2_LEN_1) },
+ /* VEX_W_0F385E_X86_64_P_0 */
+ { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_0_W_0) },
},
{
- /* VEX_W_0F45_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F45_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F45_P_0_LEN_1) },
+ /* VEX_W_0F385E_X86_64_P_1 */
+ { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_1_W_0) },
},
{
- /* VEX_W_0F45_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F45_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F45_P_2_LEN_1) },
+ /* VEX_W_0F385E_X86_64_P_2 */
+ { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_2_W_0) },
},
{
- /* VEX_W_0F46_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F46_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F46_P_0_LEN_1) },
+ /* VEX_W_0F385E_X86_64_P_3 */
+ { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_3_W_0) },
},
{
- /* VEX_W_0F46_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F46_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F46_P_2_LEN_1) },
+ /* VEX_W_0F3878 */
+ { "vpbroadcastb", { XM, EXb }, PREFIX_DATA },
},
{
- /* VEX_W_0F47_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F47_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F47_P_0_LEN_1) },
+ /* VEX_W_0F3879 */
+ { "vpbroadcastw", { XM, EXw }, PREFIX_DATA },
},
{
- /* VEX_W_0F47_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F47_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F47_P_2_LEN_1) },
+ /* VEX_W_0F38CF */
+ { "vgf2p8mulb", { XM, Vex, EXx }, PREFIX_DATA },
},
{
- /* VEX_W_0F4A_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F4A_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F4A_P_0_LEN_1) },
+ /* VEX_W_0F3A00_L_1 */
+ { Bad_Opcode },
+ { "vpermq", { XM, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F4A_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F4A_P_2_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F4A_P_2_LEN_1) },
+ /* VEX_W_0F3A01_L_1 */
+ { Bad_Opcode },
+ { "vpermpd", { XM, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F4B_P_0_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F4B_P_0_LEN_1) },
- { MOD_TABLE (MOD_VEX_W_1_0F4B_P_0_LEN_1) },
+ /* VEX_W_0F3A02 */
+ { "vpblendd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F4B_P_2_LEN_1 */
- { MOD_TABLE (MOD_VEX_W_0_0F4B_P_2_LEN_1) },
+ /* VEX_W_0F3A04 */
+ { "vpermilps", { XM, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F90_P_0_LEN_0 */
- { "kmovw", { MaskG, MaskE }, 0 },
- { "kmovq", { MaskG, MaskE }, 0 },
+ /* VEX_W_0F3A05 */
+ { "vpermilpd", { XM, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F90_P_2_LEN_0 */
- { "kmovb", { MaskG, MaskBDE }, 0 },
- { "kmovd", { MaskG, MaskBDE }, 0 },
+ /* VEX_W_0F3A06_L_1 */
+ { "vperm2f128", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F91_P_0_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F91_P_0_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F91_P_0_LEN_0) },
+ /* VEX_W_0F3A18_L_1 */
+ { "vinsertf128", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F91_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F91_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F91_P_2_LEN_0) },
+ /* VEX_W_0F3A19_L_1 */
+ { "vextractf128", { EXxmm, XM, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F92_P_0_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F92_P_0_LEN_0) },
+ /* VEX_W_0F3A1D */
+ { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F92_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F92_P_2_LEN_0) },
+ /* VEX_W_0F3A38_L_1 */
+ { "vinserti128", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F93_P_0_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F93_P_0_LEN_0) },
+ /* VEX_W_0F3A39_L_1 */
+ { "vextracti128", { EXxmm, XM, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F93_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F93_P_2_LEN_0) },
+ /* VEX_W_0F3A46_L_1 */
+ { "vperm2i128", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F98_P_0_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F98_P_0_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F98_P_0_LEN_0) },
+ /* VEX_W_0F3A4A */
+ { "vblendvps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
},
{
- /* VEX_W_0F98_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F98_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F98_P_2_LEN_0) },
+ /* VEX_W_0F3A4B */
+ { "vblendvpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
},
{
- /* VEX_W_0F99_P_0_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F99_P_0_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F99_P_0_LEN_0) },
+ /* VEX_W_0F3A4C */
+ { "vpblendvb", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
},
{
- /* VEX_W_0F99_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F99_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F99_P_2_LEN_0) },
+ /* VEX_W_0F3ACE */
+ { Bad_Opcode },
+ { "vgf2p8affineqb", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
{
- /* VEX_W_0F380C_P_2 */
- { "vpermilps", { XM, Vex, EXx }, 0 },
+ /* VEX_W_0F3ACF */
+ { Bad_Opcode },
+ { "vgf2p8affineinvqb", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
+ /* VEX_W_0FXOP_08_85_L_0 */
{
- /* VEX_W_0F380D_P_2 */
- { "vpermilpd", { XM, Vex, EXx }, 0 },
+ { "vpmacssww", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_86_L_0 */
{
- /* VEX_W_0F380E_P_2 */
- { "vtestps", { XM, EXx }, 0 },
+ { "vpmacsswd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_87_L_0 */
{
- /* VEX_W_0F380F_P_2 */
- { "vtestpd", { XM, EXx }, 0 },
+ { "vpmacssdql", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_8E_L_0 */
{
- /* VEX_W_0F3813_P_2 */
- { "vcvtph2ps", { XM, EXxmmq }, 0 },
+ { "vpmacssdd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_8F_L_0 */
{
- /* VEX_W_0F3816_P_2 */
- { "vpermps", { XM, Vex, EXx }, 0 },
+ { "vpmacssdqh", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_95_L_0 */
{
- /* VEX_W_0F3818_P_2 */
- { "vbroadcastss", { XM, EXxmm_md }, 0 },
+ { "vpmacsww", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_96_L_0 */
{
- /* VEX_W_0F3819_P_2 */
- { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
+ { "vpmacswd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_97_L_0 */
{
- /* VEX_W_0F381A_P_2_M_0 */
- { "vbroadcastf128", { XM, Mxmm }, 0 },
+ { "vpmacsdql", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_9E_L_0 */
{
- /* VEX_W_0F382C_P_2_M_0 */
- { "vmaskmovps", { XM, Vex, Mx }, 0 },
+ { "vpmacsdd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_9F_L_0 */
{
- /* VEX_W_0F382D_P_2_M_0 */
- { "vmaskmovpd", { XM, Vex, Mx }, 0 },
+ { "vpmacsdqh", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_A6_L_0 */
{
- /* VEX_W_0F382E_P_2_M_0 */
- { "vmaskmovps", { Mx, Vex, XM }, 0 },
+ { "vpmadcsswd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_B6_L_0 */
{
- /* VEX_W_0F382F_P_2_M_0 */
- { "vmaskmovpd", { Mx, Vex, XM }, 0 },
+ { "vpmadcswd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
+ /* VEX_W_0FXOP_08_C0_L_0 */
{
- /* VEX_W_0F3836_P_2 */
- { "vpermd", { XM, Vex, EXx }, 0 },
+ { "vprotb", { XM, EXx, Ib }, 0 },
},
+ /* VEX_W_0FXOP_08_C1_L_0 */
{
- /* VEX_W_0F3846_P_2 */
- { "vpsravd", { XM, Vex, EXx }, 0 },
+ { "vprotw", { XM, EXx, Ib }, 0 },
},
+ /* VEX_W_0FXOP_08_C2_L_0 */
{
- /* VEX_W_0F3858_P_2 */
- { "vpbroadcastd", { XM, EXxmm_md }, 0 },
+ { "vprotd", { XM, EXx, Ib }, 0 },
},
+ /* VEX_W_0FXOP_08_C3_L_0 */
{
- /* VEX_W_0F3859_P_2 */
- { "vpbroadcastq", { XM, EXxmm_mq }, 0 },
+ { "vprotq", { XM, EXx, Ib }, 0 },
},
+ /* VEX_W_0FXOP_08_CC_L_0 */
{
- /* VEX_W_0F385A_P_2_M_0 */
- { "vbroadcasti128", { XM, Mxmm }, 0 },
+ { "vpcomb", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_CD_L_0 */
{
- /* VEX_W_0F3878_P_2 */
- { "vpbroadcastb", { XM, EXxmm_mb }, 0 },
+ { "vpcomw", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_CE_L_0 */
{
- /* VEX_W_0F3879_P_2 */
- { "vpbroadcastw", { XM, EXxmm_mw }, 0 },
+ { "vpcomd", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_CF_L_0 */
{
- /* VEX_W_0F38CF_P_2 */
- { "vgf2p8mulb", { XM, Vex, EXx }, 0 },
+ { "vpcomq", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_EC_L_0 */
{
- /* VEX_W_0F3A00_P_2 */
- { Bad_Opcode },
- { "vpermq", { XM, EXx, Ib }, 0 },
+ { "vpcomub", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_ED_L_0 */
{
- /* VEX_W_0F3A01_P_2 */
- { Bad_Opcode },
- { "vpermpd", { XM, EXx, Ib }, 0 },
+ { "vpcomuw", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_EE_L_0 */
{
- /* VEX_W_0F3A02_P_2 */
- { "vpblendd", { XM, Vex, EXx, Ib }, 0 },
+ { "vpcomud", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_08_EF_L_0 */
{
- /* VEX_W_0F3A04_P_2 */
- { "vpermilps", { XM, EXx, Ib }, 0 },
+ { "vpcomuq", { XM, Vex, EXx, VPCOM }, 0 },
},
+ /* VEX_W_0FXOP_09_80 */
{
- /* VEX_W_0F3A05_P_2 */
- { "vpermilpd", { XM, EXx, Ib }, 0 },
+ { "vfrczps", { XM, EXx }, 0 },
},
+ /* VEX_W_0FXOP_09_81 */
{
- /* VEX_W_0F3A06_P_2 */
- { "vperm2f128", { XM, Vex256, EXx, Ib }, 0 },
+ { "vfrczpd", { XM, EXx }, 0 },
},
+ /* VEX_W_0FXOP_09_82 */
{
- /* VEX_W_0F3A18_P_2 */
- { "vinsertf128", { XM, Vex256, EXxmm, Ib }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_82_W_0) },
},
+ /* VEX_W_0FXOP_09_83 */
{
- /* VEX_W_0F3A19_P_2 */
- { "vextractf128", { EXxmm, XM, Ib }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_83_W_0) },
},
+ /* VEX_W_0FXOP_09_C1_L_0 */
{
- /* VEX_W_0F3A1D_P_2 */
- { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, 0 },
+ { "vphaddbw", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_C2_L_0 */
{
- /* VEX_W_0F3A30_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F3A30_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F3A30_P_2_LEN_0) },
+ { "vphaddbd", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_C3_L_0 */
{
- /* VEX_W_0F3A31_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F3A31_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F3A31_P_2_LEN_0) },
+ { "vphaddbq", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_C6_L_0 */
{
- /* VEX_W_0F3A32_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F3A32_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F3A32_P_2_LEN_0) },
+ { "vphaddwd", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_C7_L_0 */
{
- /* VEX_W_0F3A33_P_2_LEN_0 */
- { MOD_TABLE (MOD_VEX_W_0_0F3A33_P_2_LEN_0) },
- { MOD_TABLE (MOD_VEX_W_1_0F3A33_P_2_LEN_0) },
+ { "vphaddwq", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_CB_L_0 */
{
- /* VEX_W_0F3A38_P_2 */
- { "vinserti128", { XM, Vex256, EXxmm, Ib }, 0 },
+ { "vphadddq", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_D1_L_0 */
{
- /* VEX_W_0F3A39_P_2 */
- { "vextracti128", { EXxmm, XM, Ib }, 0 },
+ { "vphaddubw", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_D2_L_0 */
{
- /* VEX_W_0F3A46_P_2 */
- { "vperm2i128", { XM, Vex256, EXx, Ib }, 0 },
+ { "vphaddubd", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_D3_L_0 */
{
- /* VEX_W_0F3A48_P_2 */
- { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
- { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
+ { "vphaddubq", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_D6_L_0 */
{
- /* VEX_W_0F3A49_P_2 */
- { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
- { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
+ { "vphadduwd", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_D7_L_0 */
{
- /* VEX_W_0F3A4A_P_2 */
- { "vblendvps", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vphadduwq", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_DB_L_0 */
{
- /* VEX_W_0F3A4B_P_2 */
- { "vblendvpd", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vphaddudq", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_E1_L_0 */
{
- /* VEX_W_0F3A4C_P_2 */
- { "vpblendvb", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vphsubbw", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_E2_L_0 */
{
- /* VEX_W_0F3ACE_P_2 */
- { Bad_Opcode },
- { "vgf2p8affineqb", { XM, Vex, EXx, Ib }, 0 },
+ { "vphsubwd", { XM, EXxmm }, 0 },
},
+ /* VEX_W_0FXOP_09_E3_L_0 */
{
- /* VEX_W_0F3ACF_P_2 */
- { Bad_Opcode },
- { "vgf2p8affineinvqb", { XM, Vex, EXx, Ib }, 0 },
+ { "vphsubdq", { XM, EXxmm }, 0 },
},
#include "i386-dis-evex-w.h"
};
static const struct dis386 mod_table[][2] = {
+ {
+ /* MOD_62_32BIT */
+ { "bound{S|}", { Gv, Ma }, 0 },
+ { EVEX_TABLE (EVEX_0F) },
+ },
{
/* MOD_8D */
{ "leaS", { Gv, M }, 0 },
},
+ {
+ /* MOD_C4_32BIT */
+ { "lesS", { Gv, Mp }, 0 },
+ { VEX_C4_TABLE (VEX_0F) },
+ },
+ {
+ /* MOD_C5_32BIT */
+ { "ldsS", { Gv, Mp }, 0 },
+ { VEX_C5_TABLE (VEX_0F) },
+ },
{
/* MOD_C6_REG_7 */
{ Bad_Opcode },
{
/* MOD_0F18_REG_0 */
{ "prefetchnta", { Mb }, 0 },
+ { "nopQ", { Ev }, 0 },
},
{
/* MOD_0F18_REG_1 */
{ "prefetcht0", { Mb }, 0 },
+ { "nopQ", { Ev }, 0 },
},
{
/* MOD_0F18_REG_2 */
{ "prefetcht1", { Mb }, 0 },
+ { "nopQ", { Ev }, 0 },
},
{
/* MOD_0F18_REG_3 */
{ "prefetcht2", { Mb }, 0 },
- },
- {
- /* MOD_0F18_REG_4 */
- { "nop/reserved", { Mb }, 0 },
- },
- {
- /* MOD_0F18_REG_5 */
- { "nop/reserved", { Mb }, 0 },
- },
- {
- /* MOD_0F18_REG_6 */
- { "nop/reserved", { Mb }, 0 },
- },
- {
- /* MOD_0F18_REG_7 */
- { "nop/reserved", { Mb }, 0 },
+ { "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1A_PREFIX_0 */
{
/* MOD_0F1B_PREFIX_1 */
{ "bndmk", { Gbnd, Mv_bnd }, 0 },
- { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
},
{
/* MOD_0F1C_PREFIX_0 */
},
{
/* MOD_0F1E_PREFIX_1 */
- { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
{ REG_TABLE (REG_0F1E_P_1_MOD_3) },
},
- {
- /* MOD_0F24 */
- { Bad_Opcode },
- { "movL", { Rd, Td }, 0 },
- },
- {
- /* MOD_0F26 */
- { Bad_Opcode },
- { "movL", { Td, Rd }, 0 },
- },
{
/* MOD_0F2B_PREFIX_0 */
{"movntps", { Mx, XM }, PREFIX_OPCODE },
{ "movmskpX", { Gdq, XS }, PREFIX_OPCODE },
},
{
- /* MOD_0F71_REG_2 */
- { Bad_Opcode },
- { "psrlw", { MS, Ib }, 0 },
- },
- {
- /* MOD_0F71_REG_4 */
- { Bad_Opcode },
- { "psraw", { MS, Ib }, 0 },
- },
- {
- /* MOD_0F71_REG_6 */
- { Bad_Opcode },
- { "psllw", { MS, Ib }, 0 },
- },
- {
- /* MOD_0F72_REG_2 */
- { Bad_Opcode },
- { "psrld", { MS, Ib }, 0 },
- },
- {
- /* MOD_0F72_REG_4 */
+ /* MOD_0F71 */
{ Bad_Opcode },
- { "psrad", { MS, Ib }, 0 },
+ { REG_TABLE (REG_0F71_MOD_0) },
},
{
- /* MOD_0F72_REG_6 */
+ /* MOD_0F72 */
{ Bad_Opcode },
- { "pslld", { MS, Ib }, 0 },
+ { REG_TABLE (REG_0F72_MOD_0) },
},
{
- /* MOD_0F73_REG_2 */
+ /* MOD_0F73 */
{ Bad_Opcode },
- { "psrlq", { MS, Ib }, 0 },
- },
- {
- /* MOD_0F73_REG_3 */
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F73_REG_3) },
- },
- {
- /* MOD_0F73_REG_6 */
- { Bad_Opcode },
- { "psllq", { MS, Ib }, 0 },
- },
- {
- /* MOD_0F73_REG_7 */
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_0F73_REG_7) },
+ { REG_TABLE (REG_0F73_MOD_0) },
},
{
/* MOD_0FAE_REG_0 */
},
{
/* MOD_0FAE_REG_5 */
- { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_0) },
+ { "xrstor", { FXSAVE }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_3) },
},
{
},
{
/* MOD_0FC3 */
- { PREFIX_TABLE (PREFIX_0FC3_MOD_0) },
+ { "movntiS", { Edq, Gdq }, PREFIX_OPCODE },
},
{
/* MOD_0FC7_REG_3 */
{ "lddqu", { XM, M }, 0 },
},
{
- /* MOD_0F382A_PREFIX_2 */
- { "movntdqa", { XM, Mx }, 0 },
+ /* MOD_0F382A */
+ { "movntdqa", { XM, Mx }, PREFIX_DATA },
+ },
+ {
+ /* MOD_0F38DC_PREFIX_1 */
+ { "aesenc128kl", { XM, M }, 0 },
+ { "loadiwkey", { XM, EXx }, 0 },
+ },
+ {
+ /* MOD_0F38DD_PREFIX_1 */
+ { "aesdec128kl", { XM, M }, 0 },
+ },
+ {
+ /* MOD_0F38DE_PREFIX_1 */
+ { "aesenc256kl", { XM, M }, 0 },
+ },
+ {
+ /* MOD_0F38DF_PREFIX_1 */
+ { "aesdec256kl", { XM, M }, 0 },
},
{
- /* MOD_0F38F5_PREFIX_2 */
- { "wrussK", { M, Gdq }, PREFIX_OPCODE },
+ /* MOD_0F38F5 */
+ { "wrussK", { M, Gdq }, PREFIX_DATA },
},
{
/* MOD_0F38F6_PREFIX_0 */
{ "enqcmd", { Gva, M }, PREFIX_OPCODE },
},
{
- /* MOD_0F38F9_PREFIX_0 */
- { "movdiri", { Ev, Gv }, PREFIX_OPCODE },
+ /* MOD_0F38F9 */
+ { "movdiri", { Edq, Gdq }, PREFIX_OPCODE },
},
{
- /* MOD_62_32BIT */
- { "bound{S|}", { Gv, Ma }, 0 },
- { EVEX_TABLE (EVEX_0F) },
+ /* MOD_0F38FA_PREFIX_1 */
+ { Bad_Opcode },
+ { "encodekey128", { Gd, Ed }, 0 },
},
{
- /* MOD_C4_32BIT */
- { "lesS", { Gv, Mp }, 0 },
- { VEX_C4_TABLE (VEX_0F) },
+ /* MOD_0F38FB_PREFIX_1 */
+ { Bad_Opcode },
+ { "encodekey256", { Gd, Ed }, 0 },
},
{
- /* MOD_C5_32BIT */
- { "ldsS", { Gv, Mp }, 0 },
- { VEX_C5_TABLE (VEX_0F) },
+ /* MOD_0F3A0F_PREFIX_1 */
+ { Bad_Opcode },
+ { REG_TABLE (REG_0F3A0F_PREFIX_1_MOD_3) },
},
{
/* MOD_VEX_0F12_PREFIX_0 */
{ "vmovntpX", { Mx, XM }, PREFIX_OPCODE },
},
{
- /* MOD_VEX_W_0_0F41_P_0_LEN_1 */
- { Bad_Opcode },
- { "kandw", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F41_P_0_LEN_1 */
- { Bad_Opcode },
- { "kandq", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F41_P_2_LEN_1 */
- { Bad_Opcode },
- { "kandb", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F41_P_2_LEN_1 */
- { Bad_Opcode },
- { "kandd", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F42_P_0_LEN_1 */
- { Bad_Opcode },
- { "kandnw", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F42_P_0_LEN_1 */
- { Bad_Opcode },
- { "kandnq", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F42_P_2_LEN_1 */
- { Bad_Opcode },
- { "kandnb", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F42_P_2_LEN_1 */
- { Bad_Opcode },
- { "kandnd", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F44_P_0_LEN_0 */
- { Bad_Opcode },
- { "knotw", { MaskG, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F44_P_0_LEN_0 */
- { Bad_Opcode },
- { "knotq", { MaskG, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F44_P_2_LEN_0 */
- { Bad_Opcode },
- { "knotb", { MaskG, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F44_P_2_LEN_0 */
- { Bad_Opcode },
- { "knotd", { MaskG, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F45_P_0_LEN_1 */
- { Bad_Opcode },
- { "korw", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F45_P_0_LEN_1 */
- { Bad_Opcode },
- { "korq", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F45_P_2_LEN_1 */
- { Bad_Opcode },
- { "korb", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F45_P_2_LEN_1 */
- { Bad_Opcode },
- { "kord", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F46_P_0_LEN_1 */
- { Bad_Opcode },
- { "kxnorw", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F46_P_0_LEN_1 */
- { Bad_Opcode },
- { "kxnorq", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F46_P_2_LEN_1 */
- { Bad_Opcode },
- { "kxnorb", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F46_P_2_LEN_1 */
- { Bad_Opcode },
- { "kxnord", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F47_P_0_LEN_1 */
- { Bad_Opcode },
- { "kxorw", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_1_0F47_P_0_LEN_1 */
- { Bad_Opcode },
- { "kxorq", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F47_P_2_LEN_1 */
+ /* MOD_VEX_0F41_L_1 */
{ Bad_Opcode },
- { "kxorb", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F41_L_1_M_1) },
},
{
- /* MOD_VEX_W_1_0F47_P_2_LEN_1 */
+ /* MOD_VEX_0F42_L_1 */
{ Bad_Opcode },
- { "kxord", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F42_L_1_M_1) },
},
{
- /* MOD_VEX_W_0_0F4A_P_0_LEN_1 */
+ /* MOD_VEX_0F44_L_0 */
{ Bad_Opcode },
- { "kaddw", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F44_L_0_M_1) },
},
{
- /* MOD_VEX_W_1_0F4A_P_0_LEN_1 */
+ /* MOD_VEX_0F45_L_1 */
{ Bad_Opcode },
- { "kaddq", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F45_L_1_M_1) },
},
{
- /* MOD_VEX_W_0_0F4A_P_2_LEN_1 */
+ /* MOD_VEX_0F46_L_1 */
{ Bad_Opcode },
- { "kaddb", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F46_L_1_M_1) },
},
{
- /* MOD_VEX_W_1_0F4A_P_2_LEN_1 */
+ /* MOD_VEX_0F47_L_1 */
{ Bad_Opcode },
- { "kaddd", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F47_L_1_M_1) },
},
{
- /* MOD_VEX_W_0_0F4B_P_0_LEN_1 */
+ /* MOD_VEX_0F4A_L_1 */
{ Bad_Opcode },
- { "kunpckwd", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F4A_L_1_M_1) },
},
{
- /* MOD_VEX_W_1_0F4B_P_0_LEN_1 */
+ /* MOD_VEX_0F4B_L_1 */
{ Bad_Opcode },
- { "kunpckdq", { MaskG, MaskVex, MaskR }, 0 },
- },
- {
- /* MOD_VEX_W_0_0F4B_P_2_LEN_1 */
- { Bad_Opcode },
- { "kunpckbw", { MaskG, MaskVex, MaskR }, 0 },
+ { VEX_W_TABLE (VEX_W_0F4B_L_1_M_1) },
},
{
/* MOD_VEX_0F50 */
{ "vmovmskpX", { Gdq, XS }, PREFIX_OPCODE },
},
{
- /* MOD_VEX_0F71_REG_2 */
+ /* MOD_VEX_0F71 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F71_REG_2) },
+ { REG_TABLE (REG_VEX_0F71_M_0) },
},
{
- /* MOD_VEX_0F71_REG_4 */
+ /* MOD_VEX_0F72 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F71_REG_4) },
+ { REG_TABLE (REG_VEX_0F72_M_0) },
},
{
- /* MOD_VEX_0F71_REG_6 */
+ /* MOD_VEX_0F73 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F71_REG_6) },
+ { REG_TABLE (REG_VEX_0F73_M_0) },
},
{
- /* MOD_VEX_0F72_REG_2 */
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F72_REG_2) },
+ /* MOD_VEX_0F91_L_0 */
+ { VEX_W_TABLE (VEX_W_0F91_L_0_M_0) },
},
{
- /* MOD_VEX_0F72_REG_4 */
+ /* MOD_VEX_0F92_L_0 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F72_REG_4) },
+ { VEX_W_TABLE (VEX_W_0F92_L_0_M_1) },
},
{
- /* MOD_VEX_0F72_REG_6 */
+ /* MOD_VEX_0F93_L_0 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F72_REG_6) },
+ { VEX_W_TABLE (VEX_W_0F93_L_0_M_1) },
},
{
- /* MOD_VEX_0F73_REG_2 */
+ /* MOD_VEX_0F98_L_0 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F73_REG_2) },
+ { VEX_W_TABLE (VEX_W_0F98_L_0_M_1) },
},
{
- /* MOD_VEX_0F73_REG_3 */
+ /* MOD_VEX_0F99_L_0 */
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F73_REG_3) },
+ { VEX_W_TABLE (VEX_W_0F99_L_0_M_1) },
},
{
- /* MOD_VEX_0F73_REG_6 */
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F73_REG_6) },
+ /* MOD_VEX_0FAE_REG_2 */
+ { VEX_LEN_TABLE (VEX_LEN_0FAE_R_2_M_0) },
},
{
- /* MOD_VEX_0F73_REG_7 */
- { Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F73_REG_7) },
+ /* MOD_VEX_0FAE_REG_3 */
+ { VEX_LEN_TABLE (VEX_LEN_0FAE_R_3_M_0) },
},
{
- /* MOD_VEX_W_0_0F91_P_0_LEN_0 */
- { "kmovw", { Ew, MaskG }, 0 },
+ /* MOD_VEX_0FD7 */
{ Bad_Opcode },
+ { "vpmovmskb", { Gdq, XS }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_0_0F91_P_0_LEN_0 */
- { "kmovq", { Eq, MaskG }, 0 },
- { Bad_Opcode },
+ /* MOD_VEX_0FE7 */
+ { "vmovntdq", { Mx, XM }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_0_0F91_P_2_LEN_0 */
- { "kmovb", { Eb, MaskG }, 0 },
- { Bad_Opcode },
+ /* MOD_VEX_0FF0_PREFIX_3 */
+ { "vlddqu", { XM, M }, 0 },
},
{
- /* MOD_VEX_W_0_0F91_P_2_LEN_0 */
- { "kmovd", { Ed, MaskG }, 0 },
- { Bad_Opcode },
+ /* MOD_VEX_0F381A */
+ { VEX_LEN_TABLE (VEX_LEN_0F381A_M_0) },
},
{
- /* MOD_VEX_W_0_0F92_P_0_LEN_0 */
- { Bad_Opcode },
- { "kmovw", { MaskG, Rdq }, 0 },
+ /* MOD_VEX_0F382A */
+ { "vmovntdqa", { XM, Mx }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_0_0F92_P_2_LEN_0 */
- { Bad_Opcode },
- { "kmovb", { MaskG, Rdq }, 0 },
+ /* MOD_VEX_0F382C */
+ { VEX_W_TABLE (VEX_W_0F382C_M_0) },
},
{
- /* MOD_VEX_0F92_P_3_LEN_0 */
- { Bad_Opcode },
- { "kmovK", { MaskG, Rdq }, 0 },
+ /* MOD_VEX_0F382D */
+ { VEX_W_TABLE (VEX_W_0F382D_M_0) },
},
{
- /* MOD_VEX_W_0_0F93_P_0_LEN_0 */
- { Bad_Opcode },
- { "kmovw", { Gdq, MaskR }, 0 },
+ /* MOD_VEX_0F382E */
+ { VEX_W_TABLE (VEX_W_0F382E_M_0) },
},
{
- /* MOD_VEX_W_0_0F93_P_2_LEN_0 */
- { Bad_Opcode },
- { "kmovb", { Gdq, MaskR }, 0 },
+ /* MOD_VEX_0F382F */
+ { VEX_W_TABLE (VEX_W_0F382F_M_0) },
},
{
- /* MOD_VEX_0F93_P_3_LEN_0 */
- { Bad_Opcode },
- { "kmovK", { Gdq, MaskR }, 0 },
+ /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0) },
+ { REG_TABLE (REG_VEX_0F3849_X86_64_P_0_W_0_M_1) },
},
{
- /* MOD_VEX_W_0_0F98_P_0_LEN_0 */
- { Bad_Opcode },
- { "kortestw", { MaskG, MaskR }, 0 },
+ /* MOD_VEX_0F3849_X86_64_P_2_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0) },
},
{
- /* MOD_VEX_W_1_0F98_P_0_LEN_0 */
+ /* MOD_VEX_0F3849_X86_64_P_3_W_0 */
{ Bad_Opcode },
- { "kortestq", { MaskG, MaskR }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0) },
},
{
- /* MOD_VEX_W_0_0F98_P_2_LEN_0 */
- { Bad_Opcode },
- { "kortestb", { MaskG, MaskR }, 0 },
+ /* MOD_VEX_0F384B_X86_64_P_1_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0) },
},
{
- /* MOD_VEX_W_1_0F98_P_2_LEN_0 */
- { Bad_Opcode },
- { "kortestd", { MaskG, MaskR }, 0 },
+ /* MOD_VEX_0F384B_X86_64_P_2_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0) },
},
{
- /* MOD_VEX_W_0_0F99_P_0_LEN_0 */
- { Bad_Opcode },
- { "ktestw", { MaskG, MaskR }, 0 },
+ /* MOD_VEX_0F384B_X86_64_P_3_W_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0) },
},
{
- /* MOD_VEX_W_1_0F99_P_0_LEN_0 */
- { Bad_Opcode },
- { "ktestq", { MaskG, MaskR }, 0 },
+ /* MOD_VEX_0F385A */
+ { VEX_LEN_TABLE (VEX_LEN_0F385A_M_0) },
},
{
- /* MOD_VEX_W_0_0F99_P_2_LEN_0 */
+ /* MOD_VEX_0F385C_X86_64_P_1_W_0 */
{ Bad_Opcode },
- { "ktestb", { MaskG, MaskR }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
},
{
- /* MOD_VEX_W_1_0F99_P_2_LEN_0 */
+ /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
{ Bad_Opcode },
- { "ktestd", { MaskG, MaskR }, 0 },
- },
- {
- /* MOD_VEX_0FAE_REG_2 */
- { VEX_LEN_TABLE (VEX_LEN_0FAE_R_2_M_0) },
- },
- {
- /* MOD_VEX_0FAE_REG_3 */
- { VEX_LEN_TABLE (VEX_LEN_0FAE_R_3_M_0) },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0) },
},
{
- /* MOD_VEX_0FD7_PREFIX_2 */
+ /* MOD_VEX_0F385E_X86_64_P_1_W_0 */
{ Bad_Opcode },
- { "vpmovmskb", { Gdq, XS }, 0 },
- },
- {
- /* MOD_VEX_0FE7_PREFIX_2 */
- { "vmovntdq", { Mx, XM }, 0 },
- },
- {
- /* MOD_VEX_0FF0_PREFIX_3 */
- { "vlddqu", { XM, M }, 0 },
- },
- {
- /* MOD_VEX_0F381A_PREFIX_2 */
- { VEX_LEN_TABLE (VEX_LEN_0F381A_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F382A_PREFIX_2 */
- { "vmovntdqa", { XM, Mx }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0) },
},
{
- /* MOD_VEX_0F382C_PREFIX_2 */
- { VEX_W_TABLE (VEX_W_0F382C_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F382D_PREFIX_2 */
- { VEX_W_TABLE (VEX_W_0F382D_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F382E_PREFIX_2 */
- { VEX_W_TABLE (VEX_W_0F382E_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F382F_PREFIX_2 */
- { VEX_W_TABLE (VEX_W_0F382F_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F385A_PREFIX_2 */
- { VEX_LEN_TABLE (VEX_LEN_0F385A_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F388C_PREFIX_2 */
- { "vpmaskmov%LW", { XM, Vex, Mx }, 0 },
- },
- {
- /* MOD_VEX_0F388E_PREFIX_2 */
- { "vpmaskmov%LW", { Mx, Vex, XM }, 0 },
+ /* MOD_VEX_0F385E_X86_64_P_2_W_0 */
+ { Bad_Opcode },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0) },
},
{
- /* MOD_VEX_W_0_0F3A30_P_2_LEN_0 */
+ /* MOD_VEX_0F385E_X86_64_P_3_W_0 */
{ Bad_Opcode },
- { "kshiftrb", { MaskG, MaskR, Ib }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
},
{
- /* MOD_VEX_W_1_0F3A30_P_2_LEN_0 */
- { Bad_Opcode },
- { "kshiftrw", { MaskG, MaskR, Ib }, 0 },
+ /* MOD_VEX_0F388C */
+ { "vpmaskmov%DQ", { XM, Vex, Mx }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_0_0F3A31_P_2_LEN_0 */
- { Bad_Opcode },
- { "kshiftrd", { MaskG, MaskR, Ib }, 0 },
+ /* MOD_VEX_0F388E */
+ { "vpmaskmov%DQ", { Mx, Vex, XM }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_1_0F3A31_P_2_LEN_0 */
+ /* MOD_VEX_0F3A30_L_0 */
{ Bad_Opcode },
- { "kshiftrq", { MaskG, MaskR, Ib }, 0 },
+ { "kshiftr%BW", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_0_0F3A32_P_2_LEN_0 */
+ /* MOD_VEX_0F3A31_L_0 */
{ Bad_Opcode },
- { "kshiftlb", { MaskG, MaskR, Ib }, 0 },
+ { "kshiftr%DQ", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_1_0F3A32_P_2_LEN_0 */
+ /* MOD_VEX_0F3A32_L_0 */
{ Bad_Opcode },
- { "kshiftlw", { MaskG, MaskR, Ib }, 0 },
+ { "kshiftl%BW", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_0_0F3A33_P_2_LEN_0 */
+ /* MOD_VEX_0F3A33_L_0 */
{ Bad_Opcode },
- { "kshiftld", { MaskG, MaskR, Ib }, 0 },
+ { "kshiftl%DQ", { MaskG, MaskE, Ib }, PREFIX_DATA },
},
{
- /* MOD_VEX_W_1_0F3A33_P_2_LEN_0 */
+ /* MOD_XOP_09_12 */
{ Bad_Opcode },
- { "kshiftlq", { MaskG, MaskR, Ib }, 0 },
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_12_M_1) },
},
#include "i386-dis-evex-mod.h"
{ "mwait", { { OP_Mwait, 0 } }, 0 },
{ "clac", { Skip_MODRM }, 0 },
{ "stac", { Skip_MODRM }, 0 },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { "encls", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_4) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_5) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_6) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_7) },
},
{
/* RM_0F01_REG_2 */
{ PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_1) },
{ PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_2) },
{ Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { "rdpkru", { Skip_MODRM }, 0 },
- { "wrpkru", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_4) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_5) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_6) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_7) },
},
{
/* RM_0F01_REG_7_MOD_3 */
{ "swapgs", { Skip_MODRM }, 0 },
{ "rdtscp", { Skip_MODRM }, 0 },
{ PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) },
- { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_3) },
+ { "mwaitx", { { OP_Mwait, eBX_reg } }, PREFIX_OPCODE },
{ "clzero", { Skip_MODRM }, 0 },
{ "rdpru", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_6) },
+ { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_7) },
},
{
/* RM_0F1E_P_1_MOD_3_REG_7 */
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
- { "endbr64", { Skip_MODRM }, PREFIX_OPCODE },
- { "endbr32", { Skip_MODRM }, PREFIX_OPCODE },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
- { "nopQ", { Ev }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "endbr64", { Skip_MODRM }, 0 },
+ { "endbr32", { Skip_MODRM }, 0 },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
+ { "nopQ", { Ev }, PREFIX_IGNORED },
},
{
/* RM_0FAE_REG_6_MOD_3 */
{ "mfence", { Skip_MODRM }, 0 },
},
{
- /* RM_0FAE_REG_7_MOD_3 */
- { "sfence", { Skip_MODRM }, 0 },
-
+ /* RM_0FAE_REG_7_MOD_3 */
+ { "sfence", { Skip_MODRM }, 0 },
+ },
+ {
+ /* RM_0F3A0F_P_1_MOD_3_REG_0 */
+ { "hreset", { Skip_MODRM, Ib }, 0 },
+ },
+ {
+ /* RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0 */
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0) },
},
};
#define BND_PREFIX (0xf2 | 0x400)
#define NOTRACK_PREFIX (0x3e | 0x100)
-/* Remember if the current op is a jump instruction. */
-static bfd_boolean op_is_jump = FALSE;
-
static int
-ckprefix (void)
+ckprefix (instr_info *ins)
{
int newrex, i, length;
- rex = 0;
- prefixes = 0;
- used_prefixes = 0;
- rex_used = 0;
- last_lock_prefix = -1;
- last_repz_prefix = -1;
- last_repnz_prefix = -1;
- last_data_prefix = -1;
- last_addr_prefix = -1;
- last_rex_prefix = -1;
- last_seg_prefix = -1;
- fwait_prefix = -1;
- active_seg_prefix = 0;
- for (i = 0; i < (int) ARRAY_SIZE (all_prefixes); i++)
- all_prefixes[i] = 0;
+ ins->rex = 0;
+ ins->prefixes = 0;
+ ins->used_prefixes = 0;
+ ins->rex_used = 0;
+ ins->evex_used = 0;
+ ins->last_lock_prefix = -1;
+ ins->last_repz_prefix = -1;
+ ins->last_repnz_prefix = -1;
+ ins->last_data_prefix = -1;
+ ins->last_addr_prefix = -1;
+ ins->last_rex_prefix = -1;
+ ins->last_seg_prefix = -1;
+ ins->fwait_prefix = -1;
+ ins->active_seg_prefix = 0;
+ for (i = 0; i < (int) ARRAY_SIZE (ins->all_prefixes); i++)
+ ins->all_prefixes[i] = 0;
i = 0;
length = 0;
/* The maximum instruction length is 15bytes. */
while (length < MAX_CODE_LENGTH - 1)
{
- FETCH_DATA (the_info, codep + 1);
+ FETCH_DATA (ins->info, ins->codep + 1);
newrex = 0;
- switch (*codep)
+ switch (*ins->codep)
{
/* REX prefixes family. */
case 0x40:
case 0x4d:
case 0x4e:
case 0x4f:
- if (address_mode == mode_64bit)
- newrex = *codep;
+ if (ins->address_mode == mode_64bit)
+ newrex = *ins->codep;
else
return 1;
- last_rex_prefix = i;
+ ins->last_rex_prefix = i;
break;
case 0xf3:
- prefixes |= PREFIX_REPZ;
- last_repz_prefix = i;
+ ins->prefixes |= PREFIX_REPZ;
+ ins->last_repz_prefix = i;
break;
case 0xf2:
- prefixes |= PREFIX_REPNZ;
- last_repnz_prefix = i;
+ ins->prefixes |= PREFIX_REPNZ;
+ ins->last_repnz_prefix = i;
break;
case 0xf0:
- prefixes |= PREFIX_LOCK;
- last_lock_prefix = i;
+ ins->prefixes |= PREFIX_LOCK;
+ ins->last_lock_prefix = i;
break;
case 0x2e:
- prefixes |= PREFIX_CS;
- last_seg_prefix = i;
- active_seg_prefix = PREFIX_CS;
+ ins->prefixes |= PREFIX_CS;
+ ins->last_seg_prefix = i;
+ if (ins->address_mode != mode_64bit)
+ ins->active_seg_prefix = PREFIX_CS;
break;
case 0x36:
- prefixes |= PREFIX_SS;
- last_seg_prefix = i;
- active_seg_prefix = PREFIX_SS;
+ ins->prefixes |= PREFIX_SS;
+ ins->last_seg_prefix = i;
+ if (ins->address_mode != mode_64bit)
+ ins->active_seg_prefix = PREFIX_SS;
break;
case 0x3e:
- prefixes |= PREFIX_DS;
- last_seg_prefix = i;
- active_seg_prefix = PREFIX_DS;
+ ins->prefixes |= PREFIX_DS;
+ ins->last_seg_prefix = i;
+ if (ins->address_mode != mode_64bit)
+ ins->active_seg_prefix = PREFIX_DS;
break;
case 0x26:
- prefixes |= PREFIX_ES;
- last_seg_prefix = i;
- active_seg_prefix = PREFIX_ES;
+ ins->prefixes |= PREFIX_ES;
+ ins->last_seg_prefix = i;
+ if (ins->address_mode != mode_64bit)
+ ins->active_seg_prefix = PREFIX_ES;
break;
case 0x64:
- prefixes |= PREFIX_FS;
- last_seg_prefix = i;
- active_seg_prefix = PREFIX_FS;
+ ins->prefixes |= PREFIX_FS;
+ ins->last_seg_prefix = i;
+ ins->active_seg_prefix = PREFIX_FS;
break;
case 0x65:
- prefixes |= PREFIX_GS;
- last_seg_prefix = i;
- active_seg_prefix = PREFIX_GS;
+ ins->prefixes |= PREFIX_GS;
+ ins->last_seg_prefix = i;
+ ins->active_seg_prefix = PREFIX_GS;
break;
case 0x66:
- prefixes |= PREFIX_DATA;
- last_data_prefix = i;
+ ins->prefixes |= PREFIX_DATA;
+ ins->last_data_prefix = i;
break;
case 0x67:
- prefixes |= PREFIX_ADDR;
- last_addr_prefix = i;
+ ins->prefixes |= PREFIX_ADDR;
+ ins->last_addr_prefix = i;
break;
case FWAIT_OPCODE:
/* fwait is really an instruction. If there are prefixes
before the fwait, they belong to the fwait, *not* to the
following instruction. */
- fwait_prefix = i;
- if (prefixes || rex)
+ ins->fwait_prefix = i;
+ if (ins->prefixes || ins->rex)
{
- prefixes |= PREFIX_FWAIT;
- codep++;
+ ins->prefixes |= PREFIX_FWAIT;
+ ins->codep++;
/* This ensures that the previous REX prefixes are noticed
as unused prefixes, as in the return case below. */
- rex_used = rex;
+ ins->rex_used = ins->rex;
return 1;
}
- prefixes = PREFIX_FWAIT;
+ ins->prefixes = PREFIX_FWAIT;
break;
default:
return 1;
}
/* Rex is ignored when followed by another prefix. */
- if (rex)
+ if (ins->rex)
{
- rex_used = rex;
+ ins->rex_used = ins->rex;
return 1;
}
- if (*codep != FWAIT_OPCODE)
- all_prefixes[i++] = *codep;
- rex = newrex;
- codep++;
+ if (*ins->codep != FWAIT_OPCODE)
+ ins->all_prefixes[i++] = *ins->codep;
+ ins->rex = newrex;
+ ins->codep++;
length++;
}
return 0;
prefix byte. */
static const char *
-prefix_name (int pref, int sizeflag)
+prefix_name (instr_info *ins, int pref, int sizeflag)
{
static const char *rexes [16] =
{
case 0x66:
return (sizeflag & DFLAG) ? "data16" : "data32";
case 0x67:
- if (address_mode == mode_64bit)
+ if (ins->address_mode == mode_64bit)
return (sizeflag & AFLAG) ? "addr32" : "addr64";
else
return (sizeflag & AFLAG) ? "addr16" : "addr32";
}
}
-static char op_out[MAX_OPERANDS][100];
-static int op_ad, op_index[MAX_OPERANDS];
-static int two_source_ops;
-static bfd_vma op_address[MAX_OPERANDS];
-static bfd_vma op_riprel[MAX_OPERANDS];
-static bfd_vma start_pc;
-
-/*
- * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
- * (see topic "Redundant prefixes" in the "Differences from 8086"
- * section of the "Virtual 8086 Mode" chapter.)
- * 'pc' should be the address of this instruction, it will
- * be used to print the target address if this is a relative jump or call
- * The function returns the length of this instruction in bytes.
- */
-
-static char intel_syntax;
-static char intel_mnemonic = !SYSV386_COMPAT;
-static char open_char;
-static char close_char;
-static char separator_char;
-static char scale_char;
-
-enum x86_64_isa
-{
- amd64 = 1,
- intel64
-};
-
-static enum x86_64_isa isa64;
-
/* Here for backwards compatibility. When gdb stops using
print_insn_i386_att and print_insn_i386_intel these functions can
disappear, and print_insn_i386 be merged into print_insn. */
int
print_insn_i386_att (bfd_vma pc, disassemble_info *info)
{
- intel_syntax = 0;
+ instr_info ins;
+ ins.info = info;
+ ins.intel_syntax = 0;
- return print_insn (pc, info);
+ return print_insn (pc, &ins);
}
int
print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
{
- intel_syntax = 1;
+ instr_info ins;
+ ins.info = info;
+ ins.intel_syntax = 1;
- return print_insn (pc, info);
+ return print_insn (pc, &ins);
}
int
print_insn_i386 (bfd_vma pc, disassemble_info *info)
{
- intel_syntax = -1;
+ instr_info ins;
+ ins.info = info;
+ ins.intel_syntax = -1;
- return print_insn (pc, info);
+ return print_insn (pc, &ins);
}
void
/* Get a pointer to struct dis386 with a valid name. */
static const struct dis386 *
-get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
+get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
{
int vindex, vex_table_index;
switch (dp->op[0].bytemode)
{
case USE_REG_TABLE:
- dp = ®_table[dp->op[1].bytemode][modrm.reg];
+ dp = ®_table[dp->op[1].bytemode][ins->modrm.reg];
break;
case USE_MOD_TABLE:
- vindex = modrm.mod == 0x3 ? 1 : 0;
+ vindex = ins->modrm.mod == 0x3 ? 1 : 0;
dp = &mod_table[dp->op[1].bytemode][vindex];
break;
case USE_RM_TABLE:
- dp = &rm_table[dp->op[1].bytemode][modrm.rm];
+ dp = &rm_table[dp->op[1].bytemode][ins->modrm.rm];
break;
case USE_PREFIX_TABLE:
- if (need_vex)
+ if (ins->need_vex)
{
/* The prefix in VEX is implicit. */
- switch (vex.prefix)
+ switch (ins->vex.prefix)
{
case 0:
vindex = 0;
/* We check PREFIX_REPNZ and PREFIX_REPZ before PREFIX_DATA.
When there are multiple PREFIX_REPNZ and PREFIX_REPZ, the
last one wins. */
- if ((prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) != 0)
+ if ((ins->prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) != 0)
{
- if (last_repz_prefix > last_repnz_prefix)
+ if (ins->last_repz_prefix > ins->last_repnz_prefix)
{
vindex = 1;
prefix = PREFIX_REPZ;
- last_prefix = last_repz_prefix;
+ last_prefix = ins->last_repz_prefix;
}
else
{
vindex = 3;
prefix = PREFIX_REPNZ;
- last_prefix = last_repnz_prefix;
+ last_prefix = ins->last_repnz_prefix;
}
/* Check if prefix should be ignored. */
if ((((prefix_table[dp->op[1].bytemode][vindex].prefix_requirement
& PREFIX_IGNORED) >> PREFIX_IGNORED_SHIFT)
- & prefix) != 0)
+ & prefix) != 0
+ && !prefix_table[dp->op[1].bytemode][vindex].name)
vindex = 0;
}
- if (vindex == 0 && (prefixes & PREFIX_DATA) != 0)
+ if (vindex == 0 && (ins->prefixes & PREFIX_DATA) != 0)
{
vindex = 2;
prefix = PREFIX_DATA;
- last_prefix = last_data_prefix;
+ last_prefix = ins->last_data_prefix;
}
if (vindex != 0)
{
- used_prefixes |= prefix;
- all_prefixes[last_prefix] = 0;
+ ins->used_prefixes |= prefix;
+ ins->all_prefixes[last_prefix] = 0;
}
}
dp = &prefix_table[dp->op[1].bytemode][vindex];
break;
case USE_X86_64_TABLE:
- vindex = address_mode == mode_64bit ? 1 : 0;
+ vindex = ins->address_mode == mode_64bit ? 1 : 0;
dp = &x86_64_table[dp->op[1].bytemode][vindex];
break;
case USE_3BYTE_TABLE:
- FETCH_DATA (info, codep + 2);
- vindex = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 2);
+ vindex = *ins->codep++;
dp = &three_byte_table[dp->op[1].bytemode][vindex];
- end_codep = codep;
- modrm.mod = (*codep >> 6) & 3;
- modrm.reg = (*codep >> 3) & 7;
- modrm.rm = *codep & 7;
+ ins->end_codep = ins->codep;
+ ins->modrm.mod = (*ins->codep >> 6) & 3;
+ ins->modrm.reg = (*ins->codep >> 3) & 7;
+ ins->modrm.rm = *ins->codep & 7;
break;
case USE_VEX_LEN_TABLE:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
vindex = 0;
break;
+ case 512:
+ /* This allows re-using in particular table entries where only
+ 128-bit operand size (VEX.L=0 / EVEX.L'L=0) are valid. */
+ if (ins->vex.evex)
+ {
case 256:
- vindex = 1;
- break;
+ vindex = 1;
+ break;
+ }
+ /* Fall through. */
default:
abort ();
break;
break;
case USE_EVEX_LEN_TABLE:
- if (!vex.evex)
+ if (!ins->vex.evex)
abort ();
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
vindex = 0;
break;
case USE_XOP_8F_TABLE:
- FETCH_DATA (info, codep + 3);
- rex = ~(*codep >> 5) & 0x7;
+ FETCH_DATA (ins->info, ins->codep + 3);
+ ins->rex = ~(*ins->codep >> 5) & 0x7;
/* VEX_TABLE_INDEX is the mmmmm part of the XOP byte 1 "RCB.mmmmm". */
- switch ((*codep & 0x1f))
+ switch ((*ins->codep & 0x1f))
{
default:
dp = &bad_opcode;
vex_table_index = XOP_0A;
break;
}
- codep++;
- vex.w = *codep & 0x80;
- if (vex.w && address_mode == mode_64bit)
- rex |= REX_W;
+ ins->codep++;
+ ins->vex.w = *ins->codep & 0x80;
+ if (ins->vex.w && ins->address_mode == mode_64bit)
+ ins->rex |= REX_W;
- vex.register_specifier = (~(*codep >> 3)) & 0xf;
- if (address_mode != mode_64bit)
+ ins->vex.register_specifier = (~(*ins->codep >> 3)) & 0xf;
+ if (ins->address_mode != mode_64bit)
{
/* In 16/32-bit mode REX_B is silently ignored. */
- rex &= ~REX_B;
+ ins->rex &= ~REX_B;
}
- vex.length = (*codep & 0x4) ? 256 : 128;
- switch ((*codep & 0x3))
+ ins->vex.length = (*ins->codep & 0x4) ? 256 : 128;
+ switch ((*ins->codep & 0x3))
{
case 0:
break;
case 1:
- vex.prefix = DATA_PREFIX_OPCODE;
+ ins->vex.prefix = DATA_PREFIX_OPCODE;
break;
case 2:
- vex.prefix = REPE_PREFIX_OPCODE;
+ ins->vex.prefix = REPE_PREFIX_OPCODE;
break;
case 3:
- vex.prefix = REPNE_PREFIX_OPCODE;
+ ins->vex.prefix = REPNE_PREFIX_OPCODE;
break;
}
- need_vex = 1;
- need_vex_reg = 1;
- codep++;
- vindex = *codep++;
+ ins->need_vex = true;
+ ins->codep++;
+ vindex = *ins->codep++;
dp = &xop_table[vex_table_index][vindex];
- end_codep = codep;
- FETCH_DATA (info, codep + 1);
- modrm.mod = (*codep >> 6) & 3;
- modrm.reg = (*codep >> 3) & 7;
- modrm.rm = *codep & 7;
+ ins->end_codep = ins->codep;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ ins->modrm.mod = (*ins->codep >> 6) & 3;
+ ins->modrm.reg = (*ins->codep >> 3) & 7;
+ ins->modrm.rm = *ins->codep & 7;
+
+ /* No XOP encoding so far allows for a non-zero embedded prefix. Avoid
+ having to decode the bits for every otherwise valid encoding. */
+ if (ins->vex.prefix)
+ return &bad_opcode;
break;
case USE_VEX_C4_TABLE:
/* VEX prefix. */
- FETCH_DATA (info, codep + 3);
- rex = ~(*codep >> 5) & 0x7;
- switch ((*codep & 0x1f))
+ FETCH_DATA (ins->info, ins->codep + 3);
+ ins->rex = ~(*ins->codep >> 5) & 0x7;
+ switch ((*ins->codep & 0x1f))
{
default:
dp = &bad_opcode;
vex_table_index = VEX_0F3A;
break;
}
- codep++;
- vex.w = *codep & 0x80;
- if (address_mode == mode_64bit)
+ ins->codep++;
+ ins->vex.w = *ins->codep & 0x80;
+ if (ins->address_mode == mode_64bit)
{
- if (vex.w)
- rex |= REX_W;
+ if (ins->vex.w)
+ ins->rex |= REX_W;
}
else
{
/* For the 3-byte VEX prefix in 32-bit mode, the REX_B bit
is ignored, other REX bits are 0 and the highest bit in
VEX.vvvv is also ignored (but we mustn't clear it here). */
- rex = 0;
+ ins->rex = 0;
}
- vex.register_specifier = (~(*codep >> 3)) & 0xf;
- vex.length = (*codep & 0x4) ? 256 : 128;
- switch ((*codep & 0x3))
+ ins->vex.register_specifier = (~(*ins->codep >> 3)) & 0xf;
+ ins->vex.length = (*ins->codep & 0x4) ? 256 : 128;
+ switch ((*ins->codep & 0x3))
{
case 0:
break;
case 1:
- vex.prefix = DATA_PREFIX_OPCODE;
+ ins->vex.prefix = DATA_PREFIX_OPCODE;
break;
case 2:
- vex.prefix = REPE_PREFIX_OPCODE;
+ ins->vex.prefix = REPE_PREFIX_OPCODE;
break;
case 3:
- vex.prefix = REPNE_PREFIX_OPCODE;
+ ins->vex.prefix = REPNE_PREFIX_OPCODE;
break;
}
- need_vex = 1;
- need_vex_reg = 1;
- codep++;
- vindex = *codep++;
+ ins->need_vex = true;
+ ins->codep++;
+ vindex = *ins->codep++;
dp = &vex_table[vex_table_index][vindex];
- end_codep = codep;
+ ins->end_codep = ins->codep;
/* There is no MODRM byte for VEX0F 77. */
if (vex_table_index != VEX_0F || vindex != 0x77)
{
- FETCH_DATA (info, codep + 1);
- modrm.mod = (*codep >> 6) & 3;
- modrm.reg = (*codep >> 3) & 7;
- modrm.rm = *codep & 7;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ ins->modrm.mod = (*ins->codep >> 6) & 3;
+ ins->modrm.reg = (*ins->codep >> 3) & 7;
+ ins->modrm.rm = *ins->codep & 7;
}
break;
case USE_VEX_C5_TABLE:
/* VEX prefix. */
- FETCH_DATA (info, codep + 2);
- rex = (*codep & 0x80) ? 0 : REX_R;
+ FETCH_DATA (ins->info, ins->codep + 2);
+ ins->rex = (*ins->codep & 0x80) ? 0 : REX_R;
/* For the 2-byte VEX prefix in 32-bit mode, the highest bit in
VEX.vvvv is 1. */
- vex.register_specifier = (~(*codep >> 3)) & 0xf;
- vex.length = (*codep & 0x4) ? 256 : 128;
- switch ((*codep & 0x3))
+ ins->vex.register_specifier = (~(*ins->codep >> 3)) & 0xf;
+ ins->vex.length = (*ins->codep & 0x4) ? 256 : 128;
+ switch ((*ins->codep & 0x3))
{
case 0:
break;
case 1:
- vex.prefix = DATA_PREFIX_OPCODE;
+ ins->vex.prefix = DATA_PREFIX_OPCODE;
break;
case 2:
- vex.prefix = REPE_PREFIX_OPCODE;
+ ins->vex.prefix = REPE_PREFIX_OPCODE;
break;
case 3:
- vex.prefix = REPNE_PREFIX_OPCODE;
+ ins->vex.prefix = REPNE_PREFIX_OPCODE;
break;
}
- need_vex = 1;
- need_vex_reg = 1;
- codep++;
- vindex = *codep++;
+ ins->need_vex = true;
+ ins->codep++;
+ vindex = *ins->codep++;
dp = &vex_table[dp->op[1].bytemode][vindex];
- end_codep = codep;
+ ins->end_codep = ins->codep;
/* There is no MODRM byte for VEX 77. */
if (vindex != 0x77)
{
- FETCH_DATA (info, codep + 1);
- modrm.mod = (*codep >> 6) & 3;
- modrm.reg = (*codep >> 3) & 7;
- modrm.rm = *codep & 7;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ ins->modrm.mod = (*ins->codep >> 6) & 3;
+ ins->modrm.reg = (*ins->codep >> 3) & 7;
+ ins->modrm.rm = *ins->codep & 7;
}
break;
case USE_VEX_W_TABLE:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- dp = &vex_w_table[dp->op[1].bytemode][vex.w ? 1 : 0];
+ dp = &vex_w_table[dp->op[1].bytemode][ins->vex.w];
break;
case USE_EVEX_TABLE:
- two_source_ops = 0;
+ ins->two_source_ops = false;
/* EVEX prefix. */
- vex.evex = 1;
- FETCH_DATA (info, codep + 4);
+ ins->vex.evex = true;
+ FETCH_DATA (ins->info, ins->codep + 4);
/* The first byte after 0x62. */
- rex = ~(*codep >> 5) & 0x7;
- vex.r = *codep & 0x10;
- switch ((*codep & 0xf))
+ ins->rex = ~(*ins->codep >> 5) & 0x7;
+ ins->vex.r = *ins->codep & 0x10;
+ switch ((*ins->codep & 0xf))
{
default:
return &bad_opcode;
case 0x3:
vex_table_index = EVEX_0F3A;
break;
+ case 0x5:
+ vex_table_index = EVEX_MAP5;
+ break;
+ case 0x6:
+ vex_table_index = EVEX_MAP6;
+ break;
}
/* The second byte after 0x62. */
- codep++;
- vex.w = *codep & 0x80;
- if (vex.w && address_mode == mode_64bit)
- rex |= REX_W;
+ ins->codep++;
+ ins->vex.w = *ins->codep & 0x80;
+ if (ins->vex.w && ins->address_mode == mode_64bit)
+ ins->rex |= REX_W;
- vex.register_specifier = (~(*codep >> 3)) & 0xf;
+ ins->vex.register_specifier = (~(*ins->codep >> 3)) & 0xf;
/* The U bit. */
- if (!(*codep & 0x4))
+ if (!(*ins->codep & 0x4))
return &bad_opcode;
- switch ((*codep & 0x3))
+ switch ((*ins->codep & 0x3))
{
case 0:
break;
case 1:
- vex.prefix = DATA_PREFIX_OPCODE;
+ ins->vex.prefix = DATA_PREFIX_OPCODE;
break;
case 2:
- vex.prefix = REPE_PREFIX_OPCODE;
+ ins->vex.prefix = REPE_PREFIX_OPCODE;
break;
case 3:
- vex.prefix = REPNE_PREFIX_OPCODE;
+ ins->vex.prefix = REPNE_PREFIX_OPCODE;
break;
}
/* The third byte after 0x62. */
- codep++;
+ ins->codep++;
/* Remember the static rounding bits. */
- vex.ll = (*codep >> 5) & 3;
- vex.b = (*codep & 0x10) != 0;
+ ins->vex.ll = (*ins->codep >> 5) & 3;
+ ins->vex.b = *ins->codep & 0x10;
- vex.v = *codep & 0x8;
- vex.mask_register_specifier = *codep & 0x7;
- vex.zeroing = *codep & 0x80;
+ ins->vex.v = *ins->codep & 0x8;
+ ins->vex.mask_register_specifier = *ins->codep & 0x7;
+ ins->vex.zeroing = *ins->codep & 0x80;
- if (address_mode != mode_64bit)
+ if (ins->address_mode != mode_64bit)
{
/* In 16/32-bit mode silently ignore following bits. */
- rex &= ~REX_B;
- vex.r = 1;
- vex.v = 1;
+ ins->rex &= ~REX_B;
+ ins->vex.r = true;
}
- need_vex = 1;
- need_vex_reg = 1;
- codep++;
- vindex = *codep++;
+ ins->need_vex = true;
+ ins->codep++;
+ vindex = *ins->codep++;
dp = &evex_table[vex_table_index][vindex];
- end_codep = codep;
- FETCH_DATA (info, codep + 1);
- modrm.mod = (*codep >> 6) & 3;
- modrm.reg = (*codep >> 3) & 7;
- modrm.rm = *codep & 7;
+ ins->end_codep = ins->codep;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ ins->modrm.mod = (*ins->codep >> 6) & 3;
+ ins->modrm.reg = (*ins->codep >> 3) & 7;
+ ins->modrm.rm = *ins->codep & 7;
/* Set vector length. */
- if (modrm.mod == 3 && vex.b)
- vex.length = 512;
+ if (ins->modrm.mod == 3 && ins->vex.b)
+ ins->vex.length = 512;
else
{
- switch (vex.ll)
+ switch (ins->vex.ll)
{
case 0x0:
- vex.length = 128;
+ ins->vex.length = 128;
break;
case 0x1:
- vex.length = 256;
+ ins->vex.length = 256;
break;
case 0x2:
- vex.length = 512;
+ ins->vex.length = 512;
break;
default:
return &bad_opcode;
if (dp->name != NULL)
return dp;
else
- return get_valid_dis386 (dp, info);
+ return get_valid_dis386 (dp, ins);
}
static void
-get_sib (disassemble_info *info, int sizeflag)
+get_sib (instr_info *ins, int sizeflag)
{
/* If modrm.mod == 3, operand must be register. */
- if (need_modrm
- && ((sizeflag & AFLAG) || address_mode == mode_64bit)
- && modrm.mod != 3
- && modrm.rm == 4)
+ if (ins->need_modrm
+ && ((sizeflag & AFLAG) || ins->address_mode == mode_64bit)
+ && ins->modrm.mod != 3
+ && ins->modrm.rm == 4)
{
- FETCH_DATA (info, codep + 2);
- sib.index = (codep [1] >> 3) & 7;
- sib.scale = (codep [1] >> 6) & 3;
- sib.base = codep [1] & 7;
+ FETCH_DATA (ins->info, ins->codep + 2);
+ ins->sib.index = (ins->codep[1] >> 3) & 7;
+ ins->sib.scale = (ins->codep[1] >> 6) & 3;
+ ins->sib.base = ins->codep[1] & 7;
+ ins->has_sib = true;
}
+ else
+ ins->has_sib = false;
+}
+
+/* Like oappend (below), but S is a string starting with '%'.
+ In Intel syntax, the '%' is elided. */
+static void
+oappend_maybe_intel (instr_info *ins, const char *s)
+{
+ oappend (ins, s + ins->intel_syntax);
}
static int
-print_insn (bfd_vma pc, disassemble_info *info)
+print_insn (bfd_vma pc, instr_info *ins)
{
const struct dis386 *dp;
int i;
struct dis_private priv;
int prefix_length;
+ ins->isa64 = 0;
+ ins->intel_mnemonic = !SYSV386_COMPAT;
+ ins->op_is_jump = false;
priv.orig_sizeflag = AFLAG | DFLAG;
- if ((info->mach & bfd_mach_i386_i386) != 0)
- address_mode = mode_32bit;
- else if (info->mach == bfd_mach_i386_i8086)
+ if ((ins->info->mach & bfd_mach_i386_i386) != 0)
+ ins->address_mode = mode_32bit;
+ else if (ins->info->mach == bfd_mach_i386_i8086)
{
- address_mode = mode_16bit;
+ ins->address_mode = mode_16bit;
priv.orig_sizeflag = 0;
}
else
- address_mode = mode_64bit;
+ ins->address_mode = mode_64bit;
- if (intel_syntax == (char) -1)
- intel_syntax = (info->mach & bfd_mach_i386_intel_syntax) != 0;
+ if (ins->intel_syntax == (char) -1)
+ ins->intel_syntax = (ins->info->mach & bfd_mach_i386_intel_syntax) != 0;
- for (p = info->disassembler_options; p != NULL; )
+ for (p = ins->info->disassembler_options; p != NULL;)
{
- if (CONST_STRNEQ (p, "amd64"))
- isa64 = amd64;
- else if (CONST_STRNEQ (p, "intel64"))
- isa64 = intel64;
- else if (CONST_STRNEQ (p, "x86-64"))
+ if (startswith (p, "amd64"))
+ ins->isa64 = amd64;
+ else if (startswith (p, "intel64"))
+ ins->isa64 = intel64;
+ else if (startswith (p, "x86-64"))
{
- address_mode = mode_64bit;
+ ins->address_mode = mode_64bit;
priv.orig_sizeflag |= AFLAG | DFLAG;
}
- else if (CONST_STRNEQ (p, "i386"))
+ else if (startswith (p, "i386"))
{
- address_mode = mode_32bit;
+ ins->address_mode = mode_32bit;
priv.orig_sizeflag |= AFLAG | DFLAG;
}
- else if (CONST_STRNEQ (p, "i8086"))
+ else if (startswith (p, "i8086"))
{
- address_mode = mode_16bit;
+ ins->address_mode = mode_16bit;
priv.orig_sizeflag &= ~(AFLAG | DFLAG);
}
- else if (CONST_STRNEQ (p, "intel"))
+ else if (startswith (p, "intel"))
{
- intel_syntax = 1;
- if (CONST_STRNEQ (p + 5, "-mnemonic"))
- intel_mnemonic = 1;
+ ins->intel_syntax = 1;
+ if (startswith (p + 5, "-mnemonic"))
+ ins->intel_mnemonic = true;
}
- else if (CONST_STRNEQ (p, "att"))
+ else if (startswith (p, "att"))
{
- intel_syntax = 0;
- if (CONST_STRNEQ (p + 3, "-mnemonic"))
- intel_mnemonic = 0;
+ ins->intel_syntax = 0;
+ if (startswith (p + 3, "-mnemonic"))
+ ins->intel_mnemonic = false;
}
- else if (CONST_STRNEQ (p, "addr"))
+ else if (startswith (p, "addr"))
{
- if (address_mode == mode_64bit)
+ if (ins->address_mode == mode_64bit)
{
if (p[4] == '3' && p[5] == '2')
priv.orig_sizeflag &= ~AFLAG;
priv.orig_sizeflag |= AFLAG;
}
}
- else if (CONST_STRNEQ (p, "data"))
+ else if (startswith (p, "data"))
{
if (p[4] == '1' && p[5] == '6')
priv.orig_sizeflag &= ~DFLAG;
else if (p[4] == '3' && p[5] == '2')
priv.orig_sizeflag |= DFLAG;
}
- else if (CONST_STRNEQ (p, "suffix"))
+ else if (startswith (p, "suffix"))
priv.orig_sizeflag |= SUFFIX_ALWAYS;
p = strchr (p, ',');
p++;
}
- if (address_mode == mode_64bit && sizeof (bfd_vma) < 8)
+ if (ins->address_mode == mode_64bit && sizeof (bfd_vma) < 8)
{
- (*info->fprintf_func) (info->stream,
+ (*ins->info->fprintf_func) (ins->info->stream,
_("64-bit address is disabled"));
return -1;
}
- if (intel_syntax)
+ if (ins->intel_syntax)
{
- names64 = intel_names64;
- names32 = intel_names32;
- names16 = intel_names16;
- names8 = intel_names8;
- names8rex = intel_names8rex;
- names_seg = intel_names_seg;
- names_mm = intel_names_mm;
- names_bnd = intel_names_bnd;
- names_xmm = intel_names_xmm;
- names_ymm = intel_names_ymm;
- names_zmm = intel_names_zmm;
- index64 = intel_index64;
- index32 = intel_index32;
- names_mask = intel_names_mask;
- index16 = intel_index16;
- open_char = '[';
- close_char = ']';
- separator_char = '+';
- scale_char = '*';
+ ins->open_char = '[';
+ ins->close_char = ']';
+ ins->separator_char = '+';
+ ins->scale_char = '*';
}
else
{
- names64 = att_names64;
- names32 = att_names32;
- names16 = att_names16;
- names8 = att_names8;
- names8rex = att_names8rex;
- names_seg = att_names_seg;
- names_mm = att_names_mm;
- names_bnd = att_names_bnd;
- names_xmm = att_names_xmm;
- names_ymm = att_names_ymm;
- names_zmm = att_names_zmm;
- index64 = att_index64;
- index32 = att_index32;
- names_mask = att_names_mask;
- index16 = att_index16;
- open_char = '(';
- close_char = ')';
- separator_char = ',';
- scale_char = ',';
+ ins->open_char = '(';
+ ins->close_char = ')';
+ ins->separator_char = ',';
+ ins->scale_char = ',';
}
/* The output looks better if we put 7 bytes on a line, since that
- puts most long word instructions on a single line. Use 8 bytes
- for Intel L1OM. */
- if ((info->mach & bfd_mach_l1om) != 0)
- info->bytes_per_line = 8;
- else
- info->bytes_per_line = 7;
+ puts most long word instructions on a single line. */
+ ins->info->bytes_per_line = 7;
- info->private_data = &priv;
+ ins->info->private_data = &priv;
priv.max_fetched = priv.the_buffer;
priv.insn_start = pc;
- obuf[0] = 0;
+ ins->obuf[0] = 0;
for (i = 0; i < MAX_OPERANDS; ++i)
{
- op_out[i][0] = 0;
- op_index[i] = -1;
+ ins->op_out[i][0] = 0;
+ ins->op_index[i] = -1;
}
- the_info = info;
- start_pc = pc;
- start_codep = priv.the_buffer;
- codep = priv.the_buffer;
+ ins->start_pc = pc;
+ ins->start_codep = priv.the_buffer;
+ ins->codep = priv.the_buffer;
if (OPCODES_SIGSETJMP (priv.bailout) != 0)
{
/* Getting here means we tried for data but didn't get it. That
means we have an incomplete instruction of some sort. Just
print the first byte as a prefix or a .byte pseudo-op. */
- if (codep > priv.the_buffer)
+ if (ins->codep > priv.the_buffer)
{
- name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
+ name = prefix_name (ins, priv.the_buffer[0], priv.orig_sizeflag);
if (name != NULL)
- (*info->fprintf_func) (info->stream, "%s", name);
+ (*ins->info->fprintf_func) (ins->info->stream, "%s", name);
else
{
/* Just print the first byte as a .byte instruction. */
- (*info->fprintf_func) (info->stream, ".byte 0x%x",
+ (*ins->info->fprintf_func) (ins->info->stream, ".byte 0x%x",
(unsigned int) priv.the_buffer[0]);
}
return -1;
}
- obufp = obuf;
+ ins->obufp = ins->obuf;
sizeflag = priv.orig_sizeflag;
- if (!ckprefix () || rex_used)
+ if (!ckprefix (ins) || ins->rex_used)
{
- /* Too many prefixes or unused REX prefixes. */
+ /* Too many ins->prefixes or unused REX ins->prefixes. */
for (i = 0;
- i < (int) ARRAY_SIZE (all_prefixes) && all_prefixes[i];
+ i < (int) ARRAY_SIZE (ins->all_prefixes) && ins->all_prefixes[i];
i++)
- (*info->fprintf_func) (info->stream, "%s%s",
+ (*ins->info->fprintf_func) (ins->info->stream, "%s%s",
i == 0 ? "" : " ",
- prefix_name (all_prefixes[i], sizeflag));
+ prefix_name (ins, ins->all_prefixes[i],
+ sizeflag));
return i;
}
- insn_codep = codep;
+ ins->insn_codep = ins->codep;
- FETCH_DATA (info, codep + 1);
- two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
+ FETCH_DATA (ins->info, ins->codep + 1);
+ ins->two_source_ops = (*ins->codep == 0x62) || (*ins->codep == 0xc8);
- if (((prefixes & PREFIX_FWAIT)
- && ((*codep < 0xd8) || (*codep > 0xdf))))
+ if (((ins->prefixes & PREFIX_FWAIT)
+ && ((*ins->codep < 0xd8) || (*ins->codep > 0xdf))))
{
- /* Handle prefixes before fwait. */
- for (i = 0; i < fwait_prefix && all_prefixes[i];
+ /* Handle ins->prefixes before fwait. */
+ for (i = 0; i < ins->fwait_prefix && ins->all_prefixes[i];
i++)
- (*info->fprintf_func) (info->stream, "%s ",
- prefix_name (all_prefixes[i], sizeflag));
- (*info->fprintf_func) (info->stream, "fwait");
+ (*ins->info->fprintf_func) (ins->info->stream, "%s ",
+ prefix_name (ins, ins->all_prefixes[i],
+ sizeflag));
+ (*ins->info->fprintf_func) (ins->info->stream, "fwait");
return i + 1;
}
- if (*codep == 0x0f)
+ if (*ins->codep == 0x0f)
{
unsigned char threebyte;
- codep++;
- FETCH_DATA (info, codep + 1);
- threebyte = *codep;
+ ins->codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ threebyte = *ins->codep;
dp = &dis386_twobyte[threebyte];
- need_modrm = twobyte_has_modrm[*codep];
- codep++;
+ ins->need_modrm = twobyte_has_modrm[threebyte];
+ ins->codep++;
}
else
{
- dp = &dis386[*codep];
- need_modrm = onebyte_has_modrm[*codep];
- codep++;
+ dp = &dis386[*ins->codep];
+ ins->need_modrm = onebyte_has_modrm[*ins->codep];
+ ins->codep++;
}
- /* Save sizeflag for printing the extra prefixes later before updating
+ /* Save sizeflag for printing the extra ins->prefixes later before updating
it for mnemonic and operand processing. The prefix names depend
only on the address mode. */
orig_sizeflag = sizeflag;
- if (prefixes & PREFIX_ADDR)
+ if (ins->prefixes & PREFIX_ADDR)
sizeflag ^= AFLAG;
- if ((prefixes & PREFIX_DATA))
+ if ((ins->prefixes & PREFIX_DATA))
sizeflag ^= DFLAG;
- end_codep = codep;
- if (need_modrm)
+ ins->end_codep = ins->codep;
+ if (ins->need_modrm)
{
- FETCH_DATA (info, codep + 1);
- modrm.mod = (*codep >> 6) & 3;
- modrm.reg = (*codep >> 3) & 7;
- modrm.rm = *codep & 7;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ ins->modrm.mod = (*ins->codep >> 6) & 3;
+ ins->modrm.reg = (*ins->codep >> 3) & 7;
+ ins->modrm.rm = *ins->codep & 7;
}
+ else
+ memset (&ins->modrm, 0, sizeof (ins->modrm));
- need_vex = 0;
- need_vex_reg = 0;
- vex_w_done = 0;
- memset (&vex, 0, sizeof (vex));
+ ins->need_vex = false;
+ memset (&ins->vex, 0, sizeof (ins->vex));
if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
{
- get_sib (info, sizeflag);
- dofloat (sizeflag);
+ get_sib (ins, sizeflag);
+ dofloat (ins, sizeflag);
}
else
{
- dp = get_valid_dis386 (dp, info);
- if (dp != NULL && putop (dp->name, sizeflag) == 0)
+ dp = get_valid_dis386 (dp, ins);
+ if (dp != NULL && putop (ins, dp->name, sizeflag) == 0)
{
- get_sib (info, sizeflag);
+ get_sib (ins, sizeflag);
for (i = 0; i < MAX_OPERANDS; ++i)
{
- obufp = op_out[i];
- op_ad = MAX_OPERANDS - 1 - i;
+ ins->obufp = ins->op_out[i];
+ ins->op_ad = MAX_OPERANDS - 1 - i;
if (dp->op[i].rtn)
- (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
+ (*dp->op[i].rtn) (ins, dp->op[i].bytemode, sizeflag);
/* For EVEX instruction after the last operand masking
should be printed. */
- if (i == 0 && vex.evex)
+ if (i == 0 && ins->vex.evex)
{
/* Don't print {%k0}. */
- if (vex.mask_register_specifier)
+ if (ins->vex.mask_register_specifier)
{
- oappend ("{");
- oappend (names_mask[vex.mask_register_specifier]);
- oappend ("}");
+ oappend (ins, "{");
+ oappend_maybe_intel (ins,
+ att_names_mask
+ [ins->vex.mask_register_specifier]);
+ oappend (ins, "}");
}
- if (vex.zeroing)
- oappend ("{z}");
+ if (ins->vex.zeroing)
+ oappend (ins, "{z}");
+
+ /* S/G insns require a mask and don't allow
+ zeroing-masking. */
+ if ((dp->op[0].bytemode == vex_vsib_d_w_dq_mode
+ || dp->op[0].bytemode == vex_vsib_q_w_dq_mode)
+ && (ins->vex.mask_register_specifier == 0
+ || ins->vex.zeroing))
+ oappend (ins, "/(bad)");
+ }
+ }
+
+ /* Check whether rounding control was enabled for an insn not
+ supporting it. */
+ if (ins->modrm.mod == 3 && ins->vex.b
+ && !(ins->evex_used & EVEX_b_used))
+ {
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ {
+ ins->obufp = ins->op_out[i];
+ if (*ins->obufp)
+ continue;
+ oappend (ins, names_rounding[ins->vex.ll]);
+ oappend (ins, "bad}");
+ break;
}
}
}
}
/* Clear instruction information. */
- if (the_info)
- {
- the_info->insn_info_valid = 0;
- the_info->branch_delay_insns = 0;
- the_info->data_size = 0;
- the_info->insn_type = dis_noninsn;
- the_info->target = 0;
- the_info->target2 = 0;
- }
+ ins->info->insn_info_valid = 0;
+ ins->info->branch_delay_insns = 0;
+ ins->info->data_size = 0;
+ ins->info->insn_type = dis_noninsn;
+ ins->info->target = 0;
+ ins->info->target2 = 0;
/* Reset jump operation indicator. */
- op_is_jump = FALSE;
-
+ ins->op_is_jump = false;
{
int jump_detection = 0;
/* Determine if this is a jump or branch. */
if ((jump_detection & 0x3) == 0x3)
{
- op_is_jump = TRUE;
+ ins->op_is_jump = true;
if (jump_detection & 0x4)
- the_info->insn_type = dis_condbranch;
+ ins->info->insn_type = dis_condbranch;
else
- the_info->insn_type =
- (dp->name && !strncmp(dp->name, "call", 4))
+ ins->info->insn_type = (dp->name && !strncmp (dp->name, "call", 4))
? dis_jsr : dis_branch;
}
}
/* If VEX.vvvv and EVEX.vvvv are unused, they must be all 1s, which
are all 0s in inverted form. */
- if (need_vex && vex.register_specifier != 0)
+ if (ins->need_vex && ins->vex.register_specifier != 0)
+ {
+ (*ins->info->fprintf_func) (ins->info->stream, "(bad)");
+ return ins->end_codep - priv.the_buffer;
+ }
+
+ /* If EVEX.z is set, there must be an actual mask register in use. */
+ if (ins->vex.zeroing && ins->vex.mask_register_specifier == 0)
{
- (*info->fprintf_func) (info->stream, "(bad)");
- return end_codep - priv.the_buffer;
+ (*ins->info->fprintf_func) (ins->info->stream, "(bad)");
+ return ins->end_codep - priv.the_buffer;
+ }
+
+ switch (dp->prefix_requirement)
+ {
+ case PREFIX_DATA:
+ /* If only the data prefix is marked as mandatory, its absence renders
+ the encoding invalid. Most other PREFIX_OPCODE rules still apply. */
+ if (ins->need_vex ? !ins->vex.prefix : !(ins->prefixes & PREFIX_DATA))
+ {
+ (*ins->info->fprintf_func) (ins->info->stream, "(bad)");
+ return ins->end_codep - priv.the_buffer;
+ }
+ ins->used_prefixes |= PREFIX_DATA;
+ /* Fall through. */
+ case PREFIX_OPCODE:
+ /* If the mandatory PREFIX_REPZ/PREFIX_REPNZ/PREFIX_DATA prefix is
+ unused, opcode is invalid. Since the PREFIX_DATA prefix may be
+ used by putop and MMX/SSE operand and may be overridden by the
+ PREFIX_REPZ/PREFIX_REPNZ fix, we check the PREFIX_DATA prefix
+ separately. */
+ if (((ins->need_vex
+ ? ins->vex.prefix == REPE_PREFIX_OPCODE
+ || ins->vex.prefix == REPNE_PREFIX_OPCODE
+ : (ins->prefixes
+ & (PREFIX_REPZ | PREFIX_REPNZ)) != 0)
+ && (ins->used_prefixes
+ & (PREFIX_REPZ | PREFIX_REPNZ)) == 0)
+ || (((ins->need_vex
+ ? ins->vex.prefix == DATA_PREFIX_OPCODE
+ : ((ins->prefixes
+ & (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA))
+ == PREFIX_DATA))
+ && (ins->used_prefixes & PREFIX_DATA) == 0))
+ || (ins->vex.evex && dp->prefix_requirement != PREFIX_DATA
+ && !ins->vex.w != !(ins->used_prefixes & PREFIX_DATA)))
+ {
+ (*ins->info->fprintf_func) (ins->info->stream, "(bad)");
+ return ins->end_codep - priv.the_buffer;
+ }
+ break;
+
+ case PREFIX_IGNORED:
+ /* Zap data size and rep prefixes from used_prefixes and reinstate their
+ origins in all_prefixes. */
+ ins->used_prefixes &= ~PREFIX_OPCODE;
+ if (ins->last_data_prefix >= 0)
+ ins->all_prefixes[ins->last_data_prefix] = 0x66;
+ if (ins->last_repz_prefix >= 0)
+ ins->all_prefixes[ins->last_repz_prefix] = 0xf3;
+ if (ins->last_repnz_prefix >= 0)
+ ins->all_prefixes[ins->last_repnz_prefix] = 0xf2;
+ break;
}
/* Check if the REX prefix is used. */
- if ((rex ^ rex_used) == 0 && !need_vex && last_rex_prefix >= 0)
- all_prefixes[last_rex_prefix] = 0;
+ if ((ins->rex ^ ins->rex_used) == 0
+ && !ins->need_vex && ins->last_rex_prefix >= 0)
+ ins->all_prefixes[ins->last_rex_prefix] = 0;
/* Check if the SEG prefix is used. */
- if ((prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES
+ if ((ins->prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES
| PREFIX_FS | PREFIX_GS)) != 0
- && (used_prefixes & active_seg_prefix) != 0)
- all_prefixes[last_seg_prefix] = 0;
+ && (ins->used_prefixes & ins->active_seg_prefix) != 0)
+ ins->all_prefixes[ins->last_seg_prefix] = 0;
/* Check if the ADDR prefix is used. */
- if ((prefixes & PREFIX_ADDR) != 0
- && (used_prefixes & PREFIX_ADDR) != 0)
- all_prefixes[last_addr_prefix] = 0;
+ if ((ins->prefixes & PREFIX_ADDR) != 0
+ && (ins->used_prefixes & PREFIX_ADDR) != 0)
+ ins->all_prefixes[ins->last_addr_prefix] = 0;
/* Check if the DATA prefix is used. */
- if ((prefixes & PREFIX_DATA) != 0
- && (used_prefixes & PREFIX_DATA) != 0
- && !need_vex)
- all_prefixes[last_data_prefix] = 0;
+ if ((ins->prefixes & PREFIX_DATA) != 0
+ && (ins->used_prefixes & PREFIX_DATA) != 0
+ && !ins->need_vex)
+ ins->all_prefixes[ins->last_data_prefix] = 0;
- /* Print the extra prefixes. */
+ /* Print the extra ins->prefixes. */
prefix_length = 0;
- for (i = 0; i < (int) ARRAY_SIZE (all_prefixes); i++)
- if (all_prefixes[i])
+ for (i = 0; i < (int) ARRAY_SIZE (ins->all_prefixes); i++)
+ if (ins->all_prefixes[i])
{
const char *name;
- name = prefix_name (all_prefixes[i], orig_sizeflag);
+ name = prefix_name (ins, ins->all_prefixes[i], orig_sizeflag);
if (name == NULL)
abort ();
prefix_length += strlen (name) + 1;
- (*info->fprintf_func) (info->stream, "%s ", name);
+ (*ins->info->fprintf_func) (ins->info->stream, "%s ", name);
}
- /* If the mandatory PREFIX_REPZ/PREFIX_REPNZ/PREFIX_DATA prefix is
- unused, opcode is invalid. Since the PREFIX_DATA prefix may be
- used by putop and MMX/SSE operand and may be overriden by the
- PREFIX_REPZ/PREFIX_REPNZ fix, we check the PREFIX_DATA prefix
- separately. */
- if (dp->prefix_requirement == PREFIX_OPCODE
- && (((need_vex
- ? vex.prefix == REPE_PREFIX_OPCODE
- || vex.prefix == REPNE_PREFIX_OPCODE
- : (prefixes
- & (PREFIX_REPZ | PREFIX_REPNZ)) != 0)
- && (used_prefixes
- & (PREFIX_REPZ | PREFIX_REPNZ)) == 0)
- || (((need_vex
- ? vex.prefix == DATA_PREFIX_OPCODE
- : ((prefixes
- & (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA))
- == PREFIX_DATA))
- && (used_prefixes & PREFIX_DATA) == 0))
- || (vex.evex && !vex.w != !(used_prefixes & PREFIX_DATA))))
- {
- (*info->fprintf_func) (info->stream, "(bad)");
- return end_codep - priv.the_buffer;
- }
-
/* Check maximum code length. */
- if ((codep - start_codep) > MAX_CODE_LENGTH)
+ if ((ins->codep - ins->start_codep) > MAX_CODE_LENGTH)
{
- (*info->fprintf_func) (info->stream, "(bad)");
+ (*ins->info->fprintf_func) (ins->info->stream, "(bad)");
return MAX_CODE_LENGTH;
}
- obufp = mnemonicendp;
- for (i = strlen (obuf) + prefix_length; i < 6; i++)
- oappend (" ");
- oappend (" ");
- (*info->fprintf_func) (info->stream, "%s", obuf);
+ ins->obufp = ins->mnemonicendp;
+ for (i = strlen (ins->obuf) + prefix_length; i < 6; i++)
+ oappend (ins, " ");
+ oappend (ins, " ");
+ (*ins->info->fprintf_func) (ins->info->stream, "%s", ins->obuf);
/* The enter and bound instructions are printed with operands in the same
order as the intel book; everything else is printed in reverse order. */
- if (intel_syntax || two_source_ops)
+ if (ins->intel_syntax || ins->two_source_ops)
{
bfd_vma riprel;
for (i = 0; i < MAX_OPERANDS; ++i)
- op_txt[i] = op_out[i];
+ op_txt[i] = ins->op_out[i];
- if (intel_syntax && dp && dp->op[2].rtn == OP_Rounding
+ if (ins->intel_syntax && dp && dp->op[2].rtn == OP_Rounding
&& dp->op[3].rtn == OP_E && dp->op[4].rtn == NULL)
{
- op_txt[2] = op_out[3];
- op_txt[3] = op_out[2];
+ op_txt[2] = ins->op_out[3];
+ op_txt[3] = ins->op_out[2];
}
for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
{
- op_ad = op_index[i];
- op_index[i] = op_index[MAX_OPERANDS - 1 - i];
- op_index[MAX_OPERANDS - 1 - i] = op_ad;
- riprel = op_riprel[i];
- op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
- op_riprel[MAX_OPERANDS - 1 - i] = riprel;
+ ins->op_ad = ins->op_index[i];
+ ins->op_index[i] = ins->op_index[MAX_OPERANDS - 1 - i];
+ ins->op_index[MAX_OPERANDS - 1 - i] = ins->op_ad;
+ riprel = ins->op_riprel[i];
+ ins->op_riprel[i] = ins->op_riprel[MAX_OPERANDS - 1 - i];
+ ins->op_riprel[MAX_OPERANDS - 1 - i] = riprel;
}
}
else
{
for (i = 0; i < MAX_OPERANDS; ++i)
- op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
+ op_txt[MAX_OPERANDS - 1 - i] = ins->op_out[i];
}
needcomma = 0;
if (*op_txt[i])
{
if (needcomma)
- (*info->fprintf_func) (info->stream, ",");
- if (op_index[i] != -1 && !op_riprel[i])
+ (*ins->info->fprintf_func) (ins->info->stream, ",");
+ if (ins->op_index[i] != -1 && !ins->op_riprel[i])
{
- bfd_vma target = (bfd_vma) op_address[op_index[i]];
+ bfd_vma target = (bfd_vma) ins->op_address[ins->op_index[i]];
- if (the_info && op_is_jump)
+ if (ins->op_is_jump)
{
- the_info->insn_info_valid = 1;
- the_info->branch_delay_insns = 0;
- the_info->data_size = 0;
- the_info->target = target;
- the_info->target2 = 0;
+ ins->info->insn_info_valid = 1;
+ ins->info->branch_delay_insns = 0;
+ ins->info->data_size = 0;
+ ins->info->target = target;
+ ins->info->target2 = 0;
}
- (*info->print_address_func) (target, info);
+ (*ins->info->print_address_func) (target, ins->info);
}
else
- (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
+ (*ins->info->fprintf_func) (ins->info->stream, "%s", op_txt[i]);
needcomma = 1;
}
for (i = 0; i < MAX_OPERANDS; i++)
- if (op_index[i] != -1 && op_riprel[i])
+ if (ins->op_index[i] != -1 && ins->op_riprel[i])
{
- (*info->fprintf_func) (info->stream, " # ");
- (*info->print_address_func) ((bfd_vma) (start_pc + (codep - start_codep)
- + op_address[op_index[i]]), info);
+ (*ins->info->fprintf_func) (ins->info->stream, " # ");
+ (*ins->info->print_address_func) ((bfd_vma)
+ (ins->start_pc + (ins->codep - ins->start_codep)
+ + ins->op_address[ins->op_index[i]]), ins->info);
break;
}
- return codep - priv.the_buffer;
+ return ins->codep - priv.the_buffer;
}
static const char *float_mem[] = {
},
};
-static char *fgrps[][8] = {
+static const char *const fgrps[][8] = {
/* Bad opcode 0 */
{
"(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
};
static void
-swap_operand (void)
+swap_operand (instr_info *ins)
{
- mnemonicendp[0] = '.';
- mnemonicendp[1] = 's';
- mnemonicendp += 2;
+ ins->mnemonicendp[0] = '.';
+ ins->mnemonicendp[1] = 's';
+ ins->mnemonicendp[2] = '\0';
+ ins->mnemonicendp += 2;
}
static void
-OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
+OP_Skip_MODRM (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
+ ins->codep++;
}
static void
-dofloat (int sizeflag)
+dofloat (instr_info *ins, int sizeflag)
{
const struct dis386 *dp;
unsigned char floatop;
- floatop = codep[-1];
+ floatop = ins->codep[-1];
- if (modrm.mod != 3)
+ if (ins->modrm.mod != 3)
{
- int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
+ int fp_indx = (floatop - 0xd8) * 8 + ins->modrm.reg;
- putop (float_mem[fp_indx], sizeflag);
- obufp = op_out[0];
- op_ad = 2;
- OP_E (float_mem_mode[fp_indx], sizeflag);
+ putop (ins, float_mem[fp_indx], sizeflag);
+ ins->obufp = ins->op_out[0];
+ ins->op_ad = 2;
+ OP_E (ins, float_mem_mode[fp_indx], sizeflag);
return;
}
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
+ ins->codep++;
- dp = &float_reg[floatop - 0xd8][modrm.reg];
+ dp = &float_reg[floatop - 0xd8][ins->modrm.reg];
if (dp->name == NULL)
{
- putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
+ putop (ins, fgrps[dp->op[0].bytemode][ins->modrm.rm], sizeflag);
/* Instruction fnstsw is only one with strange arg. */
- if (floatop == 0xdf && codep[-1] == 0xe0)
- strcpy (op_out[0], names16[0]);
+ if (floatop == 0xdf && ins->codep[-1] == 0xe0)
+ strcpy (ins->op_out[0], att_names16[0] + ins->intel_syntax);
}
else
{
- putop (dp->name, sizeflag);
+ putop (ins, dp->name, sizeflag);
- obufp = op_out[0];
- op_ad = 2;
+ ins->obufp = ins->op_out[0];
+ ins->op_ad = 2;
if (dp->op[0].rtn)
- (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
+ (*dp->op[0].rtn) (ins, dp->op[0].bytemode, sizeflag);
- obufp = op_out[1];
- op_ad = 1;
+ ins->obufp = ins->op_out[1];
+ ins->op_ad = 1;
if (dp->op[1].rtn)
- (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
+ (*dp->op[1].rtn) (ins, dp->op[1].bytemode, sizeflag);
}
}
-/* Like oappend (below), but S is a string starting with '%'.
- In Intel syntax, the '%' is elided. */
-static void
-oappend_maybe_intel (const char *s)
-{
- oappend (s + intel_syntax);
-}
-
static void
-OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_ST (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- oappend_maybe_intel ("%st");
+ oappend_maybe_intel (ins, "%st");
}
static void
-OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_STi (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- sprintf (scratchbuf, "%%st(%d)", modrm.rm);
- oappend_maybe_intel (scratchbuf);
+ sprintf (ins->scratchbuf, "%%st(%d)", ins->modrm.rm);
+ oappend_maybe_intel (ins, ins->scratchbuf);
}
/* Capital letters in template are macros. */
static int
-putop (const char *in_template, int sizeflag)
+putop (instr_info *ins, const char *in_template, int sizeflag)
{
const char *p;
int alt = 0;
int cond = 1;
- unsigned int l = 0, len = 1;
+ unsigned int l = 0, len = 0;
char last[4];
-#define SAVE_LAST(c) \
- if (l < len && l < sizeof (last)) \
- last[l++] = c; \
- else \
- abort ();
-
for (p = in_template; *p; p++)
{
+ if (len > l)
+ {
+ if (l >= sizeof (last) || !ISUPPER (*p))
+ abort ();
+ last[l++] = *p;
+ continue;
+ }
switch (*p)
{
default:
- *obufp++ = *p;
+ *ins->obufp++ = *p;
break;
case '%':
len++;
cond = 0;
break;
case '{':
- if (intel_syntax)
+ if (ins->intel_syntax)
{
while (*++p != '|')
if (*p == '}' || *p == '\0')
alt = 0;
break;
case 'A':
- if (intel_syntax)
+ if (ins->intel_syntax)
break;
- if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
- *obufp++ = 'b';
+ if ((ins->need_modrm && ins->modrm.mod != 3)
+ || (sizeflag & SUFFIX_ALWAYS))
+ *ins->obufp++ = 'b';
break;
case 'B':
- if (l == 0 && len == 1)
+ if (l == 0)
{
case_B:
- if (intel_syntax)
+ if (ins->intel_syntax)
break;
if (sizeflag & SUFFIX_ALWAYS)
- *obufp++ = 'b';
+ *ins->obufp++ = 'b';
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1
- || len != 2
- || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
- if (address_mode == mode_64bit
- && !(prefixes & PREFIX_ADDR))
+ if (ins->address_mode == mode_64bit
+ && !(ins->prefixes & PREFIX_ADDR))
{
- *obufp++ = 'a';
- *obufp++ = 'b';
- *obufp++ = 's';
+ *ins->obufp++ = 'a';
+ *ins->obufp++ = 'b';
+ *ins->obufp++ = 's';
}
goto case_B;
}
+ else
+ abort ();
break;
case 'C':
- if (intel_syntax && !alt)
+ if (ins->intel_syntax && !alt)
break;
- if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
+ if ((ins->prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
{
if (sizeflag & DFLAG)
- *obufp++ = intel_syntax ? 'd' : 'l';
+ *ins->obufp++ = ins->intel_syntax ? 'd' : 'l';
else
- *obufp++ = intel_syntax ? 'w' : 's';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = ins->intel_syntax ? 'w' : 's';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
break;
case 'D':
- if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
+ if (l == 1)
+ {
+ switch (last[0])
+ {
+ case 'X':
+ if (!ins->vex.evex || ins->vex.w)
+ *ins->obufp++ = 'd';
+ else
+ oappend (ins, "{bad}");
+ break;
+ default:
+ abort ();
+ }
+ break;
+ }
+ if (l)
+ abort ();
+ if (ins->intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
break;
USED_REX (REX_W);
- if (modrm.mod == 3)
+ if (ins->modrm.mod == 3)
{
- if (rex & REX_W)
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'q';
else
{
if (sizeflag & DFLAG)
- *obufp++ = intel_syntax ? 'd' : 'l';
+ *ins->obufp++ = ins->intel_syntax ? 'd' : 'l';
else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
}
else
- *obufp++ = 'w';
+ *ins->obufp++ = 'w';
break;
case 'E': /* For jcxz/jecxz */
- if (address_mode == mode_64bit)
+ if (ins->address_mode == mode_64bit)
{
if (sizeflag & AFLAG)
- *obufp++ = 'r';
+ *ins->obufp++ = 'r';
else
- *obufp++ = 'e';
+ *ins->obufp++ = 'e';
}
else
if (sizeflag & AFLAG)
- *obufp++ = 'e';
- used_prefixes |= (prefixes & PREFIX_ADDR);
+ *ins->obufp++ = 'e';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_ADDR);
break;
case 'F':
- if (intel_syntax)
+ if (ins->intel_syntax)
break;
- if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
+ if ((ins->prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
{
if (sizeflag & AFLAG)
- *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
+ *ins->obufp++ = ins->address_mode == mode_64bit ? 'q' : 'l';
else
- *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
- used_prefixes |= (prefixes & PREFIX_ADDR);
+ *ins->obufp++ = ins->address_mode == mode_64bit ? 'l' : 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_ADDR);
}
break;
case 'G':
- if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
+ if (ins->intel_syntax || (ins->obufp[-1] != 's'
+ && !(sizeflag & SUFFIX_ALWAYS)))
break;
- if ((rex & REX_W) || (sizeflag & DFLAG))
- *obufp++ = 'l';
+ if ((ins->rex & REX_W) || (sizeflag & DFLAG))
+ *ins->obufp++ = 'l';
else
- *obufp++ = 'w';
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ if (!(ins->rex & REX_W))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
case 'H':
- if (intel_syntax)
- break;
- if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
- || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
+ if (l == 0)
+ {
+ if (ins->intel_syntax)
+ break;
+ if ((ins->prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
+ || (ins->prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
+ {
+ ins->used_prefixes |= ins->prefixes & (PREFIX_CS | PREFIX_DS);
+ *ins->obufp++ = ',';
+ *ins->obufp++ = 'p';
+
+ /* Set active_seg_prefix even if not set in 64-bit mode
+ because here it is a valid branch hint. */
+ if (ins->prefixes & PREFIX_DS)
+ {
+ ins->active_seg_prefix = PREFIX_DS;
+ *ins->obufp++ = 't';
+ }
+ else
+ {
+ ins->active_seg_prefix = PREFIX_CS;
+ *ins->obufp++ = 'n';
+ }
+ }
+ }
+ else if (l == 1 && last[0] == 'X')
{
- used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
- *obufp++ = ',';
- *obufp++ = 'p';
- if (prefixes & PREFIX_DS)
- *obufp++ = 't';
+ if (!ins->vex.w)
+ *ins->obufp++ = 'h';
else
- *obufp++ = 'n';
+ oappend (ins, "{bad}");
}
+ else
+ abort ();
break;
case 'K':
USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'q';
else
- *obufp++ = 'd';
+ *ins->obufp++ = 'd';
break;
- case 'Z':
- if (l != 0 || len != 1)
- {
- if (l != 1 || len != 2 || last[0] != 'X')
- {
- SAVE_LAST (*p);
- break;
- }
- if (!need_vex || !vex.evex)
- abort ();
- if (intel_syntax
- || ((modrm.mod == 3 || vex.b) && !(sizeflag & SUFFIX_ALWAYS)))
- break;
- switch (vex.length)
- {
- case 128:
- *obufp++ = 'x';
- break;
- case 256:
- *obufp++ = 'y';
- break;
- case 512:
- *obufp++ = 'z';
- break;
- default:
- abort ();
- }
- break;
- }
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
- {
- *obufp++ = 'q';
- break;
- }
- /* Fall through. */
- goto case_L;
case 'L':
- if (l != 0 || len != 1)
- {
- SAVE_LAST (*p);
- break;
- }
- case_L:
- if (intel_syntax)
- break;
- if (sizeflag & SUFFIX_ALWAYS)
- *obufp++ = 'l';
- break;
+ abort ();
case 'M':
- if (intel_mnemonic != cond)
- *obufp++ = 'r';
+ if (ins->intel_mnemonic != cond)
+ *ins->obufp++ = 'r';
break;
case 'N':
- if ((prefixes & PREFIX_FWAIT) == 0)
- *obufp++ = 'n';
+ if ((ins->prefixes & PREFIX_FWAIT) == 0)
+ *ins->obufp++ = 'n';
else
- used_prefixes |= PREFIX_FWAIT;
+ ins->used_prefixes |= PREFIX_FWAIT;
break;
case 'O':
USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'o';
- else if (intel_syntax && (sizeflag & DFLAG))
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'o';
+ else if (ins->intel_syntax && (sizeflag & DFLAG))
+ *ins->obufp++ = 'q';
else
- *obufp++ = 'd';
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'd';
+ if (!(ins->rex & REX_W))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
- case '&':
- if (!intel_syntax
- && address_mode == mode_64bit
- && isa64 == intel64)
- {
- *obufp++ = 'q';
- break;
- }
- /* Fall through. */
- case 'T':
- if (!intel_syntax
- && address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
+ case '@':
+ if (ins->address_mode == mode_64bit
+ && (ins->isa64 == intel64 || (ins->rex & REX_W)
+ || !(ins->prefixes & PREFIX_DATA)))
{
- *obufp++ = 'q';
+ if (sizeflag & SUFFIX_ALWAYS)
+ *ins->obufp++ = 'q';
break;
}
/* Fall through. */
- goto case_P;
case 'P':
- if (l == 0 && len == 1)
+ if (l == 0)
{
- case_P:
- if (intel_syntax)
- {
- if ((rex & REX_W) == 0
- && (prefixes & PREFIX_DATA))
- {
- if ((sizeflag & DFLAG) == 0)
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- }
- if ((prefixes & PREFIX_DATA)
- || (rex & REX_W)
- || (sizeflag & SUFFIX_ALWAYS))
+ if ((ins->modrm.mod == 3 || !cond)
+ && !(sizeflag & SUFFIX_ALWAYS))
+ break;
+ /* Fall through. */
+ case 'T':
+ if ((!(ins->rex & REX_W) && (ins->prefixes & PREFIX_DATA))
+ || ((sizeflag & SUFFIX_ALWAYS)
+ && ins->address_mode != mode_64bit))
{
- USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'q';
- else
- {
- if (sizeflag & DFLAG)
- *obufp++ = 'l';
- else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
+ *ins->obufp++ = (sizeflag & DFLAG)
+ ? ins->intel_syntax ? 'd' : 'l' : 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
+ else if (sizeflag & SUFFIX_ALWAYS)
+ *ins->obufp++ = 'q';
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1 || len != 2 || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
- if ((prefixes & PREFIX_DATA)
- || (rex & REX_W)
+ if ((ins->prefixes & PREFIX_DATA)
+ || (ins->rex & REX_W)
|| (sizeflag & SUFFIX_ALWAYS))
{
USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'q';
else
{
if (sizeflag & DFLAG)
- *obufp++ = intel_syntax ? 'd' : 'l';
+ *ins->obufp++ = ins->intel_syntax ? 'd' : 'l';
else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
}
}
+ else
+ abort ();
break;
- case 'U':
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
- {
- if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
- *obufp++ = 'q';
- break;
- }
- /* Fall through. */
- goto case_Q;
case 'Q':
- if (l == 0 && len == 1)
+ if (l == 0)
{
- case_Q:
- if (intel_syntax && !alt)
+ if (ins->intel_syntax && !alt)
break;
USED_REX (REX_W);
- if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
+ if ((ins->need_modrm && ins->modrm.mod != 3)
+ || (sizeflag & SUFFIX_ALWAYS))
{
- if (rex & REX_W)
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'q';
else
{
if (sizeflag & DFLAG)
- *obufp++ = intel_syntax ? 'd' : 'l';
+ *ins->obufp++ = ins->intel_syntax ? 'd' : 'l';
else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
}
}
- else
+ else if (l == 1 && last[0] == 'D')
+ *ins->obufp++ = ins->vex.w ? 'q' : 'd';
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1 || len != 2 || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
- if ((intel_syntax && need_modrm)
- || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
+ if (cond ? ins->modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
+ : ins->address_mode != mode_64bit)
break;
- if ((rex & REX_W))
+ if ((ins->rex & REX_W))
{
USED_REX (REX_W);
- *obufp++ = 'q';
+ *ins->obufp++ = 'q';
}
- else if((address_mode == mode_64bit && need_modrm)
+ else if ((ins->address_mode == mode_64bit && cond)
|| (sizeflag & SUFFIX_ALWAYS))
- *obufp++ = intel_syntax? 'd' : 'l';
+ *ins->obufp++ = ins->intel_syntax? 'd' : 'l';
}
+ else
+ abort ();
break;
case 'R':
USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'q';
else if (sizeflag & DFLAG)
{
- if (intel_syntax)
- *obufp++ = 'd';
+ if (ins->intel_syntax)
+ *ins->obufp++ = 'd';
else
- *obufp++ = 'l';
+ *ins->obufp++ = 'l';
}
else
- *obufp++ = 'w';
- if (intel_syntax && !p[1]
- && ((rex & REX_W) || (sizeflag & DFLAG)))
- *obufp++ = 'e';
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ if (ins->intel_syntax && !p[1]
+ && ((ins->rex & REX_W) || (sizeflag & DFLAG)))
+ *ins->obufp++ = 'e';
+ if (!(ins->rex & REX_W))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
- case 'V':
- if (l == 0 && len == 1)
- {
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
- {
- if (sizeflag & SUFFIX_ALWAYS)
- *obufp++ = 'q';
- break;
- }
- }
- else
- {
- if (l != 1
- || len != 2
- || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
- if (rex & REX_W)
- {
- *obufp++ = 'a';
- *obufp++ = 'b';
- *obufp++ = 's';
- }
- }
- /* Fall through. */
- goto case_S;
case 'S':
- if (l == 0 && len == 1)
+ if (l == 0)
{
case_S:
- if (intel_syntax)
+ if (ins->intel_syntax)
break;
if (sizeflag & SUFFIX_ALWAYS)
{
- if (rex & REX_W)
- *obufp++ = 'q';
+ if (ins->rex & REX_W)
+ *ins->obufp++ = 'q';
else
{
if (sizeflag & DFLAG)
- *obufp++ = 'l';
+ *ins->obufp++ = 'l';
else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
}
+ break;
}
- else
+ if (l != 1)
+ abort ();
+ switch (last[0])
{
- if (l != 1
- || len != 2
- || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
- if (address_mode == mode_64bit
- && !(prefixes & PREFIX_ADDR))
+ case 'L':
+ if (ins->address_mode == mode_64bit
+ && !(ins->prefixes & PREFIX_ADDR))
{
- *obufp++ = 'a';
- *obufp++ = 'b';
- *obufp++ = 's';
+ *ins->obufp++ = 'a';
+ *ins->obufp++ = 'b';
+ *ins->obufp++ = 's';
}
goto case_S;
+ case 'X':
+ if (!ins->vex.evex || !ins->vex.w)
+ *ins->obufp++ = 's';
+ else
+ oappend (ins, "{bad}");
+ break;
+ default:
+ abort ();
}
break;
- case 'X':
- if (l != 0 || len != 1)
+ case 'V':
+ if (l == 0)
+ abort ();
+ else if (l == 1
+ && (last[0] == 'L' || last[0] == 'X'))
{
- SAVE_LAST (*p);
- break;
+ if (last[0] == 'X')
+ {
+ *ins->obufp++ = '{';
+ *ins->obufp++ = 'v';
+ *ins->obufp++ = 'e';
+ *ins->obufp++ = 'x';
+ *ins->obufp++ = '}';
+ }
+ else if (ins->rex & REX_W)
+ {
+ *ins->obufp++ = 'a';
+ *ins->obufp++ = 'b';
+ *ins->obufp++ = 's';
+ }
+ }
+ else
+ abort ();
+ goto case_S;
+ case 'W':
+ if (l == 0)
+ {
+ /* operand size flag for cwtl, cbtw */
+ USED_REX (REX_W);
+ if (ins->rex & REX_W)
+ {
+ if (ins->intel_syntax)
+ *ins->obufp++ = 'd';
+ else
+ *ins->obufp++ = 'l';
+ }
+ else if (sizeflag & DFLAG)
+ *ins->obufp++ = 'w';
+ else
+ *ins->obufp++ = 'b';
+ if (!(ins->rex & REX_W))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
- if (need_vex
- ? vex.prefix == DATA_PREFIX_OPCODE
- : prefixes & PREFIX_DATA)
+ else if (l == 1)
{
- *obufp++ = 'd';
- used_prefixes |= PREFIX_DATA;
+ if (!ins->need_vex)
+ abort ();
+ if (last[0] == 'X')
+ *ins->obufp++ = ins->vex.w ? 'd': 's';
+ else if (last[0] == 'B')
+ *ins->obufp++ = ins->vex.w ? 'w': 'b';
+ else
+ abort ();
}
else
- *obufp++ = 's';
+ abort ();
break;
- case 'Y':
- if (l == 0 && len == 1)
+ case 'X':
+ if (l != 0)
abort ();
+ if (ins->need_vex
+ ? ins->vex.prefix == DATA_PREFIX_OPCODE
+ : ins->prefixes & PREFIX_DATA)
+ {
+ *ins->obufp++ = 'd';
+ ins->used_prefixes |= PREFIX_DATA;
+ }
else
+ *ins->obufp++ = 's';
+ break;
+ case 'Y':
+ if (l == 1 && last[0] == 'X')
{
- if (l != 1 || len != 2 || last[0] != 'X')
+ if (!ins->need_vex)
+ abort ();
+ if (ins->intel_syntax
+ || ((ins->modrm.mod == 3 || ins->vex.b)
+ && !(sizeflag & SUFFIX_ALWAYS)))
+ break;
+ switch (ins->vex.length)
{
- SAVE_LAST (*p);
+ case 128:
+ *ins->obufp++ = 'x';
+ break;
+ case 256:
+ *ins->obufp++ = 'y';
break;
+ case 512:
+ if (!ins->vex.evex)
+ default:
+ abort ();
}
- if (!need_vex)
+ }
+ else
+ abort ();
+ break;
+ case 'Z':
+ if (l == 0)
+ {
+ /* These insns ignore ModR/M.mod: Force it to 3 for OP_E(). */
+ ins->modrm.mod = 3;
+ if (!ins->intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ *ins->obufp++ = ins->address_mode == mode_64bit ? 'q' : 'l';
+ }
+ else if (l == 1 && last[0] == 'X')
+ {
+ if (!ins->vex.evex)
abort ();
- if (intel_syntax
- || ((modrm.mod == 3 || vex.b) && !(sizeflag & SUFFIX_ALWAYS)))
+ if (ins->intel_syntax
+ || ((ins->modrm.mod == 3 || ins->vex.b)
+ && !(sizeflag & SUFFIX_ALWAYS)))
break;
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- *obufp++ = 'x';
+ *ins->obufp++ = 'x';
break;
case 256:
- *obufp++ = 'y';
+ *ins->obufp++ = 'y';
break;
case 512:
- if (!vex.evex)
+ *ins->obufp++ = 'z';
+ break;
default:
- abort ();
- }
- }
- break;
- case 'W':
- if (l == 0 && len == 1)
- {
- /* operand size flag for cwtl, cbtw */
- USED_REX (REX_W);
- if (rex & REX_W)
- {
- if (intel_syntax)
- *obufp++ = 'd';
- else
- *obufp++ = 'l';
+ abort ();
}
- else if (sizeflag & DFLAG)
- *obufp++ = 'w';
- else
- *obufp++ = 'b';
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
}
else
- {
- if (l != 1
- || len != 2
- || (last[0] != 'X'
- && last[0] != 'L'))
- {
- SAVE_LAST (*p);
- break;
- }
- if (!need_vex)
- abort ();
- if (last[0] == 'X')
- *obufp++ = vex.w ? 'd': 's';
- else
- *obufp++ = vex.w ? 'q': 'd';
- }
+ abort ();
break;
case '^':
- if (intel_syntax)
+ if (ins->intel_syntax)
break;
- if (isa64 == intel64 && (rex & REX_W))
+ if (ins->isa64 == intel64 && (ins->rex & REX_W))
{
USED_REX (REX_W);
- *obufp++ = 'q';
+ *ins->obufp++ = 'q';
break;
}
- if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
+ if ((ins->prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
{
if (sizeflag & DFLAG)
- *obufp++ = 'l';
+ *ins->obufp++ = 'l';
else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- case '@':
- if (intel_syntax)
- break;
- if (address_mode == mode_64bit
- && (isa64 == intel64
- || ((sizeflag & DFLAG) || (rex & REX_W))))
- *obufp++ = 'q';
- else if ((prefixes & PREFIX_DATA))
- {
- if (!(sizeflag & DFLAG))
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ *ins->obufp++ = 'w';
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
break;
}
+
+ if (len == l)
+ len = l = 0;
}
- *obufp = 0;
- mnemonicendp = obufp;
+ *ins->obufp = 0;
+ ins->mnemonicendp = ins->obufp;
return 0;
}
static void
-oappend (const char *s)
+oappend (instr_info *ins, const char *s)
{
- obufp = stpcpy (obufp, s);
+ ins->obufp = stpcpy (ins->obufp, s);
}
static void
-append_seg (void)
+append_seg (instr_info *ins)
{
/* Only print the active segment register. */
- if (!active_seg_prefix)
+ if (!ins->active_seg_prefix)
return;
- used_prefixes |= active_seg_prefix;
- switch (active_seg_prefix)
+ ins->used_prefixes |= ins->active_seg_prefix;
+ switch (ins->active_seg_prefix)
{
case PREFIX_CS:
- oappend_maybe_intel ("%cs:");
+ oappend_maybe_intel (ins, "%cs:");
break;
case PREFIX_DS:
- oappend_maybe_intel ("%ds:");
+ oappend_maybe_intel (ins, "%ds:");
break;
case PREFIX_SS:
- oappend_maybe_intel ("%ss:");
+ oappend_maybe_intel (ins, "%ss:");
break;
case PREFIX_ES:
- oappend_maybe_intel ("%es:");
+ oappend_maybe_intel (ins, "%es:");
break;
case PREFIX_FS:
- oappend_maybe_intel ("%fs:");
+ oappend_maybe_intel (ins, "%fs:");
break;
case PREFIX_GS:
- oappend_maybe_intel ("%gs:");
+ oappend_maybe_intel (ins, "%gs:");
break;
default:
break;
}
static void
-OP_indirE (int bytemode, int sizeflag)
+OP_indirE (instr_info *ins, int bytemode, int sizeflag)
{
- if (!intel_syntax)
- oappend ("*");
- OP_E (bytemode, sizeflag);
+ if (!ins->intel_syntax)
+ oappend (ins, "*");
+ OP_E (ins, bytemode, sizeflag);
}
static void
-print_operand_value (char *buf, int hex, bfd_vma disp)
+print_operand_value (instr_info *ins, char *buf, int hex, bfd_vma disp)
{
- if (address_mode == mode_64bit)
+ if (ins->address_mode == mode_64bit)
{
if (hex)
{
/* Put DISP in BUF as signed hex number. */
static void
-print_displacement (char *buf, bfd_vma disp)
+print_displacement (instr_info *ins, char *buf, bfd_vma disp)
{
bfd_signed_vma val = disp;
char tmp[30];
/* Check for possible overflow. */
if (val < 0)
{
- switch (address_mode)
+ switch (ins->address_mode)
{
case mode_64bit:
strcpy (buf + j, "0x8000000000000000");
}
static void
-intel_operand_size (int bytemode, int sizeflag)
+intel_operand_size (instr_info *ins, int bytemode, int sizeflag)
{
- if (vex.evex
- && vex.b
- && (bytemode == x_mode
- || bytemode == evex_half_bcst_xmmq_mode))
+ if (ins->vex.b)
{
- if (vex.w)
- oappend ("QWORD PTR ");
- else
- oappend ("DWORD PTR ");
+ if (!ins->vex.no_broadcast)
+ switch (bytemode)
+ {
+ case x_mode:
+ case evex_half_bcst_xmmq_mode:
+ if (ins->vex.w)
+ oappend (ins, "QWORD PTR ");
+ else
+ oappend (ins, "DWORD PTR ");
+ break;
+ case xh_mode:
+ case evex_half_bcst_xmmqh_mode:
+ case evex_half_bcst_xmmqdh_mode:
+ oappend (ins, "WORD PTR ");
+ break;
+ default:
+ ins->vex.no_broadcast = true;
+ break;
+ }
return;
}
switch (bytemode)
{
case b_mode:
case b_swap_mode:
- case dqb_mode:
case db_mode:
- oappend ("BYTE PTR ");
+ oappend (ins, "BYTE PTR ");
break;
case w_mode:
+ case w_swap_mode:
case dw_mode:
- case dqw_mode:
- oappend ("WORD PTR ");
+ oappend (ins, "WORD PTR ");
break;
case indir_v_mode:
- if (address_mode == mode_64bit && isa64 == intel64)
+ if (ins->address_mode == mode_64bit && ins->isa64 == intel64)
{
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
}
/* Fall through. */
case stack_v_mode:
- if (address_mode == mode_64bit && ((sizeflag & DFLAG) || (rex & REX_W)))
+ if (ins->address_mode == mode_64bit && ((sizeflag & DFLAG)
+ || (ins->rex & REX_W)))
{
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
}
/* Fall through. */
case v_swap_mode:
case dq_mode:
USED_REX (REX_W);
- if (rex & REX_W)
- oappend ("QWORD PTR ");
+ if (ins->rex & REX_W)
+ oappend (ins, "QWORD PTR ");
+ else if (bytemode == dq_mode)
+ oappend (ins, "DWORD PTR ");
else
{
- if ((sizeflag & DFLAG) || bytemode == dq_mode)
- oappend ("DWORD PTR ");
+ if (sizeflag & DFLAG)
+ oappend (ins, "DWORD PTR ");
else
- oappend ("WORD PTR ");
- used_prefixes |= (prefixes & PREFIX_DATA);
+ oappend (ins, "WORD PTR ");
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
break;
case z_mode:
- if ((rex & REX_W) || (sizeflag & DFLAG))
- *obufp++ = 'D';
- oappend ("WORD PTR ");
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ if ((ins->rex & REX_W) || (sizeflag & DFLAG))
+ *ins->obufp++ = 'D';
+ oappend (ins, "WORD PTR ");
+ if (!(ins->rex & REX_W))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
case a_mode:
if (sizeflag & DFLAG)
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
else
- oappend ("DWORD PTR ");
- used_prefixes |= (prefixes & PREFIX_DATA);
+ oappend (ins, "DWORD PTR ");
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
case movsxd_mode:
- if (!(sizeflag & DFLAG) && isa64 == intel64)
- oappend ("WORD PTR ");
+ if (!(sizeflag & DFLAG) && ins->isa64 == intel64)
+ oappend (ins, "WORD PTR ");
else
- oappend ("DWORD PTR ");
- used_prefixes |= (prefixes & PREFIX_DATA);
+ oappend (ins, "DWORD PTR ");
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
case d_mode:
- case d_scalar_swap_mode:
case d_swap_mode:
- case dqd_mode:
- oappend ("DWORD PTR ");
+ oappend (ins, "DWORD PTR ");
break;
case q_mode:
- case q_scalar_swap_mode:
case q_swap_mode:
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
case m_mode:
- if (address_mode == mode_64bit)
- oappend ("QWORD PTR ");
+ if (ins->address_mode == mode_64bit)
+ oappend (ins, "QWORD PTR ");
else
- oappend ("DWORD PTR ");
+ oappend (ins, "DWORD PTR ");
break;
case f_mode:
if (sizeflag & DFLAG)
- oappend ("FWORD PTR ");
+ oappend (ins, "FWORD PTR ");
else
- oappend ("DWORD PTR ");
- used_prefixes |= (prefixes & PREFIX_DATA);
+ oappend (ins, "DWORD PTR ");
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
case t_mode:
- oappend ("TBYTE PTR ");
+ oappend (ins, "TBYTE PTR ");
break;
case x_mode:
+ case xh_mode:
case x_swap_mode:
case evex_x_gscat_mode:
case evex_x_nobcst_mode:
- case b_scalar_mode:
- case w_scalar_mode:
- if (need_vex)
+ case bw_unit_mode:
+ if (ins->need_vex)
{
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- oappend ("XMMWORD PTR ");
+ oappend (ins, "XMMWORD PTR ");
break;
case 256:
- oappend ("YMMWORD PTR ");
+ oappend (ins, "YMMWORD PTR ");
break;
case 512:
- oappend ("ZMMWORD PTR ");
+ oappend (ins, "ZMMWORD PTR ");
break;
default:
abort ();
}
}
else
- oappend ("XMMWORD PTR ");
+ oappend (ins, "XMMWORD PTR ");
break;
case xmm_mode:
- oappend ("XMMWORD PTR ");
+ oappend (ins, "XMMWORD PTR ");
break;
case ymm_mode:
- oappend ("YMMWORD PTR ");
+ oappend (ins, "YMMWORD PTR ");
break;
case xmmq_mode:
+ case evex_half_bcst_xmmqh_mode:
case evex_half_bcst_xmmq_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- oappend ("QWORD PTR ");
- break;
- case 256:
- oappend ("XMMWORD PTR ");
- break;
- case 512:
- oappend ("YMMWORD PTR ");
- break;
- default:
- abort ();
- }
- break;
- case xmm_mb_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
- case 512:
- oappend ("BYTE PTR ");
- break;
- default:
- abort ();
- }
- break;
- case xmm_mw_mode:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- case 256:
- case 512:
- oappend ("WORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
- default:
- abort ();
- }
- break;
- case xmm_md_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
case 256:
- case 512:
- oappend ("DWORD PTR ");
+ oappend (ins, "XMMWORD PTR ");
break;
- default:
- abort ();
- }
- break;
- case xmm_mq_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
case 512:
- oappend ("QWORD PTR ");
+ oappend (ins, "YMMWORD PTR ");
break;
default:
abort ();
}
break;
case xmmdw_mode:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- oappend ("WORD PTR ");
+ oappend (ins, "WORD PTR ");
break;
case 256:
- oappend ("DWORD PTR ");
+ oappend (ins, "DWORD PTR ");
break;
case 512:
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
default:
abort ();
}
break;
case xmmqd_mode:
- if (!need_vex)
+ case evex_half_bcst_xmmqdh_mode:
+ if (!ins->need_vex)
abort ();
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- oappend ("DWORD PTR ");
+ oappend (ins, "DWORD PTR ");
break;
case 256:
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
case 512:
- oappend ("XMMWORD PTR ");
+ oappend (ins, "XMMWORD PTR ");
break;
default:
abort ();
}
break;
case ymmq_mode:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- oappend ("QWORD PTR ");
+ oappend (ins, "QWORD PTR ");
break;
case 256:
- oappend ("YMMWORD PTR ");
+ oappend (ins, "YMMWORD PTR ");
break;
case 512:
- oappend ("ZMMWORD PTR ");
- break;
- default:
- abort ();
- }
- break;
- case ymmxmm_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
- oappend ("XMMWORD PTR ");
+ oappend (ins, "ZMMWORD PTR ");
break;
default:
abort ();
}
break;
case o_mode:
- oappend ("OWORD PTR ");
- break;
- case vex_scalar_w_dq_mode:
- if (!need_vex)
- abort ();
-
- if (vex.w)
- oappend ("QWORD PTR ");
- else
- oappend ("DWORD PTR ");
+ oappend (ins, "OWORD PTR ");
break;
case vex_vsib_d_w_dq_mode:
case vex_vsib_q_w_dq_mode:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
-
- if (!vex.evex)
- {
- if (vex.w)
- oappend ("QWORD PTR ");
- else
- oappend ("DWORD PTR ");
- }
+ if (ins->vex.w)
+ oappend (ins, "QWORD PTR ");
else
- {
- switch (vex.length)
- {
- case 128:
- oappend ("XMMWORD PTR ");
- break;
- case 256:
- oappend ("YMMWORD PTR ");
- break;
- case 512:
- oappend ("ZMMWORD PTR ");
- break;
- default:
- abort ();
- }
- }
- break;
- case vex_vsib_q_w_d_mode:
- case vex_vsib_d_w_d_mode:
- if (!need_vex || !vex.evex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- oappend ("QWORD PTR ");
- break;
- case 256:
- oappend ("XMMWORD PTR ");
- break;
- case 512:
- oappend ("YMMWORD PTR ");
- break;
- default:
- abort ();
- }
-
+ oappend (ins, "DWORD PTR ");
break;
case mask_bd_mode:
- if (!need_vex || vex.length != 128)
+ if (!ins->need_vex || ins->vex.length != 128)
abort ();
- if (vex.w)
- oappend ("DWORD PTR ");
+ if (ins->vex.w)
+ oappend (ins, "DWORD PTR ");
else
- oappend ("BYTE PTR ");
+ oappend (ins, "BYTE PTR ");
break;
case mask_mode:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- if (vex.w)
- oappend ("QWORD PTR ");
+ if (ins->vex.w)
+ oappend (ins, "QWORD PTR ");
else
- oappend ("WORD PTR ");
+ oappend (ins, "WORD PTR ");
break;
case v_bnd_mode:
case v_bndmk_mode:
}
static void
-OP_E_register (int bytemode, int sizeflag)
+print_register (instr_info *ins, unsigned int reg, unsigned int rexmask,
+ int bytemode, int sizeflag)
{
- int reg = modrm.rm;
- const char **names;
+ const char *const *names;
- USED_REX (REX_B);
- if ((rex & REX_B))
+ USED_REX (rexmask);
+ if (ins->rex & rexmask)
reg += 8;
- if ((sizeflag & SUFFIX_ALWAYS)
- && (bytemode == b_swap_mode
- || bytemode == bnd_swap_mode
- || bytemode == v_swap_mode))
- swap_operand ();
-
switch (bytemode)
{
case b_mode:
case b_swap_mode:
- USED_REX (0);
- if (rex)
- names = names8rex;
+ if (reg & 4)
+ USED_REX (0);
+ if (ins->rex)
+ names = att_names8rex;
else
- names = names8;
+ names = att_names8;
break;
case w_mode:
- names = names16;
+ names = att_names16;
break;
case d_mode:
case dw_mode:
case db_mode:
- names = names32;
+ names = att_names32;
break;
case q_mode:
- names = names64;
+ names = att_names64;
break;
case m_mode:
case v_bnd_mode:
- names = address_mode == mode_64bit ? names64 : names32;
+ names = ins->address_mode == mode_64bit ? att_names64 : att_names32;
break;
case bnd_mode:
case bnd_swap_mode:
if (reg > 0x3)
{
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
- names = names_bnd;
+ names = att_names_bnd;
break;
case indir_v_mode:
- if (address_mode == mode_64bit && isa64 == intel64)
+ if (ins->address_mode == mode_64bit && ins->isa64 == intel64)
{
- names = names64;
+ names = att_names64;
break;
}
/* Fall through. */
case stack_v_mode:
- if (address_mode == mode_64bit && ((sizeflag & DFLAG) || (rex & REX_W)))
+ if (ins->address_mode == mode_64bit && ((sizeflag & DFLAG)
+ || (ins->rex & REX_W)))
{
- names = names64;
+ names = att_names64;
break;
}
bytemode = v_mode;
case v_mode:
case v_swap_mode:
case dq_mode:
- case dqb_mode:
- case dqd_mode:
- case dqw_mode:
USED_REX (REX_W);
- if (rex & REX_W)
- names = names64;
+ if (ins->rex & REX_W)
+ names = att_names64;
+ else if (bytemode != v_mode && bytemode != v_swap_mode)
+ names = att_names32;
else
{
- if ((sizeflag & DFLAG)
- || (bytemode != v_mode
- && bytemode != v_swap_mode))
- names = names32;
+ if (sizeflag & DFLAG)
+ names = att_names32;
else
- names = names16;
- used_prefixes |= (prefixes & PREFIX_DATA);
+ names = att_names16;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
break;
case movsxd_mode:
- if (!(sizeflag & DFLAG) && isa64 == intel64)
- names = names16;
+ if (!(sizeflag & DFLAG) && ins->isa64 == intel64)
+ names = att_names16;
else
- names = names32;
- used_prefixes |= (prefixes & PREFIX_DATA);
+ names = att_names32;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
case va_mode:
- names = (address_mode == mode_64bit
- ? names64 : names32);
- if (!(prefixes & PREFIX_ADDR))
- names = (address_mode == mode_16bit
- ? names16 : names);
+ names = (ins->address_mode == mode_64bit
+ ? att_names64 : att_names32);
+ if (!(ins->prefixes & PREFIX_ADDR))
+ names = (ins->address_mode == mode_16bit
+ ? att_names16 : names);
else
{
/* Remove "addr16/addr32". */
- all_prefixes[last_addr_prefix] = 0;
- names = (address_mode != mode_32bit
- ? names32 : names16);
- used_prefixes |= PREFIX_ADDR;
+ ins->all_prefixes[ins->last_addr_prefix] = 0;
+ names = (ins->address_mode != mode_32bit
+ ? att_names32 : att_names16);
+ ins->used_prefixes |= PREFIX_ADDR;
}
break;
case mask_bd_mode:
case mask_mode:
if (reg > 0x7)
{
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
- names = names_mask;
+ names = att_names_mask;
break;
case 0:
return;
default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
return;
}
- oappend (names[reg]);
+ oappend_maybe_intel (ins, names[reg]);
}
static void
-OP_E_memory (int bytemode, int sizeflag)
+OP_E_memory (instr_info *ins, int bytemode, int sizeflag)
{
bfd_vma disp = 0;
- int add = (rex & REX_B) ? 8 : 0;
+ int add = (ins->rex & REX_B) ? 8 : 0;
int riprel = 0;
int shift;
- if (vex.evex)
+ if (ins->vex.evex)
{
- /* In EVEX, if operand doesn't allow broadcast, vex.b should be 0. */
- if (vex.b
- && bytemode != x_mode
- && bytemode != xmmq_mode
- && bytemode != evex_half_bcst_xmmq_mode)
- {
- BadOp ();
- return;
- }
switch (bytemode)
{
- case dqw_mode:
case dw_mode:
+ case w_mode:
+ case w_swap_mode:
shift = 1;
break;
- case dqb_mode:
case db_mode:
+ case b_mode:
shift = 0;
break;
case dq_mode:
- if (address_mode != mode_64bit)
+ if (ins->address_mode != mode_64bit)
{
+ case d_mode:
+ case d_swap_mode:
shift = 2;
break;
}
/* fall through */
- case vex_scalar_w_dq_mode:
case vex_vsib_d_w_dq_mode:
- case vex_vsib_d_w_d_mode:
case vex_vsib_q_w_dq_mode:
- case vex_vsib_q_w_d_mode:
case evex_x_gscat_mode:
- shift = vex.w ? 3 : 2;
+ shift = ins->vex.w ? 3 : 2;
break;
+ case xh_mode:
+ case evex_half_bcst_xmmqh_mode:
+ case evex_half_bcst_xmmqdh_mode:
+ if (ins->vex.b)
+ {
+ shift = ins->vex.w ? 2 : 1;
+ break;
+ }
+ /* Fall through. */
case x_mode:
case evex_half_bcst_xmmq_mode:
- case xmmq_mode:
- if (vex.b)
+ if (ins->vex.b)
{
- shift = vex.w ? 3 : 2;
+ shift = ins->vex.w ? 3 : 2;
break;
}
/* Fall through. */
case xmmqd_mode:
case xmmdw_mode:
+ case xmmq_mode:
case ymmq_mode:
case evex_x_nobcst_mode:
case x_swap_mode:
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
shift = 4;
default:
abort ();
}
+ /* Make necessary corrections to shift for modes that need it. */
+ if (bytemode == xmmq_mode
+ || bytemode == evex_half_bcst_xmmqh_mode
+ || bytemode == evex_half_bcst_xmmq_mode
+ || (bytemode == ymmq_mode && ins->vex.length == 128))
+ shift -= 1;
+ else if (bytemode == xmmqd_mode
+ || bytemode == evex_half_bcst_xmmqdh_mode)
+ shift -= 2;
+ else if (bytemode == xmmdw_mode)
+ shift -= 3;
break;
case ymm_mode:
shift = 5;
case xmm_mode:
shift = 4;
break;
- case xmm_mq_mode:
case q_mode:
case q_swap_mode:
- case q_scalar_swap_mode:
shift = 3;
break;
- case dqd_mode:
- case xmm_md_mode:
- case d_mode:
- case d_swap_mode:
- case d_scalar_swap_mode:
- shift = 2;
- break;
- case w_scalar_mode:
- case xmm_mw_mode:
- shift = 1;
- break;
- case b_scalar_mode:
- case xmm_mb_mode:
- shift = 0;
+ case bw_unit_mode:
+ shift = ins->vex.w ? 1 : 0;
break;
default:
abort ();
}
- /* Make necessary corrections to shift for modes that need it.
- For these modes we currently have shift 4, 5 or 6 depending on
- vex.length (it corresponds to xmmword, ymmword or zmmword
- operand). We might want to make it 3, 4 or 5 (e.g. for
- xmmq_mode). In case of broadcast enabled the corrections
- aren't needed, as element size is always 32 or 64 bits. */
- if (!vex.b
- && (bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode))
- shift -= 1;
- else if (bytemode == xmmqd_mode)
- shift -= 2;
- else if (bytemode == xmmdw_mode)
- shift -= 3;
- else if (bytemode == ymmq_mode && vex.length == 128)
- shift -= 1;
}
else
shift = 0;
USED_REX (REX_B);
- if (intel_syntax)
- intel_operand_size (bytemode, sizeflag);
- append_seg ();
+ if (ins->intel_syntax)
+ intel_operand_size (ins, bytemode, sizeflag);
+ append_seg (ins);
- if ((sizeflag & AFLAG) || address_mode == mode_64bit)
+ if ((sizeflag & AFLAG) || ins->address_mode == mode_64bit)
{
/* 32/64 bit address mode */
int havedisp;
- int havesib;
int havebase;
- int haveindex;
int needindex;
int needaddr32;
int base, rbase;
|| bytemode == v_bndmk_mode
|| bytemode == bnd_mode
|| bytemode == bnd_swap_mode);
- const char **indexes64 = names64;
- const char **indexes32 = names32;
+ bool check_gather = false;
+ const char *const *indexes = NULL;
- havesib = 0;
havebase = 1;
- haveindex = 0;
- base = modrm.rm;
+ base = ins->modrm.rm;
if (base == 4)
{
- havesib = 1;
- vindex = sib.index;
+ vindex = ins->sib.index;
USED_REX (REX_X);
- if (rex & REX_X)
+ if (ins->rex & REX_X)
vindex += 8;
switch (bytemode)
{
case vex_vsib_d_w_dq_mode:
- case vex_vsib_d_w_d_mode:
case vex_vsib_q_w_dq_mode:
- case vex_vsib_q_w_d_mode:
- if (!need_vex)
+ if (!ins->need_vex)
abort ();
- if (vex.evex)
+ if (ins->vex.evex)
{
- if (!vex.v)
+ if (!ins->vex.v)
vindex += 16;
+ check_gather = ins->obufp == ins->op_out[1];
}
- haveindex = 1;
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- indexes64 = indexes32 = names_xmm;
+ indexes = att_names_xmm;
break;
case 256:
- if (!vex.w
- || bytemode == vex_vsib_q_w_dq_mode
- || bytemode == vex_vsib_q_w_d_mode)
- indexes64 = indexes32 = names_ymm;
+ if (!ins->vex.w
+ || bytemode == vex_vsib_q_w_dq_mode)
+ indexes = att_names_ymm;
else
- indexes64 = indexes32 = names_xmm;
+ indexes = att_names_xmm;
break;
case 512:
- if (!vex.w
- || bytemode == vex_vsib_q_w_dq_mode
- || bytemode == vex_vsib_q_w_d_mode)
- indexes64 = indexes32 = names_zmm;
+ if (!ins->vex.w
+ || bytemode == vex_vsib_q_w_dq_mode)
+ indexes = att_names_zmm;
else
- indexes64 = indexes32 = names_ymm;
+ indexes = att_names_ymm;
break;
default:
abort ();
}
break;
default:
- haveindex = vindex != 4;
+ if (vindex != 4)
+ indexes = ins->address_mode == mode_64bit && !addr32flag
+ ? att_names64 : att_names32;
break;
}
- scale = sib.scale;
- base = sib.base;
- codep++;
+ scale = ins->sib.scale;
+ base = ins->sib.base;
+ ins->codep++;
+ }
+ else
+ {
+ /* Check for mandatory SIB. */
+ if (bytemode == vex_vsib_d_w_dq_mode
+ || bytemode == vex_vsib_q_w_dq_mode
+ || bytemode == vex_sibmem_mode)
+ {
+ oappend (ins, "(bad)");
+ return;
+ }
}
rbase = base + add;
- switch (modrm.mod)
+ switch (ins->modrm.mod)
{
case 0:
if (base == 5)
{
havebase = 0;
- if (address_mode == mode_64bit && !havesib)
+ if (ins->address_mode == mode_64bit && !ins->has_sib)
riprel = 1;
- disp = get32s ();
+ disp = get32s (ins);
if (riprel && bytemode == v_bndmk_mode)
{
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
}
break;
case 1:
- FETCH_DATA (the_info, codep + 1);
- disp = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ disp = *ins->codep++;
if ((disp & 0x80) != 0)
disp -= 0x100;
- if (vex.evex && shift > 0)
+ if (ins->vex.evex && shift > 0)
disp <<= shift;
break;
case 2:
- disp = get32s ();
+ disp = get32s (ins);
break;
}
needindex = 0;
needaddr32 = 0;
- if (havesib
+ if (ins->has_sib
&& !havebase
- && !haveindex
- && address_mode != mode_16bit)
+ && !indexes
+ && ins->address_mode != mode_16bit)
{
- if (address_mode == mode_64bit)
+ if (ins->address_mode == mode_64bit)
{
- /* Display eiz instead of addr32. */
- needindex = addr32flag;
+ if (addr32flag)
+ {
+ /* Without base nor index registers, zero-extend the
+ lower 32-bit displacement to 64 bits. */
+ disp = (unsigned int) disp;
+ needindex = 1;
+ }
needaddr32 = 1;
}
else
havedisp = (havebase
|| needindex
- || (havesib && (haveindex || scale != 0)));
+ || (ins->has_sib && (indexes || scale != 0)));
- if (!intel_syntax)
- if (modrm.mod != 0 || base == 5)
+ if (!ins->intel_syntax)
+ if (ins->modrm.mod != 0 || base == 5)
{
if (havedisp || riprel)
- print_displacement (scratchbuf, disp);
+ print_displacement (ins, ins->scratchbuf, disp);
else
- print_operand_value (scratchbuf, 1, disp);
- oappend (scratchbuf);
+ print_operand_value (ins, ins->scratchbuf, 1, disp);
+ oappend (ins, ins->scratchbuf);
if (riprel)
{
- set_op (disp, 1);
- oappend (!addr32flag ? "(%rip)" : "(%eip)");
+ set_op (ins, disp, 1);
+ oappend (ins, !addr32flag ? "(%rip)" : "(%eip)");
}
}
- if ((havebase || haveindex || needindex || needaddr32 || riprel)
- && (address_mode != mode_64bit
+ if ((havebase || indexes || needindex || needaddr32 || riprel)
+ && (ins->address_mode != mode_64bit
|| ((bytemode != v_bnd_mode)
&& (bytemode != v_bndmk_mode)
&& (bytemode != bnd_mode)
&& (bytemode != bnd_swap_mode))))
- used_prefixes |= PREFIX_ADDR;
+ ins->used_prefixes |= PREFIX_ADDR;
- if (havedisp || (intel_syntax && riprel))
+ if (havedisp || (ins->intel_syntax && riprel))
{
- *obufp++ = open_char;
- if (intel_syntax && riprel)
+ *ins->obufp++ = ins->open_char;
+ if (ins->intel_syntax && riprel)
{
- set_op (disp, 1);
- oappend (!addr32flag ? "rip" : "eip");
+ set_op (ins, disp, 1);
+ oappend (ins, !addr32flag ? "rip" : "eip");
}
- *obufp = '\0';
+ *ins->obufp = '\0';
if (havebase)
- oappend (address_mode == mode_64bit && !addr32flag
- ? names64[rbase] : names32[rbase]);
- if (havesib)
+ oappend_maybe_intel (ins,
+ (ins->address_mode == mode_64bit && !addr32flag
+ ? att_names64 : att_names32)[rbase]);
+ if (ins->has_sib)
{
/* ESP/RSP won't allow index. If base isn't ESP/RSP,
print index to tell base + index from base. */
if (scale != 0
|| needindex
- || haveindex
+ || indexes
|| (havebase && base != ESP_REG_NUM))
{
- if (!intel_syntax || havebase)
+ if (!ins->intel_syntax || havebase)
+ {
+ *ins->obufp++ = ins->separator_char;
+ *ins->obufp = '\0';
+ }
+ if (indexes)
{
- *obufp++ = separator_char;
- *obufp = '\0';
+ if (ins->address_mode == mode_64bit || vindex < 16)
+ oappend_maybe_intel (ins, indexes[vindex]);
+ else
+ oappend (ins, "(bad)");
}
- if (haveindex)
- oappend (address_mode == mode_64bit && !addr32flag
- ? indexes64[vindex] : indexes32[vindex]);
else
- oappend (address_mode == mode_64bit && !addr32flag
- ? index64 : index32);
-
- *obufp++ = scale_char;
- *obufp = '\0';
- sprintf (scratchbuf, "%d", 1 << scale);
- oappend (scratchbuf);
+ oappend_maybe_intel (ins,
+ ins->address_mode == mode_64bit
+ && !addr32flag ? att_index64
+ : att_index32);
+
+ *ins->obufp++ = ins->scale_char;
+ *ins->obufp = '\0';
+ sprintf (ins->scratchbuf, "%d", 1 << scale);
+ oappend (ins, ins->scratchbuf);
}
}
- if (intel_syntax
- && (disp || modrm.mod != 0 || base == 5))
+ if (ins->intel_syntax
+ && (disp || ins->modrm.mod != 0 || base == 5))
{
if (!havedisp || (bfd_signed_vma) disp >= 0)
{
- *obufp++ = '+';
- *obufp = '\0';
+ *ins->obufp++ = '+';
+ *ins->obufp = '\0';
}
- else if (modrm.mod != 1 && disp != -disp)
+ else if (ins->modrm.mod != 1 && disp != -disp)
{
- *obufp++ = '-';
- *obufp = '\0';
+ *ins->obufp++ = '-';
+ *ins->obufp = '\0';
disp = - (bfd_signed_vma) disp;
}
if (havedisp)
- print_displacement (scratchbuf, disp);
+ print_displacement (ins, ins->scratchbuf, disp);
else
- print_operand_value (scratchbuf, 1, disp);
- oappend (scratchbuf);
+ print_operand_value (ins, ins->scratchbuf, 1, disp);
+ oappend (ins, ins->scratchbuf);
}
- *obufp++ = close_char;
- *obufp = '\0';
+ *ins->obufp++ = ins->close_char;
+ *ins->obufp = '\0';
+
+ if (check_gather)
+ {
+ /* Both XMM/YMM/ZMM registers must be distinct. */
+ int modrm_reg = ins->modrm.reg;
+
+ if (ins->rex & REX_R)
+ modrm_reg += 8;
+ if (!ins->vex.r)
+ modrm_reg += 16;
+ if (vindex == modrm_reg)
+ oappend (ins, "/(bad)");
+ }
}
- else if (intel_syntax)
+ else if (ins->intel_syntax)
{
- if (modrm.mod != 0 || base == 5)
+ if (ins->modrm.mod != 0 || base == 5)
{
- if (!active_seg_prefix)
+ if (!ins->active_seg_prefix)
{
- oappend (names_seg[ds_reg - es_reg]);
- oappend (":");
+ oappend_maybe_intel (ins, att_names_seg[ds_reg - es_reg]);
+ oappend (ins, ":");
}
- print_operand_value (scratchbuf, 1, disp);
- oappend (scratchbuf);
+ print_operand_value (ins, ins->scratchbuf, 1, disp);
+ oappend (ins, ins->scratchbuf);
}
}
}
else if (bytemode == v_bnd_mode
|| bytemode == v_bndmk_mode
|| bytemode == bnd_mode
- || bytemode == bnd_swap_mode)
+ || bytemode == bnd_swap_mode
+ || bytemode == vex_vsib_d_w_dq_mode
+ || bytemode == vex_vsib_q_w_dq_mode)
{
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
else
{
/* 16 bit address mode */
- used_prefixes |= prefixes & PREFIX_ADDR;
- switch (modrm.mod)
+ ins->used_prefixes |= ins->prefixes & PREFIX_ADDR;
+ switch (ins->modrm.mod)
{
case 0:
- if (modrm.rm == 6)
+ if (ins->modrm.rm == 6)
{
- disp = get16 ();
+ disp = get16 (ins);
if ((disp & 0x8000) != 0)
disp -= 0x10000;
}
break;
case 1:
- FETCH_DATA (the_info, codep + 1);
- disp = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ disp = *ins->codep++;
if ((disp & 0x80) != 0)
disp -= 0x100;
- if (vex.evex && shift > 0)
+ if (ins->vex.evex && shift > 0)
disp <<= shift;
break;
case 2:
- disp = get16 ();
+ disp = get16 (ins);
if ((disp & 0x8000) != 0)
disp -= 0x10000;
break;
}
- if (!intel_syntax)
- if (modrm.mod != 0 || modrm.rm == 6)
+ if (!ins->intel_syntax)
+ if (ins->modrm.mod != 0 || ins->modrm.rm == 6)
{
- print_displacement (scratchbuf, disp);
- oappend (scratchbuf);
+ print_displacement (ins, ins->scratchbuf, disp);
+ oappend (ins, ins->scratchbuf);
}
- if (modrm.mod != 0 || modrm.rm != 6)
+ if (ins->modrm.mod != 0 || ins->modrm.rm != 6)
{
- *obufp++ = open_char;
- *obufp = '\0';
- oappend (index16[modrm.rm]);
- if (intel_syntax
- && (disp || modrm.mod != 0 || modrm.rm == 6))
+ *ins->obufp++ = ins->open_char;
+ *ins->obufp = '\0';
+ oappend (ins,
+ (ins->intel_syntax ? intel_index16
+ : att_index16)[ins->modrm.rm]);
+ if (ins->intel_syntax
+ && (disp || ins->modrm.mod != 0 || ins->modrm.rm == 6))
{
if ((bfd_signed_vma) disp >= 0)
{
- *obufp++ = '+';
- *obufp = '\0';
+ *ins->obufp++ = '+';
+ *ins->obufp = '\0';
}
- else if (modrm.mod != 1)
+ else if (ins->modrm.mod != 1)
{
- *obufp++ = '-';
- *obufp = '\0';
+ *ins->obufp++ = '-';
+ *ins->obufp = '\0';
disp = - (bfd_signed_vma) disp;
}
- print_displacement (scratchbuf, disp);
- oappend (scratchbuf);
+ print_displacement (ins, ins->scratchbuf, disp);
+ oappend (ins, ins->scratchbuf);
}
- *obufp++ = close_char;
- *obufp = '\0';
+ *ins->obufp++ = ins->close_char;
+ *ins->obufp = '\0';
}
- else if (intel_syntax)
+ else if (ins->intel_syntax)
{
- if (!active_seg_prefix)
+ if (!ins->active_seg_prefix)
{
- oappend (names_seg[ds_reg - es_reg]);
- oappend (":");
+ oappend_maybe_intel (ins, att_names_seg[ds_reg - es_reg]);
+ oappend (ins, ":");
}
- print_operand_value (scratchbuf, 1, disp & 0xffff);
- oappend (scratchbuf);
+ print_operand_value (ins, ins->scratchbuf, 1, disp & 0xffff);
+ oappend (ins, ins->scratchbuf);
}
}
- if (vex.evex && vex.b
- && (bytemode == x_mode
- || bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode))
+ if (ins->vex.b)
{
- if (vex.w
- || bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode)
+ ins->evex_used |= EVEX_b_used;
+
+ /* Broadcast can only ever be valid for memory sources. */
+ if (ins->obufp == ins->op_out[0])
+ ins->vex.no_broadcast = true;
+
+ if (!ins->vex.no_broadcast)
{
- switch (vex.length)
+ if (bytemode == xh_mode)
{
- case 128:
- oappend ("{1to2}");
- break;
- case 256:
- oappend ("{1to4}");
- break;
- case 512:
- oappend ("{1to8}");
- break;
- default:
- abort ();
+ if (ins->vex.w)
+ oappend (ins, "{bad}");
+ else
+ {
+ switch (ins->vex.length)
+ {
+ case 128:
+ oappend (ins, "{1to8}");
+ break;
+ case 256:
+ oappend (ins, "{1to16}");
+ break;
+ case 512:
+ oappend (ins, "{1to32}");
+ break;
+ default:
+ abort ();
+ }
+ }
}
- }
- else
- {
- switch (vex.length)
+ else if (bytemode == q_mode
+ || bytemode == ymmq_mode)
+ ins->vex.no_broadcast = true;
+ else if (ins->vex.w
+ || bytemode == evex_half_bcst_xmmqdh_mode
+ || bytemode == evex_half_bcst_xmmq_mode)
{
- case 128:
- oappend ("{1to4}");
- break;
- case 256:
- oappend ("{1to8}");
- break;
- case 512:
- oappend ("{1to16}");
- break;
- default:
- abort ();
+ switch (ins->vex.length)
+ {
+ case 128:
+ oappend (ins, "{1to2}");
+ break;
+ case 256:
+ oappend (ins, "{1to4}");
+ break;
+ case 512:
+ oappend (ins, "{1to8}");
+ break;
+ default:
+ abort ();
+ }
+ }
+ else if (bytemode == x_mode
+ || bytemode == evex_half_bcst_xmmqh_mode)
+ {
+ switch (ins->vex.length)
+ {
+ case 128:
+ oappend (ins, "{1to4}");
+ break;
+ case 256:
+ oappend (ins, "{1to8}");
+ break;
+ case 512:
+ oappend (ins, "{1to16}");
+ break;
+ default:
+ abort ();
+ }
}
- }
- }
-}
-
-static void
-OP_E (int bytemode, int sizeflag)
-{
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- if (modrm.mod == 3)
- OP_E_register (bytemode, sizeflag);
- else
- OP_E_memory (bytemode, sizeflag);
-}
-
-static void
-OP_G (int bytemode, int sizeflag)
-{
- int add = 0;
- const char **names;
- USED_REX (REX_R);
- if (rex & REX_R)
- add += 8;
- switch (bytemode)
- {
- case b_mode:
- USED_REX (0);
- if (rex)
- oappend (names8rex[modrm.reg + add]);
- else
- oappend (names8[modrm.reg + add]);
- break;
- case w_mode:
- oappend (names16[modrm.reg + add]);
- break;
- case d_mode:
- case db_mode:
- case dw_mode:
- oappend (names32[modrm.reg + add]);
- break;
- case q_mode:
- oappend (names64[modrm.reg + add]);
- break;
- case bnd_mode:
- if (modrm.reg > 0x3)
- {
- oappend ("(bad)");
- return;
- }
- oappend (names_bnd[modrm.reg]);
- break;
- case v_mode:
- case dq_mode:
- case dqb_mode:
- case dqd_mode:
- case dqw_mode:
- case movsxd_mode:
- USED_REX (REX_W);
- if (rex & REX_W)
- oappend (names64[modrm.reg + add]);
- else
- {
- if ((sizeflag & DFLAG)
- || (bytemode != v_mode && bytemode != movsxd_mode))
- oappend (names32[modrm.reg + add]);
else
- oappend (names16[modrm.reg + add]);
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- case va_mode:
- names = (address_mode == mode_64bit
- ? names64 : names32);
- if (!(prefixes & PREFIX_ADDR))
- {
- if (address_mode == mode_16bit)
- names = names16;
- }
- else
- {
- /* Remove "addr16/addr32". */
- all_prefixes[last_addr_prefix] = 0;
- names = (address_mode != mode_32bit
- ? names32 : names16);
- used_prefixes |= PREFIX_ADDR;
- }
- oappend (names[modrm.reg + add]);
- break;
- case m_mode:
- if (address_mode == mode_64bit)
- oappend (names64[modrm.reg + add]);
- else
- oappend (names32[modrm.reg + add]);
- break;
- case mask_bd_mode:
- case mask_mode:
- if ((modrm.reg + add) > 0x7)
- {
- oappend ("(bad)");
- return;
+ ins->vex.no_broadcast = true;
}
- oappend (names_mask[modrm.reg + add]);
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
+ if (ins->vex.no_broadcast)
+ oappend (ins, "{bad}");
+ }
+}
+
+static void
+OP_E (instr_info *ins, int bytemode, int sizeflag)
+{
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ ins->codep++;
+
+ if (ins->modrm.mod == 3)
+ {
+ if ((sizeflag & SUFFIX_ALWAYS)
+ && (bytemode == b_swap_mode
+ || bytemode == bnd_swap_mode
+ || bytemode == v_swap_mode))
+ swap_operand (ins);
+
+ print_register (ins, ins->modrm.rm, REX_B, bytemode, sizeflag);
}
+ else
+ OP_E_memory (ins, bytemode, sizeflag);
+}
+
+static void
+OP_G (instr_info *ins, int bytemode, int sizeflag)
+{
+ if (ins->vex.evex && !ins->vex.r && ins->address_mode == mode_64bit)
+ {
+ oappend (ins, "(bad)");
+ return;
+ }
+
+ print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag);
}
+#ifdef BFD64
static bfd_vma
-get64 (void)
+get64 (instr_info *ins)
{
bfd_vma x;
-#ifdef BFD64
unsigned int a;
unsigned int b;
- FETCH_DATA (the_info, codep + 8);
- a = *codep++ & 0xff;
- a |= (*codep++ & 0xff) << 8;
- a |= (*codep++ & 0xff) << 16;
- a |= (*codep++ & 0xffu) << 24;
- b = *codep++ & 0xff;
- b |= (*codep++ & 0xff) << 8;
- b |= (*codep++ & 0xff) << 16;
- b |= (*codep++ & 0xffu) << 24;
+ FETCH_DATA (ins->info, ins->codep + 8);
+ a = *ins->codep++ & 0xff;
+ a |= (*ins->codep++ & 0xff) << 8;
+ a |= (*ins->codep++ & 0xff) << 16;
+ a |= (*ins->codep++ & 0xffu) << 24;
+ b = *ins->codep++ & 0xff;
+ b |= (*ins->codep++ & 0xff) << 8;
+ b |= (*ins->codep++ & 0xff) << 16;
+ b |= (*ins->codep++ & 0xffu) << 24;
x = a + ((bfd_vma) b << 32);
+ return x;
+}
#else
+static bfd_vma
+get64 (instr_info *ins ATTRIBUTE_UNUSED)
+{
abort ();
- x = 0;
-#endif
- return x;
+ return 0;
}
+#endif
static bfd_signed_vma
-get32 (void)
+get32 (instr_info *ins)
{
bfd_signed_vma x = 0;
- FETCH_DATA (the_info, codep + 4);
- x = *codep++ & (bfd_signed_vma) 0xff;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
+ FETCH_DATA (ins->info, ins->codep + 4);
+ x = *ins->codep++ & (bfd_signed_vma) 0xff;
+ x |= (*ins->codep++ & (bfd_signed_vma) 0xff) << 8;
+ x |= (*ins->codep++ & (bfd_signed_vma) 0xff) << 16;
+ x |= (*ins->codep++ & (bfd_signed_vma) 0xff) << 24;
return x;
}
static bfd_signed_vma
-get32s (void)
+get32s (instr_info *ins)
{
bfd_signed_vma x = 0;
- FETCH_DATA (the_info, codep + 4);
- x = *codep++ & (bfd_signed_vma) 0xff;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
- x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
+ FETCH_DATA (ins->info, ins->codep + 4);
+ x = *ins->codep++ & (bfd_signed_vma) 0xff;
+ x |= (*ins->codep++ & (bfd_signed_vma) 0xff) << 8;
+ x |= (*ins->codep++ & (bfd_signed_vma) 0xff) << 16;
+ x |= (*ins->codep++ & (bfd_signed_vma) 0xff) << 24;
x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
}
static int
-get16 (void)
+get16 (instr_info *ins)
{
int x = 0;
- FETCH_DATA (the_info, codep + 2);
- x = *codep++ & 0xff;
- x |= (*codep++ & 0xff) << 8;
+ FETCH_DATA (ins->info, ins->codep + 2);
+ x = *ins->codep++ & 0xff;
+ x |= (*ins->codep++ & 0xff) << 8;
return x;
}
static void
-set_op (bfd_vma op, int riprel)
+set_op (instr_info *ins, bfd_vma op, int riprel)
{
- op_index[op_ad] = op_ad;
- if (address_mode == mode_64bit)
+ ins->op_index[ins->op_ad] = ins->op_ad;
+ if (ins->address_mode == mode_64bit)
{
- op_address[op_ad] = op;
- op_riprel[op_ad] = riprel;
+ ins->op_address[ins->op_ad] = op;
+ ins->op_riprel[ins->op_ad] = riprel;
}
else
{
/* Mask to get a 32-bit address. */
- op_address[op_ad] = op & 0xffffffff;
- op_riprel[op_ad] = riprel & 0xffffffff;
+ ins->op_address[ins->op_ad] = op & 0xffffffff;
+ ins->op_riprel[ins->op_ad] = riprel & 0xffffffff;
}
}
static void
-OP_REG (int code, int sizeflag)
+OP_REG (instr_info *ins, int code, int sizeflag)
{
const char *s;
int add;
{
case es_reg: case ss_reg: case cs_reg:
case ds_reg: case fs_reg: case gs_reg:
- oappend (names_seg[code - es_reg]);
+ oappend_maybe_intel (ins, att_names_seg[code - es_reg]);
return;
}
USED_REX (REX_B);
- if (rex & REX_B)
+ if (ins->rex & REX_B)
add = 8;
else
add = 0;
{
case ax_reg: case cx_reg: case dx_reg: case bx_reg:
case sp_reg: case bp_reg: case si_reg: case di_reg:
- s = names16[code - ax_reg + add];
+ s = att_names16[code - ax_reg + add];
break;
- case al_reg: case ah_reg: case cl_reg: case ch_reg:
- case dl_reg: case dh_reg: case bl_reg: case bh_reg:
+ case ah_reg: case ch_reg: case dh_reg: case bh_reg:
USED_REX (0);
- if (rex)
- s = names8rex[code - al_reg + add];
+ /* Fall through. */
+ case al_reg: case cl_reg: case dl_reg: case bl_reg:
+ if (ins->rex)
+ s = att_names8rex[code - al_reg + add];
else
- s = names8[code - al_reg];
+ s = att_names8[code - al_reg];
break;
case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
- if (address_mode == mode_64bit
- && ((sizeflag & DFLAG) || (rex & REX_W)))
+ if (ins->address_mode == mode_64bit
+ && ((sizeflag & DFLAG) || (ins->rex & REX_W)))
{
- s = names64[code - rAX_reg + add];
+ s = att_names64[code - rAX_reg + add];
break;
}
code += eAX_reg - rAX_reg;
case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
USED_REX (REX_W);
- if (rex & REX_W)
- s = names64[code - eAX_reg + add];
+ if (ins->rex & REX_W)
+ s = att_names64[code - eAX_reg + add];
else
{
if (sizeflag & DFLAG)
- s = names32[code - eAX_reg + add];
+ s = att_names32[code - eAX_reg + add];
else
- s = names16[code - eAX_reg + add];
- used_prefixes |= (prefixes & PREFIX_DATA);
+ s = att_names16[code - eAX_reg + add];
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
break;
default:
- s = INTERNAL_DISASSEMBLER_ERROR;
- break;
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
+ return;
}
- oappend (s);
+ oappend_maybe_intel (ins, s);
}
static void
-OP_IMREG (int code, int sizeflag)
+OP_IMREG (instr_info *ins, int code, int sizeflag)
{
const char *s;
switch (code)
{
case indir_dx_reg:
- if (intel_syntax)
- s = "dx";
- else
- s = "(%dx)";
- break;
- case ax_reg: case cx_reg: case dx_reg: case bx_reg:
- case sp_reg: case bp_reg: case si_reg: case di_reg:
- s = names16[code - ax_reg];
- break;
- case es_reg: case ss_reg: case cs_reg:
- case ds_reg: case fs_reg: case gs_reg:
- s = names_seg[code - es_reg];
+ if (!ins->intel_syntax)
+ {
+ oappend (ins, "(%dx)");
+ return;
+ }
+ s = att_names16[dx_reg - ax_reg];
break;
- case al_reg: case ah_reg: case cl_reg: case ch_reg:
- case dl_reg: case dh_reg: case bl_reg: case bh_reg:
- USED_REX (0);
- if (rex)
- s = names8rex[code - al_reg];
- else
- s = names8[code - al_reg];
+ case al_reg: case cl_reg:
+ s = att_names8[code - al_reg];
break;
- case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
- case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
+ case eAX_reg:
USED_REX (REX_W);
- if (rex & REX_W)
- s = names64[code - eAX_reg];
- else
+ if (ins->rex & REX_W)
{
- if (sizeflag & DFLAG)
- s = names32[code - eAX_reg];
- else
- s = names16[code - eAX_reg];
- used_prefixes |= (prefixes & PREFIX_DATA);
+ s = *att_names64;
+ break;
}
- break;
+ /* Fall through. */
case z_mode_ax_reg:
- if ((rex & REX_W) || (sizeflag & DFLAG))
- s = *names32;
+ if ((ins->rex & REX_W) || (sizeflag & DFLAG))
+ s = *att_names32;
else
- s = *names16;
- if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ s = *att_names16;
+ if (!(ins->rex & REX_W))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
default:
- s = INTERNAL_DISASSEMBLER_ERROR;
- break;
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
+ return;
}
- oappend (s);
+ oappend_maybe_intel (ins, s);
}
static void
-OP_I (int bytemode, int sizeflag)
+OP_I (instr_info *ins, int bytemode, int sizeflag)
{
bfd_signed_vma op;
bfd_signed_vma mask = -1;
switch (bytemode)
{
case b_mode:
- FETCH_DATA (the_info, codep + 1);
- op = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ op = *ins->codep++;
mask = 0xff;
break;
case v_mode:
USED_REX (REX_W);
- if (rex & REX_W)
- op = get32s ();
+ if (ins->rex & REX_W)
+ op = get32s (ins);
else
{
if (sizeflag & DFLAG)
{
- op = get32 ();
+ op = get32 (ins);
mask = 0xffffffff;
}
else
{
- op = get16 ();
+ op = get16 (ins);
mask = 0xfffff;
}
- used_prefixes |= (prefixes & PREFIX_DATA);
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
break;
case d_mode:
mask = 0xffffffff;
- op = get32 ();
+ op = get32 (ins);
break;
case w_mode:
mask = 0xfffff;
- op = get16 ();
+ op = get16 (ins);
break;
case const_1_mode:
- if (intel_syntax)
- oappend ("1");
+ if (ins->intel_syntax)
+ oappend (ins, "1");
return;
default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
return;
}
op &= mask;
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, op);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, op);
+ oappend_maybe_intel (ins, ins->scratchbuf);
+ ins->scratchbuf[0] = '\0';
}
static void
-OP_I64 (int bytemode, int sizeflag)
+OP_I64 (instr_info *ins, int bytemode, int sizeflag)
{
- if (bytemode != v_mode || address_mode != mode_64bit || !(rex & REX_W))
+ if (bytemode != v_mode || ins->address_mode != mode_64bit
+ || !(ins->rex & REX_W))
{
- OP_I (bytemode, sizeflag);
+ OP_I (ins, bytemode, sizeflag);
return;
}
USED_REX (REX_W);
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, get64 ());
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, get64 (ins));
+ oappend_maybe_intel (ins, ins->scratchbuf);
+ ins->scratchbuf[0] = '\0';
}
static void
-OP_sI (int bytemode, int sizeflag)
+OP_sI (instr_info *ins, int bytemode, int sizeflag)
{
bfd_signed_vma op;
{
case b_mode:
case b_T_mode:
- FETCH_DATA (the_info, codep + 1);
- op = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ op = *ins->codep++;
if ((op & 0x80) != 0)
op -= 0x100;
if (bytemode == b_T_mode)
{
- if (address_mode != mode_64bit
- || !((sizeflag & DFLAG) || (rex & REX_W)))
+ if (ins->address_mode != mode_64bit
+ || !((sizeflag & DFLAG) || (ins->rex & REX_W)))
{
/* The operand-size prefix is overridden by a REX prefix. */
- if ((sizeflag & DFLAG) || (rex & REX_W))
+ if ((sizeflag & DFLAG) || (ins->rex & REX_W))
op &= 0xffffffff;
else
op &= 0xffff;
}
else
{
- if (!(rex & REX_W))
+ if (!(ins->rex & REX_W))
{
if (sizeflag & DFLAG)
op &= 0xffffffff;
break;
case v_mode:
/* The operand-size prefix is overridden by a REX prefix. */
- if ((sizeflag & DFLAG) || (rex & REX_W))
- op = get32s ();
+ if ((sizeflag & DFLAG) || (ins->rex & REX_W))
+ op = get32s (ins);
else
- op = get16 ();
+ op = get16 (ins);
break;
default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
return;
}
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, op);
- oappend_maybe_intel (scratchbuf);
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, op);
+ oappend_maybe_intel (ins, ins->scratchbuf);
}
static void
-OP_J (int bytemode, int sizeflag)
+OP_J (instr_info *ins, int bytemode, int sizeflag)
{
bfd_vma disp;
bfd_vma mask = -1;
switch (bytemode)
{
case b_mode:
- FETCH_DATA (the_info, codep + 1);
- disp = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ disp = *ins->codep++;
if ((disp & 0x80) != 0)
disp -= 0x100;
break;
case v_mode:
- if (isa64 != intel64)
case dqw_mode:
- USED_REX (REX_W);
if ((sizeflag & DFLAG)
- || (address_mode == mode_64bit
- && ((isa64 == intel64 && bytemode != dqw_mode)
- || (rex & REX_W))))
- disp = get32s ();
+ || (ins->address_mode == mode_64bit
+ && ((ins->isa64 == intel64 && bytemode != dqw_mode)
+ || (ins->rex & REX_W))))
+ disp = get32s (ins);
else
{
- disp = get16 ();
+ disp = get16 (ins);
if ((disp & 0x8000) != 0)
disp -= 0x10000;
/* In 16bit mode, address is wrapped around at 64k within
instruction means that the pc is masked to 16 bits after
the displacement is added! */
mask = 0xffff;
- if ((prefixes & PREFIX_DATA) == 0)
- segment = ((start_pc + (codep - start_codep))
+ if ((ins->prefixes & PREFIX_DATA) == 0)
+ segment = ((ins->start_pc + (ins->codep - ins->start_codep))
& ~((bfd_vma) 0xffff));
}
- if (address_mode != mode_64bit
- || (isa64 != intel64 && !(rex & REX_W)))
- used_prefixes |= (prefixes & PREFIX_DATA);
+ if (ins->address_mode != mode_64bit
+ || (ins->isa64 != intel64 && !(ins->rex & REX_W)))
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
break;
default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
return;
}
- disp = ((start_pc + (codep - start_codep) + disp) & mask) | segment;
- set_op (disp, 0);
- print_operand_value (scratchbuf, 1, disp);
- oappend (scratchbuf);
+ disp = ((ins->start_pc + (ins->codep - ins->start_codep) + disp) & mask)
+ | segment;
+ set_op (ins, disp, 0);
+ print_operand_value (ins, ins->scratchbuf, 1, disp);
+ oappend (ins, ins->scratchbuf);
}
static void
-OP_SEG (int bytemode, int sizeflag)
+OP_SEG (instr_info *ins, int bytemode, int sizeflag)
{
if (bytemode == w_mode)
- oappend (names_seg[modrm.reg]);
+ oappend_maybe_intel (ins, att_names_seg[ins->modrm.reg]);
else
- OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
+ OP_E (ins, ins->modrm.mod == 3 ? bytemode : w_mode, sizeflag);
}
static void
-OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
+OP_DIR (instr_info *ins, int dummy ATTRIBUTE_UNUSED, int sizeflag)
{
int seg, offset;
if (sizeflag & DFLAG)
{
- offset = get32 ();
- seg = get16 ();
+ offset = get32 (ins);
+ seg = get16 (ins);
}
else
{
- offset = get16 ();
- seg = get16 ();
+ offset = get16 (ins);
+ seg = get16 (ins);
}
- used_prefixes |= (prefixes & PREFIX_DATA);
- if (intel_syntax)
- sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
+ if (ins->intel_syntax)
+ sprintf (ins->scratchbuf, "0x%x:0x%x", seg, offset);
else
- sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
- oappend (scratchbuf);
+ sprintf (ins->scratchbuf, "$0x%x,$0x%x", seg, offset);
+ oappend (ins, ins->scratchbuf);
}
static void
-OP_OFF (int bytemode, int sizeflag)
+OP_OFF (instr_info *ins, int bytemode, int sizeflag)
{
bfd_vma off;
- if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
- intel_operand_size (bytemode, sizeflag);
- append_seg ();
+ if (ins->intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ intel_operand_size (ins, bytemode, sizeflag);
+ append_seg (ins);
- if ((sizeflag & AFLAG) || address_mode == mode_64bit)
- off = get32 ();
+ if ((sizeflag & AFLAG) || ins->address_mode == mode_64bit)
+ off = get32 (ins);
else
- off = get16 ();
+ off = get16 (ins);
- if (intel_syntax)
+ if (ins->intel_syntax)
{
- if (!active_seg_prefix)
+ if (!ins->active_seg_prefix)
{
- oappend (names_seg[ds_reg - es_reg]);
- oappend (":");
+ oappend_maybe_intel (ins, att_names_seg[ds_reg - es_reg]);
+ oappend (ins, ":");
}
}
- print_operand_value (scratchbuf, 1, off);
- oappend (scratchbuf);
+ print_operand_value (ins, ins->scratchbuf, 1, off);
+ oappend (ins, ins->scratchbuf);
}
static void
-OP_OFF64 (int bytemode, int sizeflag)
+OP_OFF64 (instr_info *ins, int bytemode, int sizeflag)
{
bfd_vma off;
- if (address_mode != mode_64bit
- || (prefixes & PREFIX_ADDR))
+ if (ins->address_mode != mode_64bit
+ || (ins->prefixes & PREFIX_ADDR))
{
- OP_OFF (bytemode, sizeflag);
+ OP_OFF (ins, bytemode, sizeflag);
return;
}
- if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
- intel_operand_size (bytemode, sizeflag);
- append_seg ();
+ if (ins->intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ intel_operand_size (ins, bytemode, sizeflag);
+ append_seg (ins);
- off = get64 ();
+ off = get64 (ins);
- if (intel_syntax)
+ if (ins->intel_syntax)
{
- if (!active_seg_prefix)
+ if (!ins->active_seg_prefix)
{
- oappend (names_seg[ds_reg - es_reg]);
- oappend (":");
+ oappend_maybe_intel (ins, att_names_seg[ds_reg - es_reg]);
+ oappend (ins, ":");
}
}
- print_operand_value (scratchbuf, 1, off);
- oappend (scratchbuf);
+ print_operand_value (ins, ins->scratchbuf, 1, off);
+ oappend (ins, ins->scratchbuf);
}
static void
-ptr_reg (int code, int sizeflag)
+ptr_reg (instr_info *ins, int code, int sizeflag)
{
const char *s;
- *obufp++ = open_char;
- used_prefixes |= (prefixes & PREFIX_ADDR);
- if (address_mode == mode_64bit)
+ *ins->obufp++ = ins->open_char;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_ADDR);
+ if (ins->address_mode == mode_64bit)
{
if (!(sizeflag & AFLAG))
- s = names32[code - eAX_reg];
+ s = att_names32[code - eAX_reg];
else
- s = names64[code - eAX_reg];
+ s = att_names64[code - eAX_reg];
}
else if (sizeflag & AFLAG)
- s = names32[code - eAX_reg];
+ s = att_names32[code - eAX_reg];
else
- s = names16[code - eAX_reg];
- oappend (s);
- *obufp++ = close_char;
- *obufp = 0;
+ s = att_names16[code - eAX_reg];
+ oappend_maybe_intel (ins, s);
+ *ins->obufp++ = ins->close_char;
+ *ins->obufp = 0;
}
static void
-OP_ESreg (int code, int sizeflag)
+OP_ESreg (instr_info *ins, int code, int sizeflag)
{
- if (intel_syntax)
+ if (ins->intel_syntax)
{
- switch (codep[-1])
+ switch (ins->codep[-1])
{
case 0x6d: /* insw/insl */
- intel_operand_size (z_mode, sizeflag);
+ intel_operand_size (ins, z_mode, sizeflag);
break;
case 0xa5: /* movsw/movsl/movsq */
case 0xa7: /* cmpsw/cmpsl/cmpsq */
case 0xab: /* stosw/stosl */
case 0xaf: /* scasw/scasl */
- intel_operand_size (v_mode, sizeflag);
+ intel_operand_size (ins, v_mode, sizeflag);
break;
default:
- intel_operand_size (b_mode, sizeflag);
+ intel_operand_size (ins, b_mode, sizeflag);
}
}
- oappend_maybe_intel ("%es:");
- ptr_reg (code, sizeflag);
+ oappend_maybe_intel (ins, "%es:");
+ ptr_reg (ins, code, sizeflag);
}
static void
-OP_DSreg (int code, int sizeflag)
+OP_DSreg (instr_info *ins, int code, int sizeflag)
{
- if (intel_syntax)
+ if (ins->intel_syntax)
{
- switch (codep[-1])
+ switch (ins->codep[-1])
{
case 0x6f: /* outsw/outsl */
- intel_operand_size (z_mode, sizeflag);
+ intel_operand_size (ins, z_mode, sizeflag);
break;
case 0xa5: /* movsw/movsl/movsq */
case 0xa7: /* cmpsw/cmpsl/cmpsq */
case 0xad: /* lodsw/lodsl/lodsq */
- intel_operand_size (v_mode, sizeflag);
+ intel_operand_size (ins, v_mode, sizeflag);
break;
default:
- intel_operand_size (b_mode, sizeflag);
+ intel_operand_size (ins, b_mode, sizeflag);
}
}
- /* Set active_seg_prefix to PREFIX_DS if it is unset so that the
+ /* Set ins->active_seg_prefix to PREFIX_DS if it is unset so that the
default segment register DS is printed. */
- if (!active_seg_prefix)
- active_seg_prefix = PREFIX_DS;
- append_seg ();
- ptr_reg (code, sizeflag);
+ if (!ins->active_seg_prefix)
+ ins->active_seg_prefix = PREFIX_DS;
+ append_seg (ins);
+ ptr_reg (ins, code, sizeflag);
}
static void
-OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_C (instr_info *ins, int dummy ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
int add;
- if (rex & REX_R)
+ if (ins->rex & REX_R)
{
USED_REX (REX_R);
add = 8;
}
- else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
+ else if (ins->address_mode != mode_64bit && (ins->prefixes & PREFIX_LOCK))
{
- all_prefixes[last_lock_prefix] = 0;
- used_prefixes |= PREFIX_LOCK;
+ ins->all_prefixes[ins->last_lock_prefix] = 0;
+ ins->used_prefixes |= PREFIX_LOCK;
add = 8;
}
else
add = 0;
- sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
- oappend_maybe_intel (scratchbuf);
+ sprintf (ins->scratchbuf, "%%cr%d", ins->modrm.reg + add);
+ oappend_maybe_intel (ins, ins->scratchbuf);
}
static void
-OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_D (instr_info *ins, int dummy ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
int add;
USED_REX (REX_R);
- if (rex & REX_R)
+ if (ins->rex & REX_R)
add = 8;
else
add = 0;
- if (intel_syntax)
- sprintf (scratchbuf, "db%d", modrm.reg + add);
+ if (ins->intel_syntax)
+ sprintf (ins->scratchbuf, "dr%d", ins->modrm.reg + add);
else
- sprintf (scratchbuf, "%%db%d", modrm.reg + add);
- oappend (scratchbuf);
-}
-
-static void
-OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
-{
- sprintf (scratchbuf, "%%tr%d", modrm.reg);
- oappend_maybe_intel (scratchbuf);
+ sprintf (ins->scratchbuf, "%%db%d", ins->modrm.reg + add);
+ oappend (ins, ins->scratchbuf);
}
static void
-OP_R (int bytemode, int sizeflag)
+OP_T (instr_info *ins, int dummy ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
- OP_E_register (bytemode, sizeflag);
+ sprintf (ins->scratchbuf, "%%tr%d", ins->modrm.reg);
+ oappend_maybe_intel (ins, ins->scratchbuf);
}
static void
-OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_MMX (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- int reg = modrm.reg;
- const char **names;
+ int reg = ins->modrm.reg;
+ const char *const *names;
- used_prefixes |= (prefixes & PREFIX_DATA);
- if (prefixes & PREFIX_DATA)
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
+ if (ins->prefixes & PREFIX_DATA)
{
- names = names_xmm;
+ names = att_names_xmm;
USED_REX (REX_R);
- if (rex & REX_R)
+ if (ins->rex & REX_R)
reg += 8;
}
else
- names = names_mm;
- oappend (names[reg]);
+ names = att_names_mm;
+ oappend_maybe_intel (ins, names[reg]);
}
static void
-OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+print_vector_reg (instr_info *ins, unsigned int reg, int bytemode)
{
- int reg = modrm.reg;
- const char **names;
-
- USED_REX (REX_R);
- if (rex & REX_R)
- reg += 8;
- if (vex.evex)
- {
- if (!vex.r)
- reg += 16;
- }
+ const char *const *names;
- if (need_vex
- && bytemode != xmm_mode
- && bytemode != xmmq_mode
- && bytemode != evex_half_bcst_xmmq_mode
- && bytemode != ymm_mode
- && bytemode != scalar_mode)
+ if (bytemode == xmmq_mode
+ || bytemode == evex_half_bcst_xmmqh_mode
+ || bytemode == evex_half_bcst_xmmq_mode)
{
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- names = names_xmm;
- break;
case 256:
- if (vex.w
- || (bytemode != vex_vsib_q_w_dq_mode
- && bytemode != vex_vsib_q_w_d_mode))
- names = names_ymm;
- else
- names = names_xmm;
+ names = att_names_xmm;
break;
case 512:
- names = names_zmm;
+ names = att_names_ymm;
break;
default:
abort ();
}
}
- else if (bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode)
+ else if (bytemode == ymm_mode)
+ names = att_names_ymm;
+ else if (bytemode == tmm_mode)
+ {
+ if (reg >= 8)
+ {
+ oappend (ins, "(bad)");
+ return;
+ }
+ names = att_names_tmm;
+ }
+ else if (ins->need_vex
+ && bytemode != xmm_mode
+ && bytemode != scalar_mode
+ && bytemode != xmmdw_mode
+ && bytemode != xmmqd_mode
+ && bytemode != evex_half_bcst_xmmqdh_mode
+ && bytemode != w_swap_mode
+ && bytemode != b_mode
+ && bytemode != w_mode
+ && bytemode != d_mode
+ && bytemode != q_mode)
{
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
+ names = att_names_xmm;
+ break;
case 256:
- names = names_xmm;
+ if (ins->vex.w
+ || bytemode != vex_vsib_q_w_dq_mode)
+ names = att_names_ymm;
+ else
+ names = att_names_xmm;
break;
case 512:
- names = names_ymm;
+ if (ins->vex.w
+ || bytemode != vex_vsib_q_w_dq_mode)
+ names = att_names_zmm;
+ else
+ names = att_names_ymm;
break;
default:
abort ();
}
}
- else if (bytemode == ymm_mode)
- names = names_ymm;
else
- names = names_xmm;
- oappend (names[reg]);
+ names = att_names_xmm;
+ oappend_maybe_intel (ins, names[reg]);
+}
+
+static void
+OP_XMM (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+{
+ unsigned int reg = ins->modrm.reg;
+
+ USED_REX (REX_R);
+ if (ins->rex & REX_R)
+ reg += 8;
+ if (ins->vex.evex)
+ {
+ if (!ins->vex.r)
+ reg += 16;
+ }
+
+ if (bytemode == tmm_mode)
+ ins->modrm.reg = reg;
+ else if (bytemode == scalar_mode)
+ ins->vex.no_broadcast = true;
+
+ print_vector_reg (ins, reg, bytemode);
}
static void
-OP_EM (int bytemode, int sizeflag)
+OP_EM (instr_info *ins, int bytemode, int sizeflag)
{
int reg;
- const char **names;
+ const char *const *names;
- if (modrm.mod != 3)
+ if (ins->modrm.mod != 3)
{
- if (intel_syntax
+ if (ins->intel_syntax
&& (bytemode == v_mode || bytemode == v_swap_mode))
{
- bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
- used_prefixes |= (prefixes & PREFIX_DATA);
+ bytemode = (ins->prefixes & PREFIX_DATA) ? x_mode : q_mode;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
return;
}
if ((sizeflag & SUFFIX_ALWAYS) && bytemode == v_swap_mode)
- swap_operand ();
+ swap_operand (ins);
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
- used_prefixes |= (prefixes & PREFIX_DATA);
- reg = modrm.rm;
- if (prefixes & PREFIX_DATA)
+ ins->codep++;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
+ reg = ins->modrm.rm;
+ if (ins->prefixes & PREFIX_DATA)
{
- names = names_xmm;
+ names = att_names_xmm;
USED_REX (REX_B);
- if (rex & REX_B)
+ if (ins->rex & REX_B)
reg += 8;
}
else
- names = names_mm;
- oappend (names[reg]);
+ names = att_names_mm;
+ oappend_maybe_intel (ins, names[reg]);
}
/* cvt* are the only instructions in sse2 which have
between SSE and MMX instruction(operands). So we have to handle the
cvt* separately using OP_EMC and OP_MXC */
static void
-OP_EMC (int bytemode, int sizeflag)
+OP_EMC (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod != 3)
+ if (ins->modrm.mod != 3)
{
- if (intel_syntax && bytemode == v_mode)
+ if (ins->intel_syntax && bytemode == v_mode)
{
- bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
- used_prefixes |= (prefixes & PREFIX_DATA);
+ bytemode = (ins->prefixes & PREFIX_DATA) ? x_mode : q_mode;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
return;
}
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
- used_prefixes |= (prefixes & PREFIX_DATA);
- oappend (names_mm[modrm.rm]);
+ ins->codep++;
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
+ oappend_maybe_intel (ins, att_names_mm[ins->modrm.rm]);
}
static void
-OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_MXC (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- used_prefixes |= (prefixes & PREFIX_DATA);
- oappend (names_mm[modrm.reg]);
+ ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
+ oappend_maybe_intel (ins, att_names_mm[ins->modrm.reg]);
}
static void
-OP_EX (int bytemode, int sizeflag)
+OP_EX (instr_info *ins, int bytemode, int sizeflag)
{
int reg;
- const char **names;
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
+ ins->codep++;
+
+ if (bytemode == dq_mode)
+ bytemode = ins->vex.w ? q_mode : d_mode;
- if (modrm.mod != 3)
+ if (ins->modrm.mod != 3)
{
- OP_E_memory (bytemode, sizeflag);
+ OP_E_memory (ins, bytemode, sizeflag);
return;
}
- reg = modrm.rm;
+ reg = ins->modrm.rm;
USED_REX (REX_B);
- if (rex & REX_B)
+ if (ins->rex & REX_B)
reg += 8;
- if (vex.evex)
+ if (ins->vex.evex)
{
USED_REX (REX_X);
- if ((rex & REX_X))
+ if ((ins->rex & REX_X))
reg += 16;
}
if ((sizeflag & SUFFIX_ALWAYS)
&& (bytemode == x_swap_mode
+ || bytemode == w_swap_mode
|| bytemode == d_swap_mode
- || bytemode == d_scalar_swap_mode
- || bytemode == q_swap_mode
- || bytemode == q_scalar_swap_mode))
- swap_operand ();
-
- if (need_vex
- && bytemode != xmm_mode
- && bytemode != xmmdw_mode
- && bytemode != xmmqd_mode
- && bytemode != xmm_mb_mode
- && bytemode != xmm_mw_mode
- && bytemode != xmm_md_mode
- && bytemode != xmm_mq_mode
- && bytemode != xmmq_mode
- && bytemode != evex_half_bcst_xmmq_mode
- && bytemode != ymm_mode
- && bytemode != d_scalar_swap_mode
- && bytemode != q_scalar_swap_mode
- && bytemode != vex_scalar_w_dq_mode)
- {
- switch (vex.length)
- {
- case 128:
- names = names_xmm;
- break;
- case 256:
- names = names_ymm;
- break;
- case 512:
- names = names_zmm;
- break;
- default:
- abort ();
- }
- }
- else if (bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode)
- {
- switch (vex.length)
- {
- case 128:
- case 256:
- names = names_xmm;
- break;
- case 512:
- names = names_ymm;
- break;
- default:
- abort ();
- }
- }
- else if (bytemode == ymm_mode)
- names = names_ymm;
- else
- names = names_xmm;
- oappend (names[reg]);
+ || bytemode == q_swap_mode))
+ swap_operand (ins);
+
+ if (bytemode == tmm_mode)
+ ins->modrm.rm = reg;
+
+ print_vector_reg (ins, reg, bytemode);
}
static void
-OP_MS (int bytemode, int sizeflag)
+OP_MS (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod == 3)
- OP_EM (bytemode, sizeflag);
+ if (ins->modrm.mod == 3)
+ OP_EM (ins, bytemode, sizeflag);
else
- BadOp ();
+ BadOp (ins);
}
static void
-OP_XS (int bytemode, int sizeflag)
+OP_XS (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod == 3)
- OP_EX (bytemode, sizeflag);
+ if (ins->modrm.mod == 3)
+ OP_EX (ins, bytemode, sizeflag);
else
- BadOp ();
+ BadOp (ins);
}
static void
-OP_M (int bytemode, int sizeflag)
+OP_M (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod == 3)
+ if (ins->modrm.mod == 3)
/* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
- BadOp ();
+ BadOp (ins);
else
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
}
static void
-OP_0f07 (int bytemode, int sizeflag)
+OP_0f07 (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod != 3 || modrm.rm != 0)
- BadOp ();
+ if (ins->modrm.mod != 3 || ins->modrm.rm != 0)
+ BadOp (ins);
else
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
}
/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
32bit mode and "xchg %rax,%rax" in 64bit mode. */
static void
-NOP_Fixup1 (int bytemode, int sizeflag)
+NOP_Fixup1 (instr_info *ins, int bytemode, int sizeflag)
{
- if ((prefixes & PREFIX_DATA) != 0
- || (rex != 0
- && rex != 0x48
- && address_mode == mode_64bit))
- OP_REG (bytemode, sizeflag);
+ if ((ins->prefixes & PREFIX_DATA) != 0
+ || (ins->rex != 0
+ && ins->rex != 0x48
+ && ins->address_mode == mode_64bit))
+ OP_REG (ins, bytemode, sizeflag);
else
- strcpy (obuf, "nop");
+ strcpy (ins->obuf, "nop");
}
static void
-NOP_Fixup2 (int bytemode, int sizeflag)
+NOP_Fixup2 (instr_info *ins, int bytemode, int sizeflag)
{
- if ((prefixes & PREFIX_DATA) != 0
- || (rex != 0
- && rex != 0x48
- && address_mode == mode_64bit))
- OP_IMREG (bytemode, sizeflag);
+ if ((ins->prefixes & PREFIX_DATA) != 0
+ || (ins->rex != 0
+ && ins->rex != 0x48
+ && ins->address_mode == mode_64bit))
+ OP_IMREG (ins, bytemode, sizeflag);
}
static const char *const Suffix3DNow[] = {
};
static void
-OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_3DNowSuffix (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
const char *mnemonic;
- FETCH_DATA (the_info, codep + 1);
+ FETCH_DATA (ins->info, ins->codep + 1);
/* AMD 3DNow! instructions are specified by an opcode suffix in the
place where an 8-bit immediate would normally go. ie. the last
byte of the instruction. */
- obufp = mnemonicendp;
- mnemonic = Suffix3DNow[*codep++ & 0xff];
+ ins->obufp = ins->mnemonicendp;
+ mnemonic = Suffix3DNow[*ins->codep++ & 0xff];
if (mnemonic)
- oappend (mnemonic);
+ oappend (ins, mnemonic);
else
{
- /* Since a variable sized modrm/sib chunk is between the start
+ /* Since a variable sized ins->modrm/ins->sib chunk is between the start
of the opcode (0x0f0f) and the opcode suffix, we need to do
- all the modrm processing first, and don't know until now that
+ all the ins->modrm processing first, and don't know until now that
we have a bad opcode. This necessitates some cleaning up. */
- op_out[0][0] = '\0';
- op_out[1][0] = '\0';
- BadOp ();
+ ins->op_out[0][0] = '\0';
+ ins->op_out[1][0] = '\0';
+ BadOp (ins);
}
- mnemonicendp = obufp;
+ ins->mnemonicendp = ins->obufp;
}
-static struct op simd_cmp_op[] =
+static const struct op simd_cmp_op[] =
{
{ STRING_COMMA_LEN ("eq") },
{ STRING_COMMA_LEN ("lt") },
{ STRING_COMMA_LEN ("ord") }
};
+static const struct op vex_cmp_op[] =
+{
+ { STRING_COMMA_LEN ("eq_uq") },
+ { STRING_COMMA_LEN ("nge") },
+ { STRING_COMMA_LEN ("ngt") },
+ { STRING_COMMA_LEN ("false") },
+ { STRING_COMMA_LEN ("neq_oq") },
+ { STRING_COMMA_LEN ("ge") },
+ { STRING_COMMA_LEN ("gt") },
+ { STRING_COMMA_LEN ("true") },
+ { STRING_COMMA_LEN ("eq_os") },
+ { STRING_COMMA_LEN ("lt_oq") },
+ { STRING_COMMA_LEN ("le_oq") },
+ { STRING_COMMA_LEN ("unord_s") },
+ { STRING_COMMA_LEN ("neq_us") },
+ { STRING_COMMA_LEN ("nlt_uq") },
+ { STRING_COMMA_LEN ("nle_uq") },
+ { STRING_COMMA_LEN ("ord_s") },
+ { STRING_COMMA_LEN ("eq_us") },
+ { STRING_COMMA_LEN ("nge_uq") },
+ { STRING_COMMA_LEN ("ngt_uq") },
+ { STRING_COMMA_LEN ("false_os") },
+ { STRING_COMMA_LEN ("neq_os") },
+ { STRING_COMMA_LEN ("ge_oq") },
+ { STRING_COMMA_LEN ("gt_oq") },
+ { STRING_COMMA_LEN ("true_us") },
+};
+
static void
-CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+CMP_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
unsigned int cmp_type;
- FETCH_DATA (the_info, codep + 1);
- cmp_type = *codep++ & 0xff;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ cmp_type = *ins->codep++ & 0xff;
if (cmp_type < ARRAY_SIZE (simd_cmp_op))
{
- char suffix [3];
- char *p = mnemonicendp - 2;
+ char suffix[3];
+ char *p = ins->mnemonicendp - 2;
suffix[0] = p[0];
suffix[1] = p[1];
suffix[2] = '\0';
sprintf (p, "%s%s", simd_cmp_op[cmp_type].name, suffix);
- mnemonicendp += simd_cmp_op[cmp_type].len;
+ ins->mnemonicendp += simd_cmp_op[cmp_type].len;
+ }
+ else if (ins->need_vex
+ && cmp_type < ARRAY_SIZE (simd_cmp_op) + ARRAY_SIZE (vex_cmp_op))
+ {
+ char suffix[3];
+ char *p = ins->mnemonicendp - 2;
+ suffix[0] = p[0];
+ suffix[1] = p[1];
+ suffix[2] = '\0';
+ cmp_type -= ARRAY_SIZE (simd_cmp_op);
+ sprintf (p, "%s%s", vex_cmp_op[cmp_type].name, suffix);
+ ins->mnemonicendp += vex_cmp_op[cmp_type].len;
}
else
{
/* We have a reserved extension byte. Output it directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, cmp_type);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, cmp_type);
+ oappend_maybe_intel (ins, ins->scratchbuf);
+ ins->scratchbuf[0] = '\0';
}
}
static void
-OP_Mwait (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+OP_Mwait (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
/* mwait %eax,%ecx / mwaitx %eax,%ecx,%ebx */
- if (!intel_syntax)
+ if (!ins->intel_syntax)
{
- strcpy (op_out[0], names32[0]);
- strcpy (op_out[1], names32[1]);
+ strcpy (ins->op_out[0], att_names32[0] + ins->intel_syntax);
+ strcpy (ins->op_out[1], att_names32[1] + ins->intel_syntax);
if (bytemode == eBX_reg)
- strcpy (op_out[2], names32[3]);
- two_source_ops = 1;
+ strcpy (ins->op_out[2], att_names32[3] + ins->intel_syntax);
+ ins->two_source_ops = true;
}
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
+ ins->codep++;
}
static void
-OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
+OP_Monitor (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
/* monitor %{e,r,}ax,%ecx,%edx" */
- if (!intel_syntax)
+ if (!ins->intel_syntax)
{
- const char **names = (address_mode == mode_64bit
- ? names64 : names32);
+ const char *const *names = (ins->address_mode == mode_64bit
+ ? att_names64 : att_names32);
- if (prefixes & PREFIX_ADDR)
+ if (ins->prefixes & PREFIX_ADDR)
{
/* Remove "addr16/addr32". */
- all_prefixes[last_addr_prefix] = 0;
- names = (address_mode != mode_32bit
- ? names32 : names16);
- used_prefixes |= PREFIX_ADDR;
+ ins->all_prefixes[ins->last_addr_prefix] = 0;
+ names = (ins->address_mode != mode_32bit
+ ? att_names32 : att_names16);
+ ins->used_prefixes |= PREFIX_ADDR;
}
- else if (address_mode == mode_16bit)
- names = names16;
- strcpy (op_out[0], names[0]);
- strcpy (op_out[1], names32[1]);
- strcpy (op_out[2], names32[2]);
- two_source_ops = 1;
+ else if (ins->address_mode == mode_16bit)
+ names = att_names16;
+ strcpy (ins->op_out[0], names[0] + ins->intel_syntax);
+ strcpy (ins->op_out[1], att_names32[1] + ins->intel_syntax);
+ strcpy (ins->op_out[2], att_names32[2] + ins->intel_syntax);
+ ins->two_source_ops = true;
}
/* Skip mod/rm byte. */
MODRM_CHECK;
- codep++;
+ ins->codep++;
}
static void
-BadOp (void)
+BadOp (instr_info *ins)
{
/* Throw away prefixes and 1st. opcode byte. */
- codep = insn_codep + 1;
- oappend ("(bad)");
+ ins->codep = ins->insn_codep + 1;
+ oappend (ins, "(bad)");
}
static void
-REP_Fixup (int bytemode, int sizeflag)
+REP_Fixup (instr_info *ins, int bytemode, int sizeflag)
{
/* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
lods and stos. */
- if (prefixes & PREFIX_REPZ)
- all_prefixes[last_repz_prefix] = REP_PREFIX;
+ if (ins->prefixes & PREFIX_REPZ)
+ ins->all_prefixes[ins->last_repz_prefix] = REP_PREFIX;
switch (bytemode)
{
case al_reg:
case eAX_reg:
case indir_dx_reg:
- OP_IMREG (bytemode, sizeflag);
+ OP_IMREG (ins, bytemode, sizeflag);
break;
case eDI_reg:
- OP_ESreg (bytemode, sizeflag);
+ OP_ESreg (ins, bytemode, sizeflag);
break;
case eSI_reg:
- OP_DSreg (bytemode, sizeflag);
+ OP_DSreg (ins, bytemode, sizeflag);
break;
default:
abort ();
}
static void
-SEP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+SEP_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- if ( isa64 != amd64 )
+ if (ins->isa64 != amd64)
return;
- obufp = obuf;
- BadOp ();
- mnemonicendp = obufp;
- ++codep;
+ ins->obufp = ins->obuf;
+ BadOp (ins);
+ ins->mnemonicendp = ins->obufp;
+ ++ins->codep;
}
/* For BND-prefixed instructions 0xF2 prefix should be displayed as
"bnd". */
static void
-BND_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+BND_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- if (prefixes & PREFIX_REPNZ)
- all_prefixes[last_repnz_prefix] = BND_PREFIX;
+ if (ins->prefixes & PREFIX_REPNZ)
+ ins->all_prefixes[ins->last_repnz_prefix] = BND_PREFIX;
}
/* For NOTRACK-prefixed instructions, 0x3E prefix should be displayed as
"notrack". */
static void
-NOTRACK_Fixup (int bytemode ATTRIBUTE_UNUSED,
+NOTRACK_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
- if (active_seg_prefix == PREFIX_DS
- && (address_mode != mode_64bit || last_data_prefix < 0))
+ /* Since active_seg_prefix is not set in 64-bit mode, check whether
+ we've seen a PREFIX_DS. */
+ if ((ins->prefixes & PREFIX_DS) != 0
+ && (ins->address_mode != mode_64bit || ins->last_data_prefix < 0))
{
/* NOTRACK prefix is only valid on indirect branch instructions.
NB: DATA prefix is unsupported for Intel64. */
- active_seg_prefix = 0;
- all_prefixes[last_seg_prefix] = NOTRACK_PREFIX;
+ ins->active_seg_prefix = 0;
+ ins->all_prefixes[ins->last_seg_prefix] = NOTRACK_PREFIX;
}
}
-/* Similar to OP_E. But the 0xf2/0xf3 prefixes should be displayed as
+/* Similar to OP_E. But the 0xf2/0xf3 ins->prefixes should be displayed as
"xacquire"/"xrelease" for memory operand if there is a LOCK prefix.
*/
static void
-HLE_Fixup1 (int bytemode, int sizeflag)
+HLE_Fixup1 (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod != 3
- && (prefixes & PREFIX_LOCK) != 0)
+ if (ins->modrm.mod != 3
+ && (ins->prefixes & PREFIX_LOCK) != 0)
{
- if (prefixes & PREFIX_REPZ)
- all_prefixes[last_repz_prefix] = XRELEASE_PREFIX;
- if (prefixes & PREFIX_REPNZ)
- all_prefixes[last_repnz_prefix] = XACQUIRE_PREFIX;
+ if (ins->prefixes & PREFIX_REPZ)
+ ins->all_prefixes[ins->last_repz_prefix] = XRELEASE_PREFIX;
+ if (ins->prefixes & PREFIX_REPNZ)
+ ins->all_prefixes[ins->last_repnz_prefix] = XACQUIRE_PREFIX;
}
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
}
-/* Similar to OP_E. But the 0xf2/0xf3 prefixes should be displayed as
+/* Similar to OP_E. But the 0xf2/0xf3 ins->prefixes should be displayed as
"xacquire"/"xrelease" for memory operand. No check for LOCK prefix.
*/
static void
-HLE_Fixup2 (int bytemode, int sizeflag)
+HLE_Fixup2 (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod != 3)
+ if (ins->modrm.mod != 3)
{
- if (prefixes & PREFIX_REPZ)
- all_prefixes[last_repz_prefix] = XRELEASE_PREFIX;
- if (prefixes & PREFIX_REPNZ)
- all_prefixes[last_repnz_prefix] = XACQUIRE_PREFIX;
+ if (ins->prefixes & PREFIX_REPZ)
+ ins->all_prefixes[ins->last_repz_prefix] = XRELEASE_PREFIX;
+ if (ins->prefixes & PREFIX_REPNZ)
+ ins->all_prefixes[ins->last_repnz_prefix] = XACQUIRE_PREFIX;
}
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
}
/* Similar to OP_E. But the 0xf3 prefixes should be displayed as
"xrelease" for memory operand. No check for LOCK prefix. */
static void
-HLE_Fixup3 (int bytemode, int sizeflag)
+HLE_Fixup3 (instr_info *ins, int bytemode, int sizeflag)
{
- if (modrm.mod != 3
- && last_repz_prefix > last_repnz_prefix
- && (prefixes & PREFIX_REPZ) != 0)
- all_prefixes[last_repz_prefix] = XRELEASE_PREFIX;
+ if (ins->modrm.mod != 3
+ && ins->last_repz_prefix > ins->last_repnz_prefix
+ && (ins->prefixes & PREFIX_REPZ) != 0)
+ ins->all_prefixes[ins->last_repz_prefix] = XRELEASE_PREFIX;
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
}
static void
-CMPXCHG8B_Fixup (int bytemode, int sizeflag)
+CMPXCHG8B_Fixup (instr_info *ins, int bytemode, int sizeflag)
{
USED_REX (REX_W);
- if (rex & REX_W)
+ if (ins->rex & REX_W)
{
/* Change cmpxchg8b to cmpxchg16b. */
- char *p = mnemonicendp - 2;
- mnemonicendp = stpcpy (p, "16b");
+ char *p = ins->mnemonicendp - 2;
+ ins->mnemonicendp = stpcpy (p, "16b");
bytemode = o_mode;
}
- else if ((prefixes & PREFIX_LOCK) != 0)
+ else if ((ins->prefixes & PREFIX_LOCK) != 0)
{
- if (prefixes & PREFIX_REPZ)
- all_prefixes[last_repz_prefix] = XRELEASE_PREFIX;
- if (prefixes & PREFIX_REPNZ)
- all_prefixes[last_repnz_prefix] = XACQUIRE_PREFIX;
+ if (ins->prefixes & PREFIX_REPZ)
+ ins->all_prefixes[ins->last_repz_prefix] = XRELEASE_PREFIX;
+ if (ins->prefixes & PREFIX_REPNZ)
+ ins->all_prefixes[ins->last_repnz_prefix] = XACQUIRE_PREFIX;
}
- OP_M (bytemode, sizeflag);
+ OP_M (ins, bytemode, sizeflag);
}
static void
-XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
+XMM_Fixup (instr_info *ins, int reg, int sizeflag ATTRIBUTE_UNUSED)
{
- const char **names;
+ const char *const *names = att_names_xmm;
- if (need_vex)
+ if (ins->need_vex)
{
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
- names = names_xmm;
break;
case 256:
- names = names_ymm;
+ names = att_names_ymm;
break;
default:
abort ();
}
}
- else
- names = names_xmm;
- oappend (names[reg]);
-}
-
-static void
-CRC32_Fixup (int bytemode, int sizeflag)
-{
- /* Add proper suffix to "crc32". */
- char *p = mnemonicendp;
-
- switch (bytemode)
- {
- case b_mode:
- if (intel_syntax)
- goto skip;
-
- *p++ = 'b';
- break;
- case v_mode:
- if (intel_syntax)
- goto skip;
-
- USED_REX (REX_W);
- if (rex & REX_W)
- *p++ = 'q';
- else
- {
- if (sizeflag & DFLAG)
- *p++ = 'l';
- else
- *p++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
- }
- mnemonicendp = p;
- *p = '\0';
-
- skip:
- if (modrm.mod == 3)
- {
- int add;
-
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- USED_REX (REX_B);
- add = (rex & REX_B) ? 8 : 0;
- if (bytemode == b_mode)
- {
- USED_REX (0);
- if (rex)
- oappend (names8rex[modrm.rm + add]);
- else
- oappend (names8[modrm.rm + add]);
- }
- else
- {
- USED_REX (REX_W);
- if (rex & REX_W)
- oappend (names64[modrm.rm + add]);
- else if ((prefixes & PREFIX_DATA))
- oappend (names16[modrm.rm + add]);
- else
- oappend (names32[modrm.rm + add]);
- }
- }
- else
- OP_E (bytemode, sizeflag);
+ oappend_maybe_intel (ins, names[reg]);
}
static void
-FXSAVE_Fixup (int bytemode, int sizeflag)
+FXSAVE_Fixup (instr_info *ins, int bytemode, int sizeflag)
{
/* Add proper suffix to "fxsave" and "fxrstor". */
USED_REX (REX_W);
- if (rex & REX_W)
+ if (ins->rex & REX_W)
{
- char *p = mnemonicendp;
+ char *p = ins->mnemonicendp;
*p++ = '6';
*p++ = '4';
*p = '\0';
- mnemonicendp = p;
+ ins->mnemonicendp = p;
}
- OP_M (bytemode, sizeflag);
+ OP_M (ins, bytemode, sizeflag);
}
+/* Display the destination register operand for instructions with
+ VEX. */
+
static void
-PCMPESTR_Fixup (int bytemode, int sizeflag)
+OP_VEX (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
- /* Add proper suffix to "{,v}pcmpestr{i,m}". */
- if (!intel_syntax)
- {
- char *p = mnemonicendp;
+ int reg, modrm_reg, sib_index = -1;
+ const char *const *names;
- USED_REX (REX_W);
- if (rex & REX_W)
- *p++ = 'q';
- else if (sizeflag & SUFFIX_ALWAYS)
- *p++ = 'l';
+ if (!ins->need_vex)
+ abort ();
- *p = '\0';
- mnemonicendp = p;
+ reg = ins->vex.register_specifier;
+ ins->vex.register_specifier = 0;
+ if (ins->address_mode != mode_64bit)
+ {
+ if (ins->vex.evex && !ins->vex.v)
+ {
+ oappend (ins, "(bad)");
+ return;
+ }
+
+ reg &= 7;
}
+ else if (ins->vex.evex && !ins->vex.v)
+ reg += 16;
- OP_EX (bytemode, sizeflag);
-}
+ switch (bytemode)
+ {
+ case scalar_mode:
+ oappend_maybe_intel (ins, att_names_xmm[reg]);
+ return;
-/* Display the destination register operand for instructions with
- VEX. */
+ case vex_vsib_d_w_dq_mode:
+ case vex_vsib_q_w_dq_mode:
+ /* This must be the 3rd operand. */
+ if (ins->obufp != ins->op_out[2])
+ abort ();
+ if (ins->vex.length == 128
+ || (bytemode != vex_vsib_d_w_dq_mode
+ && !ins->vex.w))
+ oappend_maybe_intel (ins, att_names_xmm[reg]);
+ else
+ oappend_maybe_intel (ins, att_names_ymm[reg]);
-static void
-OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
-{
- int reg;
- const char **names;
+ /* All 3 XMM/YMM registers must be distinct. */
+ modrm_reg = ins->modrm.reg;
+ if (ins->rex & REX_R)
+ modrm_reg += 8;
- if (!need_vex)
- abort ();
+ if (ins->has_sib && ins->modrm.rm == 4)
+ {
+ sib_index = ins->sib.index;
+ if (ins->rex & REX_X)
+ sib_index += 8;
+ }
- if (!need_vex_reg)
- return;
+ if (reg == modrm_reg || reg == sib_index)
+ strcpy (ins->obufp, "/(bad)");
+ if (modrm_reg == sib_index || modrm_reg == reg)
+ strcat (ins->op_out[0], "/(bad)");
+ if (sib_index == modrm_reg || sib_index == reg)
+ strcat (ins->op_out[1], "/(bad)");
- reg = vex.register_specifier;
- vex.register_specifier = 0;
- if (address_mode != mode_64bit)
- reg &= 7;
- else if (vex.evex && !vex.v)
- reg += 16;
+ return;
+
+ case tmm_mode:
+ /* All 3 TMM registers must be distinct. */
+ if (reg >= 8)
+ oappend (ins, "(bad)");
+ else
+ {
+ /* This must be the 3rd operand. */
+ if (ins->obufp != ins->op_out[2])
+ abort ();
+ oappend_maybe_intel (ins, att_names_tmm[reg]);
+ if (reg == ins->modrm.reg || reg == ins->modrm.rm)
+ strcpy (ins->obufp, "/(bad)");
+ }
+
+ if (ins->modrm.reg == ins->modrm.rm || ins->modrm.reg == reg
+ || ins->modrm.rm == reg)
+ {
+ if (ins->modrm.reg <= 8
+ && (ins->modrm.reg == ins->modrm.rm || ins->modrm.reg == reg))
+ strcat (ins->op_out[0], "/(bad)");
+ if (ins->modrm.rm <= 8
+ && (ins->modrm.rm == ins->modrm.reg || ins->modrm.rm == reg))
+ strcat (ins->op_out[1], "/(bad)");
+ }
- if (bytemode == vex_scalar_mode)
- {
- oappend (names_xmm[reg]);
return;
}
- switch (vex.length)
+ switch (ins->vex.length)
{
case 128:
switch (bytemode)
{
- case vex_mode:
- case vex128_mode:
- case vex_vsib_q_w_dq_mode:
- case vex_vsib_q_w_d_mode:
- names = names_xmm;
+ case x_mode:
+ names = att_names_xmm;
break;
case dq_mode:
- if (rex & REX_W)
- names = names64;
+ if (ins->rex & REX_W)
+ names = att_names64;
else
- names = names32;
+ names = att_names32;
break;
case mask_bd_mode:
case mask_mode:
if (reg > 0x7)
{
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
- names = names_mask;
+ names = att_names_mask;
break;
default:
abort ();
case 256:
switch (bytemode)
{
- case vex_mode:
- case vex256_mode:
- names = names_ymm;
- break;
- case vex_vsib_q_w_dq_mode:
- case vex_vsib_q_w_d_mode:
- names = vex.w ? names_ymm : names_xmm;
+ case x_mode:
+ names = att_names_ymm;
break;
case mask_bd_mode:
case mask_mode:
if (reg > 0x7)
{
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
- names = names_mask;
+ names = att_names_mask;
break;
default:
/* See PR binutils/20893 for a reproducer. */
- oappend ("(bad)");
+ oappend (ins, "(bad)");
return;
}
break;
case 512:
- names = names_zmm;
+ names = att_names_zmm;
break;
default:
abort ();
break;
}
- oappend (names[reg]);
-}
-
-/* Get the VEX immediate byte without moving codep. */
-
-static unsigned char
-get_vex_imm8 (int sizeflag, int opnum)
-{
- int bytes_before_imm = 0;
-
- if (modrm.mod != 3)
- {
- /* There are SIB/displacement bytes. */
- if ((sizeflag & AFLAG) || address_mode == mode_64bit)
- {
- /* 32/64 bit address mode */
- int base = modrm.rm;
-
- /* Check SIB byte. */
- if (base == 4)
- {
- FETCH_DATA (the_info, codep + 1);
- base = *codep & 7;
- /* When decoding the third source, don't increase
- bytes_before_imm as this has already been incremented
- by one in OP_E_memory while decoding the second
- source operand. */
- if (opnum == 0)
- bytes_before_imm++;
- }
-
- /* Don't increase bytes_before_imm when decoding the third source,
- it has already been incremented by OP_E_memory while decoding
- the second source operand. */
- if (opnum == 0)
- {
- switch (modrm.mod)
- {
- case 0:
- /* When modrm.rm == 5 or modrm.rm == 4 and base in
- SIB == 5, there is a 4 byte displacement. */
- if (base != 5)
- /* No displacement. */
- break;
- /* Fall through. */
- case 2:
- /* 4 byte displacement. */
- bytes_before_imm += 4;
- break;
- case 1:
- /* 1 byte displacement. */
- bytes_before_imm++;
- break;
- }
- }
- }
- else
- {
- /* 16 bit address mode */
- /* Don't increase bytes_before_imm when decoding the third source,
- it has already been incremented by OP_E_memory while decoding
- the second source operand. */
- if (opnum == 0)
- {
- switch (modrm.mod)
- {
- case 0:
- /* When modrm.rm == 6, there is a 2 byte displacement. */
- if (modrm.rm != 6)
- /* No displacement. */
- break;
- /* Fall through. */
- case 2:
- /* 2 byte displacement. */
- bytes_before_imm += 2;
- break;
- case 1:
- /* 1 byte displacement: when decoding the third source,
- don't increase bytes_before_imm as this has already
- been incremented by one in OP_E_memory while decoding
- the second source operand. */
- if (opnum == 0)
- bytes_before_imm++;
-
- break;
- }
- }
- }
- }
-
- FETCH_DATA (the_info, codep + bytes_before_imm + 1);
- return codep [bytes_before_imm];
-}
-
-static void
-OP_EX_VexReg (int bytemode, int sizeflag, int reg)
-{
- const char **names;
-
- if (reg == -1 && modrm.mod != 3)
- {
- OP_E_memory (bytemode, sizeflag);
- return;
- }
- else
- {
- if (reg == -1)
- {
- reg = modrm.rm;
- USED_REX (REX_B);
- if (rex & REX_B)
- reg += 8;
- }
- if (address_mode != mode_64bit)
- reg &= 7;
- }
-
- switch (vex.length)
- {
- case 128:
- names = names_xmm;
- break;
- case 256:
- names = names_ymm;
- break;
- default:
- abort ();
- }
- oappend (names[reg]);
-}
-
-static void
-OP_EX_VexImmW (int bytemode, int sizeflag)
-{
- int reg = -1;
- static unsigned char vex_imm8;
-
- if (vex_w_done == 0)
- {
- vex_w_done = 1;
-
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- vex_imm8 = get_vex_imm8 (sizeflag, 0);
-
- if (vex.w)
- reg = vex_imm8 >> 4;
-
- OP_EX_VexReg (bytemode, sizeflag, reg);
- }
- else if (vex_w_done == 1)
- {
- vex_w_done = 2;
-
- if (!vex.w)
- reg = vex_imm8 >> 4;
-
- OP_EX_VexReg (bytemode, sizeflag, reg);
- }
- else
- {
- /* Output the imm8 directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, vex_imm8 & 0xf);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
- codep++;
- }
-}
-
-static void
-OP_Vex_2src (int bytemode, int sizeflag)
-{
- if (modrm.mod == 3)
- {
- int reg = modrm.rm;
- USED_REX (REX_B);
- if (rex & REX_B)
- reg += 8;
- oappend (names_xmm[reg]);
- }
- else
- {
- if (intel_syntax
- && (bytemode == v_mode || bytemode == v_swap_mode))
- {
- bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- OP_E (bytemode, sizeflag);
- }
-}
-
-static void
-OP_Vex_2src_1 (int bytemode, int sizeflag)
-{
- if (modrm.mod == 3)
- {
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
- }
-
- if (vex.w)
- {
- unsigned int reg = vex.register_specifier;
- vex.register_specifier = 0;
-
- if (address_mode != mode_64bit)
- reg &= 7;
- oappend (names_xmm[reg]);
- }
- else
- OP_Vex_2src (bytemode, sizeflag);
+ oappend_maybe_intel (ins, names[reg]);
}
static void
-OP_Vex_2src_2 (int bytemode, int sizeflag)
+OP_VexR (instr_info *ins, int bytemode, int sizeflag)
{
- if (vex.w)
- OP_Vex_2src (bytemode, sizeflag);
- else
- {
- unsigned int reg = vex.register_specifier;
- vex.register_specifier = 0;
-
- if (address_mode != mode_64bit)
- reg &= 7;
- oappend (names_xmm[reg]);
- }
+ if (ins->modrm.mod == 3)
+ OP_VEX (ins, bytemode, sizeflag);
}
static void
-OP_EX_VexW (int bytemode, int sizeflag)
+OP_VexW (instr_info *ins, int bytemode, int sizeflag)
{
- int reg = -1;
+ OP_VEX (ins, bytemode, sizeflag);
- if (!vex_w_done)
+ if (ins->vex.w)
{
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- if (vex.w)
- reg = get_vex_imm8 (sizeflag, 0) >> 4;
- }
- else
- {
- if (!vex.w)
- reg = get_vex_imm8 (sizeflag, 1) >> 4;
+ /* Swap 2nd and 3rd operands. */
+ strcpy (ins->scratchbuf, ins->op_out[2]);
+ strcpy (ins->op_out[2], ins->op_out[1]);
+ strcpy (ins->op_out[1], ins->scratchbuf);
}
-
- OP_EX_VexReg (bytemode, sizeflag, reg);
-
- if (vex_w_done)
- codep++;
- vex_w_done = 1;
}
static void
-OP_REG_VexI4 (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+OP_REG_VexI4 (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
int reg;
- const char **names;
+ const char *const *names = att_names_xmm;
- FETCH_DATA (the_info, codep + 1);
- reg = *codep++;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ reg = *ins->codep++;
- if (bytemode != x_mode)
+ if (bytemode != x_mode && bytemode != scalar_mode)
abort ();
reg >>= 4;
- if (address_mode != mode_64bit)
+ if (ins->address_mode != mode_64bit)
reg &= 7;
- switch (vex.length)
- {
- case 128:
- names = names_xmm;
- break;
- case 256:
- names = names_ymm;
- break;
- default:
- abort ();
- }
- oappend (names[reg]);
-}
-
-static void
-OP_XMM_VexW (int bytemode, int sizeflag)
-{
- /* Turn off the REX.W bit since it is used for swapping operands
- now. */
- rex &= ~REX_W;
- OP_XMM (bytemode, sizeflag);
-}
+ if (bytemode == x_mode && ins->vex.length == 256)
+ names = att_names_ymm;
-static void
-OP_EX_Vex (int bytemode, int sizeflag)
-{
- if (modrm.mod != 3)
- need_vex_reg = 0;
- OP_EX (bytemode, sizeflag);
-}
+ oappend_maybe_intel (ins, names[reg]);
-static void
-OP_XMM_Vex (int bytemode, int sizeflag)
-{
- if (modrm.mod != 3)
- need_vex_reg = 0;
- OP_XMM (bytemode, sizeflag);
+ if (ins->vex.w)
+ {
+ /* Swap 3rd and 4th operands. */
+ strcpy (ins->scratchbuf, ins->op_out[3]);
+ strcpy (ins->op_out[3], ins->op_out[2]);
+ strcpy (ins->op_out[2], ins->scratchbuf);
+ }
}
-static struct op vex_cmp_op[] =
-{
- { STRING_COMMA_LEN ("eq") },
- { STRING_COMMA_LEN ("lt") },
- { STRING_COMMA_LEN ("le") },
- { STRING_COMMA_LEN ("unord") },
- { STRING_COMMA_LEN ("neq") },
- { STRING_COMMA_LEN ("nlt") },
- { STRING_COMMA_LEN ("nle") },
- { STRING_COMMA_LEN ("ord") },
- { STRING_COMMA_LEN ("eq_uq") },
- { STRING_COMMA_LEN ("nge") },
- { STRING_COMMA_LEN ("ngt") },
- { STRING_COMMA_LEN ("false") },
- { STRING_COMMA_LEN ("neq_oq") },
- { STRING_COMMA_LEN ("ge") },
- { STRING_COMMA_LEN ("gt") },
- { STRING_COMMA_LEN ("true") },
- { STRING_COMMA_LEN ("eq_os") },
- { STRING_COMMA_LEN ("lt_oq") },
- { STRING_COMMA_LEN ("le_oq") },
- { STRING_COMMA_LEN ("unord_s") },
- { STRING_COMMA_LEN ("neq_us") },
- { STRING_COMMA_LEN ("nlt_uq") },
- { STRING_COMMA_LEN ("nle_uq") },
- { STRING_COMMA_LEN ("ord_s") },
- { STRING_COMMA_LEN ("eq_us") },
- { STRING_COMMA_LEN ("nge_uq") },
- { STRING_COMMA_LEN ("ngt_uq") },
- { STRING_COMMA_LEN ("false_os") },
- { STRING_COMMA_LEN ("neq_os") },
- { STRING_COMMA_LEN ("ge_oq") },
- { STRING_COMMA_LEN ("gt_oq") },
- { STRING_COMMA_LEN ("true_us") },
-};
-
static void
-VCMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+OP_VexI4 (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- unsigned int cmp_type;
-
- FETCH_DATA (the_info, codep + 1);
- cmp_type = *codep++ & 0xff;
- if (cmp_type < ARRAY_SIZE (vex_cmp_op))
- {
- char suffix [3];
- char *p = mnemonicendp - 2;
- suffix[0] = p[0];
- suffix[1] = p[1];
- suffix[2] = '\0';
- sprintf (p, "%s%s", vex_cmp_op[cmp_type].name, suffix);
- mnemonicendp += vex_cmp_op[cmp_type].len;
- }
- else
- {
- /* We have a reserved extension byte. Output it directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, cmp_type);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
- }
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, ins->codep[-1] & 0xf);
+ oappend_maybe_intel (ins, ins->scratchbuf);
}
static void
-VPCMP_Fixup (int bytemode ATTRIBUTE_UNUSED,
+VPCMP_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
unsigned int cmp_type;
- if (!vex.evex)
+ if (!ins->vex.evex)
abort ();
- FETCH_DATA (the_info, codep + 1);
- cmp_type = *codep++ & 0xff;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ cmp_type = *ins->codep++ & 0xff;
/* There are aliases for immediates 0, 1, 2, 4, 5, 6.
If it's the case, print suffix, otherwise - print the immediate. */
if (cmp_type < ARRAY_SIZE (simd_cmp_op)
&& cmp_type != 3
&& cmp_type != 7)
{
- char suffix [3];
- char *p = mnemonicendp - 2;
+ char suffix[3];
+ char *p = ins->mnemonicendp - 2;
/* vpcmp* can have both one- and two-lettered suffix. */
if (p[0] == 'p')
}
sprintf (p, "%s%s", simd_cmp_op[cmp_type].name, suffix);
- mnemonicendp += simd_cmp_op[cmp_type].len;
+ ins->mnemonicendp += simd_cmp_op[cmp_type].len;
}
else
{
/* We have a reserved extension byte. Output it directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, cmp_type);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, cmp_type);
+ oappend_maybe_intel (ins, ins->scratchbuf);
+ ins->scratchbuf[0] = '\0';
}
}
};
static void
-VPCOM_Fixup (int bytemode ATTRIBUTE_UNUSED,
+VPCOM_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
unsigned int cmp_type;
- FETCH_DATA (the_info, codep + 1);
- cmp_type = *codep++ & 0xff;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ cmp_type = *ins->codep++ & 0xff;
if (cmp_type < ARRAY_SIZE (xop_cmp_op))
{
char suffix[3];
- char *p = mnemonicendp - 2;
+ char *p = ins->mnemonicendp - 2;
/* vpcom* can have both one- and two-lettered suffix. */
if (p[0] == 'm')
}
sprintf (p, "%s%s", xop_cmp_op[cmp_type].name, suffix);
- mnemonicendp += xop_cmp_op[cmp_type].len;
+ ins->mnemonicendp += xop_cmp_op[cmp_type].len;
}
else
{
/* We have a reserved extension byte. Output it directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, cmp_type);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, cmp_type);
+ oappend_maybe_intel (ins, ins->scratchbuf);
+ ins->scratchbuf[0] = '\0';
}
}
};
static void
-PCLMUL_Fixup (int bytemode ATTRIBUTE_UNUSED,
+PCLMUL_Fixup (instr_info *ins, int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
{
unsigned int pclmul_type;
- FETCH_DATA (the_info, codep + 1);
- pclmul_type = *codep++ & 0xff;
+ FETCH_DATA (ins->info, ins->codep + 1);
+ pclmul_type = *ins->codep++ & 0xff;
switch (pclmul_type)
{
case 0x10:
}
if (pclmul_type < ARRAY_SIZE (pclmul_op))
{
- char suffix [4];
- char *p = mnemonicendp - 3;
+ char suffix[4];
+ char *p = ins->mnemonicendp - 3;
suffix[0] = p[0];
suffix[1] = p[1];
suffix[2] = p[2];
suffix[3] = '\0';
sprintf (p, "%s%s", pclmul_op[pclmul_type].name, suffix);
- mnemonicendp += pclmul_op[pclmul_type].len;
+ ins->mnemonicendp += pclmul_op[pclmul_type].len;
}
else
{
/* We have a reserved extension byte. Output it directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, pclmul_type);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
- }
-}
-
-static void
-MOVBE_Fixup (int bytemode, int sizeflag)
-{
- /* Add proper suffix to "movbe". */
- char *p = mnemonicendp;
-
- switch (bytemode)
- {
- case v_mode:
- if (intel_syntax)
- goto skip;
-
- USED_REX (REX_W);
- if (sizeflag & SUFFIX_ALWAYS)
- {
- if (rex & REX_W)
- *p++ = 'q';
- else
- {
- if (sizeflag & DFLAG)
- *p++ = 'l';
- else
- *p++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- }
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
+ ins->scratchbuf[0] = '$';
+ print_operand_value (ins, ins->scratchbuf + 1, 1, pclmul_type);
+ oappend_maybe_intel (ins, ins->scratchbuf);
+ ins->scratchbuf[0] = '\0';
}
- mnemonicendp = p;
- *p = '\0';
-
- skip:
- OP_M (bytemode, sizeflag);
}
static void
-MOVSXD_Fixup (int bytemode, int sizeflag)
+MOVSXD_Fixup (instr_info *ins, int bytemode, int sizeflag)
{
/* Add proper suffix to "movsxd". */
- char *p = mnemonicendp;
+ char *p = ins->mnemonicendp;
switch (bytemode)
{
case movsxd_mode:
- if (intel_syntax)
+ if (!ins->intel_syntax)
{
- *p++ = 'x';
- *p++ = 'd';
- goto skip;
+ USED_REX (REX_W);
+ if (ins->rex & REX_W)
+ {
+ *p++ = 'l';
+ *p++ = 'q';
+ break;
+ }
}
- USED_REX (REX_W);
- if (rex & REX_W)
- {
- *p++ = 'l';
- *p++ = 'q';
- }
- else
- {
- *p++ = 'x';
- *p++ = 'd';
- }
+ *p++ = 'x';
+ *p++ = 'd';
break;
default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
+ oappend (ins, INTERNAL_DISASSEMBLER_ERROR);
break;
}
- skip:
- mnemonicendp = p;
+ ins->mnemonicendp = p;
*p = '\0';
- OP_E (bytemode, sizeflag);
+ OP_E (ins, bytemode, sizeflag);
}
static void
-OP_LWPCB_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+DistinctDest_Fixup (instr_info *ins, int bytemode, int sizeflag)
{
- int reg;
- const char **names;
-
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- if (rex & REX_W)
- names = names64;
- else
- names = names32;
-
- reg = modrm.rm;
- USED_REX (REX_B);
- if (rex & REX_B)
- reg += 8;
-
- oappend (names[reg]);
-}
+ unsigned int reg = ins->vex.register_specifier;
+ unsigned int modrm_reg = ins->modrm.reg;
+ unsigned int modrm_rm = ins->modrm.rm;
+
+ /* Calc destination register number. */
+ if (ins->rex & REX_R)
+ modrm_reg += 8;
+ if (!ins->vex.r)
+ modrm_reg += 16;
+
+ /* Calc src1 register number. */
+ if (ins->address_mode != mode_64bit)
+ reg &= 7;
+ else if (ins->vex.evex && !ins->vex.v)
+ reg += 16;
-static void
-OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
-{
- const char **names;
- unsigned int reg = vex.register_specifier;
- vex.register_specifier = 0;
+ /* Calc src2 register number. */
+ if (ins->modrm.mod == 3)
+ {
+ if (ins->rex & REX_B)
+ modrm_rm += 8;
+ if (ins->rex & REX_X)
+ modrm_rm += 16;
+ }
- if (rex & REX_W)
- names = names64;
+ /* Destination and source registers must be distinct, output bad if
+ dest == src1 or dest == src2. */
+ if (modrm_reg == reg
+ || (ins->modrm.mod == 3
+ && modrm_reg == modrm_rm))
+ {
+ oappend (ins, "(bad)");
+ }
else
- names = names32;
-
- if (address_mode != mode_64bit)
- reg &= 7;
- oappend (names[reg]);
+ OP_XMM (ins, bytemode, sizeflag);
}
static void
-OP_Mask (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
- if (!vex.evex
- || (bytemode != mask_mode && bytemode != mask_bd_mode))
- abort ();
+ if (ins->modrm.mod != 3 || !ins->vex.b)
+ return;
- USED_REX (REX_R);
- if ((rex & REX_R) != 0 || !vex.r)
+ switch (bytemode)
{
- BadOp ();
- return;
+ case evex_rounding_64_mode:
+ if (ins->address_mode != mode_64bit || !ins->vex.w)
+ return;
+ /* Fall through. */
+ case evex_rounding_mode:
+ ins->evex_used |= EVEX_b_used;
+ oappend (ins, names_rounding[ins->vex.ll]);
+ break;
+ case evex_sae_mode:
+ ins->evex_used |= EVEX_b_used;
+ oappend (ins, "{");
+ break;
+ default:
+ abort ();
}
-
- oappend (names_mask [modrm.reg]);
-}
-
-static void
-OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
-{
- if (modrm.mod == 3 && vex.b)
- switch (bytemode)
- {
- case evex_rounding_64_mode:
- if (address_mode != mode_64bit)
- {
- oappend ("(bad)");
- break;
- }
- /* Fall through. */
- case evex_rounding_mode:
- oappend (names_rounding[vex.ll]);
- break;
- case evex_sae_mode:
- oappend ("{sae}");
- break;
- default:
- abort ();
- break;
- }
+ oappend (ins, "sae}");
}
projects / binutils-gdb.git / blobdiff