-/* Copyright 2007, 2008, 2009
- Free Software Foundation, Inc.
+/* Copyright (C) 2007-2016 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
static initializer cpu_flag_init[] =
{
{ "CPU_UNKNOWN_FLAGS",
- "~CpuL1OM" },
+ "~(CpuL1OM|CpuK1OM)" },
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
- { "CPU_GENERIC64_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
+ { "CPU_GENERIC64_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu387" },
{ "CPU_I686_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687" },
+ { "CPU_PENTIUMPRO_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop" },
{ "CPU_P2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuMMX" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX" },
{ "CPU_P3_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuMMX|CpuSSE" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE" },
{ "CPU_P4_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuMMX|CpuSSE|CpuSSE2" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2" },
{ "CPU_NOCONA_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM|CpuCX16" },
{ "CPU_CORE_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuCX16" },
{ "CPU_CORE2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM|CpuCX16" },
{ "CPU_COREI7_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM|CpuCX16" },
{ "CPU_K6_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
{ "CPU_K6_2_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" },
{ "CPU_ATHLON_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuMMX|Cpu3dnow|Cpu3dnowA" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA" },
{ "CPU_K8_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
{ "CPU_AMDFAM10_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
+ { "CPU_BDVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+ { "CPU_BDVER2_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+ { "CPU_BDVER3_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" },
+ { "CPU_BDVER4_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
+ { "CPU_ZNVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
+ { "CPU_BTVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
+ { "CPU_BTVER2_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
"Cpu8087|Cpu287|Cpu387|Cpu687|CpuFISTTP" },
{ "CPU_CLFLUSH_FLAGS",
"CpuClflush" },
+ { "CPU_NOP_FLAGS",
+ "CpuNop" },
{ "CPU_SYSCALL_FLAGS",
"CpuSYSCALL" },
{ "CPU_MMX_FLAGS",
{ "CPU_SSE4_2_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
{ "CPU_ANY_SSE_FLAGS",
- "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX" },
+ "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" },
{ "CPU_VMX_FLAGS",
"CpuVMX" },
{ "CPU_SMX_FLAGS",
"CpuSMX" },
{ "CPU_XSAVE_FLAGS",
"CpuXsave" },
+ { "CPU_XSAVEOPT_FLAGS",
+ "CpuXsaveopt" },
{ "CPU_AES_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
{ "CPU_PCLMUL_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuABM|CpuAVX|CpuFMA4|CpuXOP" },
{ "CPU_LWP_FLAGS",
"CpuLWP" },
+ { "CPU_BMI_FLAGS",
+ "CpuBMI" },
+ { "CPU_TBM_FLAGS",
+ "CpuTBM" },
{ "CPU_MOVBE_FLAGS",
"CpuMovbe" },
+ { "CPU_CX16_FLAGS",
+ "CpuCX16" },
{ "CPU_RDTSCP_FLAGS",
"CpuRdtscp" },
{ "CPU_EPT_FLAGS",
"CpuEPT" },
+ { "CPU_FSGSBASE_FLAGS",
+ "CpuFSGSBase" },
+ { "CPU_RDRND_FLAGS",
+ "CpuRdRnd" },
+ { "CPU_F16C_FLAGS",
+ "CpuF16C" },
+ { "CPU_BMI2_FLAGS",
+ "CpuBMI2" },
+ { "CPU_LZCNT_FLAGS",
+ "CpuLZCNT" },
+ { "CPU_HLE_FLAGS",
+ "CpuHLE" },
+ { "CPU_RTM_FLAGS",
+ "CpuRTM" },
+ { "CPU_INVPCID_FLAGS",
+ "CpuINVPCID" },
+ { "CPU_VMFUNC_FLAGS",
+ "CpuVMFUNC" },
{ "CPU_3DNOW_FLAGS",
"CpuMMX|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
"CpuABM" },
{ "CPU_AVX_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
+ { "CPU_AVX2_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2" },
+ { "CPU_AVX512F_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F" },
+ { "CPU_AVX512CD_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD" },
+ { "CPU_AVX512ER_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512ER" },
+ { "CPU_AVX512PF_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512PF" },
{ "CPU_ANY_AVX_FLAGS",
- "CpuAVX" },
+ "CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" },
{ "CPU_L1OM_FLAGS",
"unknown" },
+ { "CPU_K1OM_FLAGS",
+ "unknown" },
+ { "CPU_IAMCU_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
+ { "CPU_IAMCU_COMPAT_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuNo64|CpuNop" },
+ { "CPU_ADX_FLAGS",
+ "CpuADX" },
+ { "CPU_RDSEED_FLAGS",
+ "CpuRdSeed" },
+ { "CPU_PRFCHW_FLAGS",
+ "CpuPRFCHW" },
+ { "CPU_SMAP_FLAGS",
+ "CpuSMAP" },
+ { "CPU_MPX_FLAGS",
+ "CpuMPX" },
+ { "CPU_SHA_FLAGS",
+ "CpuSHA" },
+ { "CPU_CLFLUSHOPT_FLAGS",
+ "CpuClflushOpt" },
+ { "CPU_XSAVES_FLAGS",
+ "CpuXSAVES" },
+ { "CPU_XSAVEC_FLAGS",
+ "CpuXSAVEC" },
+ { "CPU_PREFETCHWT1_FLAGS",
+ "CpuPREFETCHWT1" },
+ { "CPU_SE1_FLAGS",
+ "CpuSE1" },
+ { "CPU_AVX512DQ_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512DQ" },
+ { "CPU_AVX512BW_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512BW" },
+ { "CPU_AVX512VL_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VL" },
+ { "CPU_CLWB_FLAGS",
+ "CpuCLWB" },
+ { "CPU_PCOMMIT_FLAGS",
+ "CpuPCOMMIT" },
+ { "CPU_AVX512IFMA_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512IFMA" },
+ { "CPU_AVX512VBMI_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" },
+ { "CPU_CLZERO_FLAGS",
+ "CpuCLZERO" },
+ { "CPU_MWAITX_FLAGS",
+ "CpuMWAITX" },
+ { "CPU_OSPKE_FLAGS",
+ "CpuOSPKE" },
};
static initializer operand_type_init[] =
"RegXMM" },
{ "OPERAND_TYPE_REGYMM",
"RegYMM" },
+ { "OPERAND_TYPE_REGZMM",
+ "RegZMM" },
+ { "OPERAND_TYPE_REGMASK",
+ "RegMask" },
{ "OPERAND_TYPE_ESSEG",
"EsSeg" },
{ "OPERAND_TYPE_ACC32",
"Imm16|Imm32S" },
{ "OPERAND_TYPE_IMM16_32_32S",
"Imm16|Imm32|Imm32S" },
+ { "OPERAND_TYPE_IMM32_64",
+ "Imm32|Imm64" },
{ "OPERAND_TYPE_IMM32_32S_DISP32",
"Imm32|Imm32S|Disp32" },
{ "OPERAND_TYPE_IMM64_DISP64",
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
+ { "OPERAND_TYPE_VEC_IMM4",
+ "Vec_Imm4" },
+ { "OPERAND_TYPE_REGBND",
+ "RegBND" },
+ { "OPERAND_TYPE_VEC_DISP8",
+ "Vec_Disp8" },
};
typedef struct bitfield
BITFIELD (Cpu586),
BITFIELD (Cpu686),
BITFIELD (CpuClflush),
+ BITFIELD (CpuNop),
BITFIELD (CpuSYSCALL),
BITFIELD (Cpu8087),
BITFIELD (Cpu287),
BITFIELD (CpuSSE4_1),
BITFIELD (CpuSSE4_2),
BITFIELD (CpuAVX),
+ BITFIELD (CpuAVX2),
+ BITFIELD (CpuAVX512F),
+ BITFIELD (CpuAVX512CD),
+ BITFIELD (CpuAVX512ER),
+ BITFIELD (CpuAVX512PF),
+ BITFIELD (CpuAVX512VL),
+ BITFIELD (CpuAVX512DQ),
+ BITFIELD (CpuAVX512BW),
BITFIELD (CpuL1OM),
+ BITFIELD (CpuK1OM),
+ BITFIELD (CpuIAMCU),
BITFIELD (CpuSSE4a),
BITFIELD (Cpu3dnow),
BITFIELD (Cpu3dnowA),
BITFIELD (CpuSMX),
BITFIELD (CpuABM),
BITFIELD (CpuXsave),
+ BITFIELD (CpuXsaveopt),
BITFIELD (CpuAES),
BITFIELD (CpuPCLMUL),
BITFIELD (CpuFMA),
BITFIELD (CpuFMA4),
BITFIELD (CpuXOP),
BITFIELD (CpuLWP),
+ BITFIELD (CpuBMI),
+ BITFIELD (CpuTBM),
BITFIELD (CpuLM),
BITFIELD (CpuMovbe),
+ BITFIELD (CpuCX16),
BITFIELD (CpuEPT),
BITFIELD (CpuRdtscp),
+ BITFIELD (CpuFSGSBase),
+ BITFIELD (CpuRdRnd),
+ BITFIELD (CpuF16C),
+ BITFIELD (CpuBMI2),
+ BITFIELD (CpuLZCNT),
+ BITFIELD (CpuHLE),
+ BITFIELD (CpuRTM),
+ BITFIELD (CpuINVPCID),
+ BITFIELD (CpuVMFUNC),
+ BITFIELD (CpuRDSEED),
+ BITFIELD (CpuADX),
+ BITFIELD (CpuPRFCHW),
+ BITFIELD (CpuSMAP),
+ BITFIELD (CpuSHA),
+ BITFIELD (CpuVREX),
+ BITFIELD (CpuClflushOpt),
+ BITFIELD (CpuXSAVES),
+ BITFIELD (CpuXSAVEC),
+ BITFIELD (CpuPREFETCHWT1),
+ BITFIELD (CpuSE1),
+ BITFIELD (CpuCLWB),
+ BITFIELD (CpuPCOMMIT),
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
+ BITFIELD (CpuMPX),
+ BITFIELD (CpuAVX512IFMA),
+ BITFIELD (CpuAVX512VBMI),
+ BITFIELD (CpuMWAITX),
+ BITFIELD (CpuCLZERO),
+ BITFIELD (CpuOSPKE),
+ BITFIELD (CpuAMD64),
+ BITFIELD (CpuIntel64),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
BITFIELD (Size16),
BITFIELD (Size32),
BITFIELD (Size64),
+ BITFIELD (CheckRegSize),
BITFIELD (IgnoreSize),
BITFIELD (DefaultSize),
BITFIELD (No_bSuf),
BITFIELD (No_ldSuf),
BITFIELD (FWait),
BITFIELD (IsString),
+ BITFIELD (BNDPrefixOk),
BITFIELD (IsLockable),
BITFIELD (RegKludge),
BITFIELD (FirstXmm0),
BITFIELD (Implicit1stXmm0),
+ BITFIELD (RepPrefixOk),
+ BITFIELD (HLEPrefixOk),
BITFIELD (ToDword),
BITFIELD (ToQword),
BITFIELD (AddrPrefixOp0),
BITFIELD (Rex64),
BITFIELD (Ugh),
BITFIELD (Vex),
- BITFIELD (VexNDS),
- BITFIELD (VexNDD),
- BITFIELD (VexLWP),
+ BITFIELD (VexVVVV),
BITFIELD (VexW),
BITFIELD (VexOpcode),
BITFIELD (VexSources),
BITFIELD (VexImmExt),
+ BITFIELD (VecSIB),
BITFIELD (SSE2AVX),
BITFIELD (NoAVX),
+ BITFIELD (EVex),
+ BITFIELD (Masking),
+ BITFIELD (VecESize),
+ BITFIELD (Broadcast),
+ BITFIELD (StaticRounding),
+ BITFIELD (SAE),
+ BITFIELD (Disp8MemShift),
+ BITFIELD (NoDefMask),
BITFIELD (OldGcc),
BITFIELD (ATTMnemonic),
BITFIELD (ATTSyntax),
BITFIELD (RegMMX),
BITFIELD (RegXMM),
BITFIELD (RegYMM),
+ BITFIELD (RegZMM),
+ BITFIELD (RegMask),
+ BITFIELD (Imm1),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Imm16),
BITFIELD (Imm32),
BITFIELD (Imm32S),
BITFIELD (Imm64),
- BITFIELD (Imm1),
BITFIELD (BaseIndex),
BITFIELD (Disp8),
BITFIELD (Disp16),
BITFIELD (Tbyte),
BITFIELD (Xmmword),
BITFIELD (Ymmword),
+ BITFIELD (Zmmword),
BITFIELD (Unspecified),
BITFIELD (Anysize),
+ BITFIELD (Vec_Imm4),
+ BITFIELD (RegBND),
+ BITFIELD (Vec_Disp8),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
fail (const char *message, ...)
{
va_list args;
-
+
va_start (args, message);
fprintf (stderr, _("%s: Error: "), program_name);
vfprintf (stderr, message, args);
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
-/* Copyright 2007, 2008, 2009\n\
- Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2016 Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
\n\
*str = '\0';
remove_trailing_whitespaces (p);
- *next = str + 1;
+ *next = str + 1;
if (p >= last)
abort ();
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", flags[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", flags[i].value);
+ else
+ fprintf (table, "%d,", flags[i].value);
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", modifier[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", modifier[i].value);
+ else
+ fprintf (table, "%d,", modifier[i].value);
if (((i + 1) % 20) == 0)
fprintf (table, "\n ");
}
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", types[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", types[i].value);
+ else
+ fprintf (table, "%d,", types[i].value);
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
if (macro)
- fprintf (table, "\\\n%s", indent);
+ fprintf (table, " \\\n%s", indent);
else
fprintf (table, "\n%s", indent);
}
process_i386_cpu_flag (table, "0", 0, ",", " ", -1);
process_i386_opcode_modifier (table, "0", -1);
-
+
fprintf (table, " { ");
process_i386_operand_type (table, "0", 0, "\t ", -1);
fprintf (table, " } }\n");
/* Program options. */
#define OPTION_SRCDIR 200
-struct option long_options[] =
+struct option long_options[] =
{
{"srcdir", required_argument, NULL, OPTION_SRCDIR},
{"debug", no_argument, NULL, 'd'},
char *srcdir = NULL;
int c;
FILE *table;
-
+
program_name = *argv;
xmalloc_set_program_name (program_name);
if (optind != argc)
usage (stdout, 1);
- if (srcdir != NULL)
+ if (srcdir != NULL)
if (chdir (srcdir) != 0)
fail (_("unable to change directory to \"%s\", errno = %s\n"),
srcdir, xstrerror (errno));