-/* Copyright 2007, 2008, 2009, 2010, 2011, 2012, 2013
- Free Software Foundation, Inc.
+/* Copyright (C) 2007-2016 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
{ "CPU_K6_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
{ "CPU_K6_2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuNop|CpuMMX|Cpu3dnow" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" },
{ "CPU_ATHLON_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA" },
{ "CPU_K8_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
{ "CPU_BDVER3_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" },
+ { "CPU_BDVER4_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
+ { "CPU_ZNVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
{ "CPU_BTVER1_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
{ "CPU_BTVER2_FLAGS",
"unknown" },
{ "CPU_K1OM_FLAGS",
"unknown" },
+ { "CPU_IAMCU_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
+ { "CPU_IAMCU_COMPAT_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuNo64|CpuNop" },
{ "CPU_ADX_FLAGS",
"CpuADX" },
{ "CPU_RDSEED_FLAGS",
"CpuMPX" },
{ "CPU_SHA_FLAGS",
"CpuSHA" },
+ { "CPU_CLFLUSHOPT_FLAGS",
+ "CpuClflushOpt" },
+ { "CPU_XSAVES_FLAGS",
+ "CpuXSAVES" },
+ { "CPU_XSAVEC_FLAGS",
+ "CpuXSAVEC" },
+ { "CPU_PREFETCHWT1_FLAGS",
+ "CpuPREFETCHWT1" },
+ { "CPU_SE1_FLAGS",
+ "CpuSE1" },
+ { "CPU_AVX512DQ_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512DQ" },
+ { "CPU_AVX512BW_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512BW" },
+ { "CPU_AVX512VL_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VL" },
+ { "CPU_CLWB_FLAGS",
+ "CpuCLWB" },
+ { "CPU_PCOMMIT_FLAGS",
+ "CpuPCOMMIT" },
+ { "CPU_AVX512IFMA_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512IFMA" },
+ { "CPU_AVX512VBMI_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" },
+ { "CPU_CLZERO_FLAGS",
+ "CpuCLZERO" },
+ { "CPU_MWAITX_FLAGS",
+ "CpuMWAITX" },
+ { "CPU_OSPKE_FLAGS",
+ "CpuOSPKE" },
};
static initializer operand_type_init[] =
BITFIELD (CpuAVX512CD),
BITFIELD (CpuAVX512ER),
BITFIELD (CpuAVX512PF),
+ BITFIELD (CpuAVX512VL),
+ BITFIELD (CpuAVX512DQ),
+ BITFIELD (CpuAVX512BW),
BITFIELD (CpuL1OM),
BITFIELD (CpuK1OM),
+ BITFIELD (CpuIAMCU),
BITFIELD (CpuSSE4a),
BITFIELD (Cpu3dnow),
BITFIELD (Cpu3dnowA),
BITFIELD (CpuSMAP),
BITFIELD (CpuSHA),
BITFIELD (CpuVREX),
+ BITFIELD (CpuClflushOpt),
+ BITFIELD (CpuXSAVES),
+ BITFIELD (CpuXSAVEC),
+ BITFIELD (CpuPREFETCHWT1),
+ BITFIELD (CpuSE1),
+ BITFIELD (CpuCLWB),
+ BITFIELD (CpuPCOMMIT),
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
BITFIELD (CpuMPX),
+ BITFIELD (CpuAVX512IFMA),
+ BITFIELD (CpuAVX512VBMI),
+ BITFIELD (CpuMWAITX),
+ BITFIELD (CpuCLZERO),
+ BITFIELD (CpuOSPKE),
+ BITFIELD (CpuAMD64),
+ BITFIELD (CpuIntel64),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
-/* Copyright 2007, 2008, 2009, 2010, 2011, 2012, 2013\n\
- Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2016 Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
\n\
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", flags[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", flags[i].value);
+ else
+ fprintf (table, "%d,", flags[i].value);
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", modifier[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", modifier[i].value);
+ else
+ fprintf (table, "%d,", modifier[i].value);
if (((i + 1) % 20) == 0)
fprintf (table, "\n ");
}
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", types[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", types[i].value);
+ else
+ fprintf (table, "%d,", types[i].value);
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
if (macro)
- fprintf (table, "\\\n%s", indent);
+ fprintf (table, " \\\n%s", indent);
else
fprintf (table, "\n%s", indent);
}