-/* Copyright 2007, 2008, 2009
- Free Software Foundation, Inc.
+/* Copyright (C) 2007-2016 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
const char *init;
} initializer;
-static initializer cpu_flag_init [] =
+static initializer cpu_flag_init[] =
{
{ "CPU_UNKNOWN_FLAGS",
- "unknown" },
+ "~(CpuL1OM|CpuK1OM)" },
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
- { "CPU_GENERIC64_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
+ { "CPU_GENERIC64_FLAGS",
+ "CPU_PENTIUMPRO_FLAGS|CpuClflush|CpuSYSCALL|CPU_MMX_FLAGS|CPU_SSE2_FLAGS|CpuLM" },
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
"Cpu186" },
{ "CPU_I286_FLAGS",
- "Cpu186|Cpu286" },
+ "CPU_I186_FLAGS|Cpu286" },
{ "CPU_I386_FLAGS",
- "Cpu186|Cpu286|Cpu386" },
+ "CPU_I286_FLAGS|Cpu386" },
{ "CPU_I486_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486" },
+ "CPU_I386_FLAGS|Cpu486" },
{ "CPU_I586_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
+ "CPU_I486_FLAGS|CPU_387_FLAGS|Cpu586" },
{ "CPU_I686_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686" },
+ "CPU_I586_FLAGS|Cpu686|Cpu687" },
+ { "CPU_PENTIUMPRO_FLAGS",
+ "CPU_I686_FLAGS|CpuNop" },
{ "CPU_P2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuMMX" },
+ "CPU_PENTIUMPRO_FLAGS|CPU_MMX_FLAGS" },
{ "CPU_P3_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuMMX|CpuSSE" },
+ "CPU_P2_FLAGS|CPU_SSE_FLAGS" },
{ "CPU_P4_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2" },
+ "CPU_P3_FLAGS|CpuClflush|CPU_SSE2_FLAGS" },
{ "CPU_NOCONA_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CPU_SSE3_FLAGS|CpuCX16" },
{ "CPU_CORE_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
+ "CPU_P4_FLAGS|CpuFISTTP|CPU_SSE3_FLAGS|CpuCX16" },
{ "CPU_CORE2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
+ "CPU_NOCONA_FLAGS|CPU_SSSE3_FLAGS" },
+ { "CPU_COREI7_FLAGS",
+ "CPU_CORE2_FLAGS|CPU_SSE4_2_FLAGS|CpuRdtscp" },
{ "CPU_K6_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuK6|CpuMMX" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CPU_MMX_FLAGS" },
{ "CPU_K6_2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuK6|CpuMMX|Cpu3dnow" },
+ "CPU_K6_FLAGS|Cpu3dnow" },
{ "CPU_ATHLON_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuMMX|Cpu3dnow|Cpu3dnowA" },
+ "CPU_K6_2_FLAGS|Cpu686|Cpu687|CpuNop|Cpu3dnowA" },
{ "CPU_K8_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuRdtscp|CpuLM" },
+ "CPU_ATHLON_FLAGS|CpuRdtscp|CPU_SSE2_FLAGS|CpuLM" },
{ "CPU_AMDFAM10_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuRdtscp|CpuLM" },
+ "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuABM" },
+ { "CPU_BDVER1_FLAGS",
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_SSE4_2_FLAGS|CpuSSE4A|CpuABM|CpuFMA4|CpuXOP|CpuLWP|CpuSVME|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+ { "CPU_BDVER2_FLAGS",
+ "CPU_BDVER1_FLAGS|CpuFMA|CpuBMI|CpuTBM|CpuF16C" },
+ { "CPU_BDVER3_FLAGS",
+ "CPU_BDVER2_FLAGS|CpuXsaveopt|CpuFSGSBase" },
+ { "CPU_BDVER4_FLAGS",
+ "CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
+ { "CPU_ZNVER1_FLAGS",
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_SSE4_2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
+ { "CPU_BTVER1_FLAGS",
+ "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
+ { "CPU_BTVER2_FLAGS",
+ "CPU_BTVER1_FLAGS|CPU_SSE4_2_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW" },
+ { "CPU_8087_FLAGS",
+ "Cpu8087" },
+ { "CPU_287_FLAGS",
+ "CPU_8087_FLAGS|Cpu287" },
+ { "CPU_387_FLAGS",
+ "CPU_287_FLAGS|Cpu387" },
+ { "CPU_687_FLAGS",
+ "CPU_387_FLAGS|Cpu687" },
+ { "CPU_CLFLUSH_FLAGS",
+ "CpuClflush" },
+ { "CPU_NOP_FLAGS",
+ "CpuNop" },
+ { "CPU_SYSCALL_FLAGS",
+ "CpuSYSCALL" },
{ "CPU_MMX_FLAGS",
- "CpuMMX" },
+ "CpuRegMMX|CpuMMX" },
{ "CPU_SSE_FLAGS",
- "CpuMMX|CpuSSE" },
+ "CpuRegXMM|CpuSSE" },
{ "CPU_SSE2_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2" },
+ "CPU_SSE_FLAGS|CpuSSE2" },
{ "CPU_SSE3_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
+ "CPU_SSE2_FLAGS|CpuSSE3" },
{ "CPU_SSSE3_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3" },
+ "CPU_SSE3_FLAGS|CpuSSSE3" },
{ "CPU_SSE4_1_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1" },
+ "CPU_SSSE3_FLAGS|CpuSSE4_1" },
{ "CPU_SSE4_2_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
+ "CPU_SSE4_1_FLAGS|CpuSSE4_2" },
{ "CPU_VMX_FLAGS",
"CpuVMX" },
{ "CPU_SMX_FLAGS",
"CpuSMX" },
{ "CPU_XSAVE_FLAGS",
"CpuXsave" },
+ { "CPU_XSAVEOPT_FLAGS",
+ "CPU_XSAVE_FLAGS|CpuXsaveopt" },
{ "CPU_AES_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
+ "CPU_SSE2_FLAGS|CpuAES" },
{ "CPU_PCLMUL_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuPCLMUL" },
+ "CPU_SSE2_FLAGS|CpuPCLMUL" },
{ "CPU_FMA_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" },
+ "CPU_AVX_FLAGS|CpuFMA" },
+ { "CPU_FMA4_FLAGS",
+ "CPU_AVX_FLAGS|CpuFMA4" },
+ { "CPU_XOP_FLAGS",
+ "CPU_SSE4A_FLAGS|CPU_FMA4_FLAGS|CpuXOP" },
+ { "CPU_LWP_FLAGS",
+ "CpuLWP" },
+ { "CPU_BMI_FLAGS",
+ "CpuBMI" },
+ { "CPU_TBM_FLAGS",
+ "CpuTBM" },
{ "CPU_MOVBE_FLAGS",
"CpuMovbe" },
+ { "CPU_CX16_FLAGS",
+ "CpuCX16" },
{ "CPU_RDTSCP_FLAGS",
"CpuRdtscp" },
{ "CPU_EPT_FLAGS",
"CpuEPT" },
+ { "CPU_FSGSBASE_FLAGS",
+ "CpuFSGSBase" },
+ { "CPU_RDRND_FLAGS",
+ "CpuRdRnd" },
+ { "CPU_F16C_FLAGS",
+ "CPU_AVX_FLAGS|CpuF16C" },
+ { "CPU_BMI2_FLAGS",
+ "CpuBMI2" },
+ { "CPU_LZCNT_FLAGS",
+ "CpuLZCNT" },
+ { "CPU_HLE_FLAGS",
+ "CpuHLE" },
+ { "CPU_RTM_FLAGS",
+ "CpuRTM" },
+ { "CPU_INVPCID_FLAGS",
+ "CpuINVPCID" },
+ { "CPU_VMFUNC_FLAGS",
+ "CpuVMFUNC" },
{ "CPU_3DNOW_FLAGS",
- "CpuMMX|Cpu3dnow" },
+ "CPU_MMX_FLAGS|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
- "CpuMMX|Cpu3dnow|Cpu3dnowA" },
+ "CPU_3DNOW_FLAGS|Cpu3dnowA" },
{ "CPU_PADLOCK_FLAGS",
"CpuPadLock" },
{ "CPU_SVME_FLAGS",
"CpuSVME" },
{ "CPU_SSE4A_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" },
+ "CPU_SSE3_FLAGS|CpuSSE4a" },
{ "CPU_ABM_FLAGS",
"CpuABM" },
- { "CPU_SSE5_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5"},
{ "CPU_AVX_FLAGS",
- "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
+ "CPU_SSE4_2_FLAGS|CpuRegYMM|CpuAVX" },
+ { "CPU_AVX2_FLAGS",
+ "CPU_AVX_FLAGS|CpuAVX2" },
+ /* Don't use CPU_AVX2_FLAGS on CPU_AVX512F_FLAGS since AVX512F doesn't
+ support YMM registers. */
+ { "CPU_AVX512F_FLAGS",
+ "CpuVREX|CPU_SSE4_2_FLAGS|CpuRegZMM|CpuRegMask|CpuAVX|CpuAVX2|CpuAVX512F" },
+ { "CPU_AVX512CD_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512CD" },
+ { "CPU_AVX512ER_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512ER" },
+ { "CPU_AVX512PF_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512PF" },
+ { "CPU_AVX512DQ_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512DQ" },
+ { "CPU_AVX512BW_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512BW" },
+ { "CPU_AVX512VL_FLAGS",
+ /* Use CPU_AVX2_FLAGS on CPU_AVX512VL_FLAGS since AVX512VL supports YMM
+ registers. */
+ "CPU_AVX512F_FLAGS|CPU_AVX2_FLAGS|CpuAVX512VL" },
+ { "CPU_AVX512IFMA_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512IFMA" },
+ { "CPU_AVX512VBMI_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512VBMI" },
+ { "CPU_AVX512_4FMAPS_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512_4FMAPS" },
+ { "CPU_AVX512_4VNNIW_FLAGS",
+ "CPU_AVX512F_FLAGS|CpuAVX512_4VNNIW" },
+ { "CPU_L1OM_FLAGS",
+ "unknown" },
+ { "CPU_K1OM_FLAGS",
+ "unknown" },
+ { "CPU_IAMCU_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
+ { "CPU_ADX_FLAGS",
+ "CpuADX" },
+ { "CPU_RDSEED_FLAGS",
+ "CpuRdSeed" },
+ { "CPU_PRFCHW_FLAGS",
+ "CpuPRFCHW" },
+ { "CPU_SMAP_FLAGS",
+ "CpuSMAP" },
+ { "CPU_MPX_FLAGS",
+ "CpuMPX" },
+ { "CPU_SHA_FLAGS",
+ "CPU_SSE2_FLAGS|CpuSHA" },
+ { "CPU_CLFLUSHOPT_FLAGS",
+ "CpuClflushOpt" },
+ { "CPU_XSAVES_FLAGS",
+ "CPU_XSAVE_FLAGS|CpuXSAVES" },
+ { "CPU_XSAVEC_FLAGS",
+ "CPU_XSAVE_FLAGS|CpuXSAVEC" },
+ { "CPU_PREFETCHWT1_FLAGS",
+ "CpuPREFETCHWT1" },
+ { "CPU_SE1_FLAGS",
+ "CpuSE1" },
+ { "CPU_CLWB_FLAGS",
+ "CpuCLWB" },
+ { "CPU_CLZERO_FLAGS",
+ "CpuCLZERO" },
+ { "CPU_MWAITX_FLAGS",
+ "CpuMWAITX" },
+ { "CPU_OSPKE_FLAGS",
+ "CpuOSPKE" },
+ { "CPU_RDPID_FLAGS",
+ "CpuRDPID" },
+ { "CPU_PTWRITE_FLAGS",
+ "CpuPTWRITE" },
+ { "CPU_ANY_X87_FLAGS",
+ "CPU_ANY_287_FLAGS|Cpu8087" },
+ { "CPU_ANY_287_FLAGS",
+ "CPU_ANY_387_FLAGS|Cpu287" },
+ { "CPU_ANY_387_FLAGS",
+ "CPU_ANY_687_FLAGS|Cpu387" },
+ { "CPU_ANY_687_FLAGS",
+ "Cpu687|CpuFISTTP" },
+ { "CPU_ANY_MMX_FLAGS",
+ "CPU_3DNOWA_FLAGS" },
+ { "CPU_ANY_SSE_FLAGS",
+ "CPU_ANY_SSE2_FLAGS|CpuSSE|CpuSSE4a" },
+ { "CPU_ANY_SSE2_FLAGS",
+ "CPU_ANY_SSE3_FLAGS|CpuSSE2" },
+ { "CPU_ANY_SSE3_FLAGS",
+ "CPU_ANY_SSSE3_FLAGS|CpuSSE3" },
+ { "CPU_ANY_SSSE3_FLAGS",
+ "CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" },
+ { "CPU_ANY_SSE4_1_FLAGS",
+ "CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" },
+ { "CPU_ANY_SSE4_2_FLAGS",
+ "CpuSSE4_2" },
+ { "CPU_ANY_AVX_FLAGS",
+ "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" },
+ { "CPU_ANY_AVX2_FLAGS",
+ "CpuAVX2" },
+ { "CPU_ANY_AVX512F_FLAGS",
+ "CpuVREX|CpuRegZMM|CpuRegMask|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512F" },
+ { "CPU_ANY_AVX512CD_FLAGS",
+ "CpuAVX512CD" },
+ { "CPU_ANY_AVX512ER_FLAGS",
+ "CpuAVX512ER" },
+ { "CPU_ANY_AVX512PF_FLAGS",
+ "CpuAVX512PF" },
+ { "CPU_ANY_AVX512DQ_FLAGS",
+ "CpuAVX512DQ" },
+ { "CPU_ANY_AVX512BW_FLAGS",
+ "CpuAVX512BW" },
+ { "CPU_ANY_AVX512VL_FLAGS",
+ "CpuAVX512VL" },
+ { "CPU_ANY_AVX512IFMA_FLAGS",
+ "CpuAVX512IFMA" },
+ { "CPU_ANY_AVX512VBMI_FLAGS",
+ "CpuAVX512VBMI" },
+ { "CPU_ANY_AVX512_4FMAPS_FLAGS",
+ "CpuAVX512_4FMAPS" },
+ { "CPU_ANY_AVX512_4VNNIW_FLAGS",
+ "CpuAVX512_4VNNIW" },
};
-static initializer operand_type_init [] =
+static initializer operand_type_init[] =
{
{ "OPERAND_TYPE_NONE",
"0" },
"RegXMM" },
{ "OPERAND_TYPE_REGYMM",
"RegYMM" },
+ { "OPERAND_TYPE_REGZMM",
+ "RegZMM" },
+ { "OPERAND_TYPE_REGMASK",
+ "RegMask" },
{ "OPERAND_TYPE_ESSEG",
"EsSeg" },
{ "OPERAND_TYPE_ACC32",
"Imm16|Imm32S" },
{ "OPERAND_TYPE_IMM16_32_32S",
"Imm16|Imm32|Imm32S" },
+ { "OPERAND_TYPE_IMM32_64",
+ "Imm32|Imm64" },
{ "OPERAND_TYPE_IMM32_32S_DISP32",
"Imm32|Imm32S|Disp32" },
{ "OPERAND_TYPE_IMM64_DISP64",
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
- { "OPERAND_TYPE_VEX_IMM4",
- "VEX_Imm4" },
+ { "OPERAND_TYPE_VEC_IMM4",
+ "Vec_Imm4" },
+ { "OPERAND_TYPE_REGBND",
+ "RegBND" },
+ { "OPERAND_TYPE_VEC_DISP8",
+ "Vec_Disp8" },
};
typedef struct bitfield
BITFIELD (Cpu486),
BITFIELD (Cpu586),
BITFIELD (Cpu686),
- BITFIELD (CpuP4),
- BITFIELD (CpuK6),
- BITFIELD (CpuK8),
+ BITFIELD (CpuClflush),
+ BITFIELD (CpuNop),
+ BITFIELD (CpuSYSCALL),
+ BITFIELD (Cpu8087),
+ BITFIELD (Cpu287),
+ BITFIELD (Cpu387),
+ BITFIELD (Cpu687),
+ BITFIELD (CpuFISTTP),
BITFIELD (CpuMMX),
BITFIELD (CpuSSE),
BITFIELD (CpuSSE2),
BITFIELD (CpuSSE4_1),
BITFIELD (CpuSSE4_2),
BITFIELD (CpuAVX),
+ BITFIELD (CpuAVX2),
+ BITFIELD (CpuAVX512F),
+ BITFIELD (CpuAVX512CD),
+ BITFIELD (CpuAVX512ER),
+ BITFIELD (CpuAVX512PF),
+ BITFIELD (CpuAVX512VL),
+ BITFIELD (CpuAVX512DQ),
+ BITFIELD (CpuAVX512BW),
+ BITFIELD (CpuL1OM),
+ BITFIELD (CpuK1OM),
+ BITFIELD (CpuIAMCU),
BITFIELD (CpuSSE4a),
- BITFIELD (CpuSSE5),
BITFIELD (Cpu3dnow),
BITFIELD (Cpu3dnowA),
BITFIELD (CpuPadLock),
BITFIELD (CpuSMX),
BITFIELD (CpuABM),
BITFIELD (CpuXsave),
+ BITFIELD (CpuXsaveopt),
BITFIELD (CpuAES),
BITFIELD (CpuPCLMUL),
BITFIELD (CpuFMA),
+ BITFIELD (CpuFMA4),
+ BITFIELD (CpuXOP),
+ BITFIELD (CpuLWP),
+ BITFIELD (CpuBMI),
+ BITFIELD (CpuTBM),
BITFIELD (CpuLM),
BITFIELD (CpuMovbe),
+ BITFIELD (CpuCX16),
BITFIELD (CpuEPT),
BITFIELD (CpuRdtscp),
+ BITFIELD (CpuFSGSBase),
+ BITFIELD (CpuRdRnd),
+ BITFIELD (CpuF16C),
+ BITFIELD (CpuBMI2),
+ BITFIELD (CpuLZCNT),
+ BITFIELD (CpuHLE),
+ BITFIELD (CpuRTM),
+ BITFIELD (CpuINVPCID),
+ BITFIELD (CpuVMFUNC),
+ BITFIELD (CpuRDSEED),
+ BITFIELD (CpuADX),
+ BITFIELD (CpuPRFCHW),
+ BITFIELD (CpuSMAP),
+ BITFIELD (CpuSHA),
+ BITFIELD (CpuVREX),
+ BITFIELD (CpuClflushOpt),
+ BITFIELD (CpuXSAVES),
+ BITFIELD (CpuXSAVEC),
+ BITFIELD (CpuPREFETCHWT1),
+ BITFIELD (CpuSE1),
+ BITFIELD (CpuCLWB),
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
+ BITFIELD (CpuMPX),
+ BITFIELD (CpuAVX512IFMA),
+ BITFIELD (CpuAVX512VBMI),
+ BITFIELD (CpuAVX512_4FMAPS),
+ BITFIELD (CpuAVX512_4VNNIW),
+ BITFIELD (CpuMWAITX),
+ BITFIELD (CpuCLZERO),
+ BITFIELD (CpuOSPKE),
+ BITFIELD (CpuRDPID),
+ BITFIELD (CpuPTWRITE),
+ BITFIELD (CpuRegMMX),
+ BITFIELD (CpuRegXMM),
+ BITFIELD (CpuRegYMM),
+ BITFIELD (CpuRegZMM),
+ BITFIELD (CpuRegMask),
#ifdef CpuUnused
BITFIELD (CpuUnused),
#endif
BITFIELD (Size16),
BITFIELD (Size32),
BITFIELD (Size64),
+ BITFIELD (CheckRegSize),
BITFIELD (IgnoreSize),
BITFIELD (DefaultSize),
BITFIELD (No_bSuf),
BITFIELD (No_ldSuf),
BITFIELD (FWait),
BITFIELD (IsString),
+ BITFIELD (BNDPrefixOk),
+ BITFIELD (IsLockable),
BITFIELD (RegKludge),
BITFIELD (FirstXmm0),
BITFIELD (Implicit1stXmm0),
- BITFIELD (ByteOkIntel),
+ BITFIELD (RepPrefixOk),
+ BITFIELD (HLEPrefixOk),
BITFIELD (ToDword),
BITFIELD (ToQword),
BITFIELD (AddrPrefixOp0),
BITFIELD (NoRex64),
BITFIELD (Rex64),
BITFIELD (Ugh),
- BITFIELD (Drex),
- BITFIELD (Drexv),
- BITFIELD (Drexc),
BITFIELD (Vex),
- BITFIELD (Vex256),
- BITFIELD (VexNDS),
- BITFIELD (VexNDD),
- BITFIELD (VexW0),
- BITFIELD (VexW1),
- BITFIELD (Vex0F),
- BITFIELD (Vex0F38),
- BITFIELD (Vex0F3A),
- BITFIELD (Vex3Sources),
+ BITFIELD (VexVVVV),
+ BITFIELD (VexW),
+ BITFIELD (VexOpcode),
+ BITFIELD (VexSources),
BITFIELD (VexImmExt),
+ BITFIELD (VecSIB),
BITFIELD (SSE2AVX),
BITFIELD (NoAVX),
+ BITFIELD (EVex),
+ BITFIELD (Masking),
+ BITFIELD (VecESize),
+ BITFIELD (Broadcast),
+ BITFIELD (StaticRounding),
+ BITFIELD (SAE),
+ BITFIELD (Disp8MemShift),
+ BITFIELD (NoDefMask),
+ BITFIELD (ImplicitQuadGroup),
BITFIELD (OldGcc),
BITFIELD (ATTMnemonic),
BITFIELD (ATTSyntax),
BITFIELD (IntelSyntax),
+ BITFIELD (AMD64),
+ BITFIELD (Intel64),
};
static bitfield operand_types[] =
BITFIELD (RegMMX),
BITFIELD (RegXMM),
BITFIELD (RegYMM),
+ BITFIELD (RegZMM),
+ BITFIELD (RegMask),
+ BITFIELD (Imm1),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Imm16),
BITFIELD (Imm32),
BITFIELD (Imm32S),
BITFIELD (Imm64),
- BITFIELD (Imm1),
BITFIELD (BaseIndex),
BITFIELD (Disp8),
BITFIELD (Disp16),
BITFIELD (Tbyte),
BITFIELD (Xmmword),
BITFIELD (Ymmword),
+ BITFIELD (Zmmword),
BITFIELD (Unspecified),
BITFIELD (Anysize),
- BITFIELD (Vex_Imm4),
+ BITFIELD (Vec_Imm4),
+ BITFIELD (RegBND),
+ BITFIELD (Vec_Disp8),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
};
-static int lineno;
static const char *filename;
static int
fail (const char *message, ...)
{
va_list args;
-
+
va_start (args, message);
fprintf (stderr, _("%s: Error: "), program_name);
vfprintf (stderr, message, args);
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
-/* Copyright 2007, 2008, 2009\n\
- Free Software Foundation, Inc.\n\
+/* Copyright (C) 2007-2016 Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
\n\
*str = '\0';
remove_trailing_whitespaces (p);
- *next = str + 1;
+ *next = str + 1;
if (p >= last)
abort ();
return p;
}
+static void set_bitfield (char *, bitfield *, int, unsigned int, int);
+
+static int
+set_bitfield_from_cpu_flag_init (char *f, bitfield *array,
+ int value, unsigned int size,
+ int lineno)
+{
+ char *str, *next, *last;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE (cpu_flag_init); i++)
+ if (strcmp (cpu_flag_init[i].name, f) == 0)
+ {
+ /* Turn on selective bits. */
+ char *init = xstrdup (cpu_flag_init[i].init);
+ last = init + strlen (init);
+ for (next = init; next && next < last; )
+ {
+ str = next_field (next, '|', &next, last);
+ if (str)
+ set_bitfield (str, array, 1, size, lineno);
+ }
+ free (init);
+ return 0;
+ }
+
+ return -1;
+}
+
static void
-set_bitfield (const char *f, bitfield *array, unsigned int size)
+set_bitfield (char *f, bitfield *array, int value,
+ unsigned int size, int lineno)
{
unsigned int i;
- if (strcmp (f, "Mmword") == 0)
+ if (strcmp (f, "CpuFP") == 0)
+ {
+ set_bitfield("Cpu387", array, value, size, lineno);
+ set_bitfield("Cpu287", array, value, size, lineno);
+ f = "Cpu8087";
+ }
+ else if (strcmp (f, "Mmword") == 0)
f= "Qword";
else if (strcmp (f, "Oword") == 0)
f= "Xmmword";
for (i = 0; i < size; i++)
if (strcasecmp (array[i].name, f) == 0)
{
- array[i].value = 1;
+ array[i].value = value;
return;
}
- fail (_("%s: %d: Unknown bitfield: %s\n"), filename, lineno, f);
+ if (value)
+ {
+ const char *v = strchr (f, '=');
+
+ if (v)
+ {
+ size_t n = v - f;
+ char *end;
+
+ for (i = 0; i < size; i++)
+ if (strncasecmp (array[i].name, f, n) == 0)
+ {
+ value = strtol (v + 1, &end, 0);
+ if (*end == '\0')
+ {
+ array[i].value = value;
+ return;
+ }
+ break;
+ }
+ }
+ }
+
+ /* Handle CPU_XXX_FLAGS. */
+ if (!set_bitfield_from_cpu_flag_init (f, array, value, size, lineno))
+ return;
+
+ if (lineno != -1)
+ fail (_("%s: %d: Unknown bitfield: %s\n"), filename, lineno, f);
+ else
+ fail (_("Unknown bitfield: %s\n"), f);
}
static void
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", flags[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", flags[i].value);
+ else
+ fprintf (table, "%d,", flags[i].value);
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
static void
process_i386_cpu_flag (FILE *table, char *flag, int macro,
- const char *comma, const char *indent)
+ const char *comma, const char *indent,
+ int lineno)
{
char *str, *next, *last;
+ unsigned int i;
bitfield flags [ARRAY_SIZE (cpu_flags)];
/* Copy the default cpu flags. */
if (strcasecmp (flag, "unknown") == 0)
{
- unsigned int i;
-
/* We turn on everything except for cpu64 in case of
- CPU_UNKNOWN_FLAGS. */
+ CPU_UNKNOWN_FLAGS. */
+ for (i = 0; i < ARRAY_SIZE (flags); i++)
+ if (flags[i].position != Cpu64)
+ flags[i].value = 1;
+ }
+ else if (flag[0] == '~')
+ {
+ last = flag + strlen (flag);
+
+ if (flag[1] == '(')
+ {
+ last -= 1;
+ next = flag + 2;
+ if (*last != ')')
+ fail (_("%s: %d: Missing `)' in bitfield: %s\n"), filename,
+ lineno, flag);
+ *last = '\0';
+ }
+ else
+ next = flag + 1;
+
+ /* First we turn on everything except for cpu64. */
for (i = 0; i < ARRAY_SIZE (flags); i++)
if (flags[i].position != Cpu64)
flags[i].value = 1;
+
+ /* Turn off selective bits. */
+ for (; next && next < last; )
+ {
+ str = next_field (next, '|', &next, last);
+ if (str)
+ set_bitfield (str, flags, 0, ARRAY_SIZE (flags), lineno);
+ }
}
else if (strcmp (flag, "0"))
{
+ /* Turn on selective bits. */
last = flag + strlen (flag);
for (next = flag; next && next < last; )
{
str = next_field (next, '|', &next, last);
if (str)
- set_bitfield (str, flags, ARRAY_SIZE (flags));
+ set_bitfield (str, flags, 1, ARRAY_SIZE (flags), lineno);
}
}
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", modifier[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", modifier[i].value);
+ else
+ fprintf (table, "%d,", modifier[i].value);
if (((i + 1) % 20) == 0)
fprintf (table, "\n ");
}
}
static void
-process_i386_opcode_modifier (FILE *table, char *mod)
+process_i386_opcode_modifier (FILE *table, char *mod, int lineno)
{
char *str, *next, *last;
bitfield modifiers [ARRAY_SIZE (opcode_modifiers)];
{
str = next_field (next, '|', &next, last);
if (str)
- set_bitfield (str, modifiers, ARRAY_SIZE (modifiers));
+ set_bitfield (str, modifiers, 1, ARRAY_SIZE (modifiers),
+ lineno);
}
}
output_opcode_modifier (table, modifiers, ARRAY_SIZE (modifiers));
for (i = 0; i < size - 1; i++)
{
- fprintf (table, "%d, ", types[i].value);
+ if (((i + 1) % 20) != 0)
+ fprintf (table, "%d, ", types[i].value);
+ else
+ fprintf (table, "%d,", types[i].value);
if (((i + 1) % 20) == 0)
{
/* We need \\ for macro. */
if (macro)
- fprintf (table, "\\\n%s", indent);
+ fprintf (table, " \\\n%s", indent);
else
fprintf (table, "\n%s", indent);
}
static void
process_i386_operand_type (FILE *table, char *op, int macro,
- const char *indent)
+ const char *indent, int lineno)
{
char *str, *next, *last;
bitfield types [ARRAY_SIZE (operand_types)];
{
str = next_field (next, '|', &next, last);
if (str)
- set_bitfield (str, types, ARRAY_SIZE (types));
+ set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno);
}
}
output_operand_type (table, types, ARRAY_SIZE (types), macro,
static void
output_i386_opcode (FILE *table, const char *name, char *str,
- char *last)
+ char *last, int lineno)
{
unsigned int i;
char *operands, *base_opcode, *extension_opcode, *opcode_length;
name, operands, base_opcode, extension_opcode,
opcode_length);
- process_i386_cpu_flag (table, cpu_flags, 0, ",", " ");
+ process_i386_cpu_flag (table, cpu_flags, 0, ",", " ", lineno);
- process_i386_opcode_modifier (table, opcode_modifier);
+ process_i386_opcode_modifier (table, opcode_modifier, lineno);
fprintf (table, " { ");
if (operand_types[i] == NULL || *operand_types[i] == '0')
{
if (i == 0)
- process_i386_operand_type (table, "0", 0, "\t ");
+ process_i386_operand_type (table, "0", 0, "\t ", lineno);
break;
}
fprintf (table, ",\n ");
process_i386_operand_type (table, operand_types[i], 0,
- "\t ");
+ "\t ", lineno);
}
fprintf (table, " } },\n");
}
struct opcode_hash_entry *next;
char *name;
char *opcode;
+ int lineno;
};
/* Calculate the hash value of an opcode hash entry P. */
htab_t opcode_hash_table;
struct opcode_hash_entry **opcode_array;
unsigned int opcode_array_size = 1024;
+ int lineno = 0;
filename = "i386-opc.tbl";
fp = fopen (filename, "r");
xcalloc, free);
fprintf (table, "\n/* i386 opcode table. */\n\n");
- fprintf (table, "const template i386_optab[] =\n{\n");
+ fprintf (table, "const insn_template i386_optab[] =\n{\n");
/* Put everything on opcode array. */
while (!feof (fp))
opcode_array[i]->next = NULL;
opcode_array[i]->name = xstrdup (name);
opcode_array[i]->opcode = xstrdup (str);
+ opcode_array[i]->lineno = lineno;
*hash_slot = opcode_array[i];
i++;
}
(*entry)->next = NULL;
(*entry)->name = (*hash_slot)->name;
(*entry)->opcode = xstrdup (str);
+ (*entry)->lineno = lineno;
}
}
{
name = next->name;
str = next->opcode;
+ lineno = next->lineno;
last = str + strlen (str);
- output_i386_opcode (table, name, str, last);
+ output_i386_opcode (table, name, str, last, lineno);
}
}
fprintf (table, " { NULL, 0, 0, 0, 0,\n");
- process_i386_cpu_flag (table, "0", 0, ",", " ");
+ process_i386_cpu_flag (table, "0", 0, ",", " ", -1);
+
+ process_i386_opcode_modifier (table, "0", -1);
- process_i386_opcode_modifier (table, "0");
-
fprintf (table, " { ");
- process_i386_operand_type (table, "0", 0, "\t ");
+ process_i386_operand_type (table, "0", 0, "\t ", -1);
fprintf (table, " } }\n");
fprintf (table, "};\n");
char *str, *p, *last;
char *reg_name, *reg_type, *reg_flags, *reg_num;
char *dw2_32_num, *dw2_64_num;
+ int lineno = 0;
filename = "i386-reg.tbl";
fp = fopen (filename, "r");
fprintf (table, " { \"%s\",\n ", reg_name);
- process_i386_operand_type (table, reg_type, 0, "\t");
+ process_i386_operand_type (table, reg_type, 0, "\t", lineno);
/* Find 32-bit Dwarf2 register number. */
dw2_32_num = next_field (str, ',', &str, last);
{
fprintf (fp, "\n#define %s \\\n", cpu_flag_init[i].name);
init = xstrdup (cpu_flag_init[i].init);
- process_i386_cpu_flag (fp, init, 1, "", " ");
+ process_i386_cpu_flag (fp, init, 1, "", " ", -1);
free (init);
}
{
fprintf (fp, "\n\n#define %s \\\n ", operand_type_init[i].name);
init = xstrdup (operand_type_init[i].init);
- process_i386_operand_type (fp, init, 1, " ");
+ process_i386_operand_type (fp, init, 1, " ", -1);
free (init);
}
fprintf (fp, "\n");
/* Program options. */
#define OPTION_SRCDIR 200
-struct option long_options[] =
+struct option long_options[] =
{
{"srcdir", required_argument, NULL, OPTION_SRCDIR},
{"debug", no_argument, NULL, 'd'},
extern int chdir (char *);
char *srcdir = NULL;
int c;
+ unsigned int i, cpumax;
FILE *table;
-
+
program_name = *argv;
xmalloc_set_program_name (program_name);
if (optind != argc)
usage (stdout, 1);
- if (srcdir != NULL)
+ if (srcdir != NULL)
if (chdir (srcdir) != 0)
fail (_("unable to change directory to \"%s\", errno = %s\n"),
srcdir, xstrerror (errno));
+ /* cpu_flags isn't sorted by position. */
+ cpumax = 0;
+ for (i = 0; i < ARRAY_SIZE (cpu_flags); i++)
+ if (cpu_flags[i].position > cpumax)
+ cpumax = cpu_flags[i].position;
+
/* Check the unused bitfield in i386_cpu_flags. */
-#ifndef CpuUnused
+#ifdef CpuUnused
+ if ((cpumax - 1) != CpuMax)
+ fail (_("CpuMax != %d!\n"), cpumax);
+#else
+ if (cpumax != CpuMax)
+ fail (_("CpuMax != %d!\n"), cpumax);
+
c = CpuNumOfBits - CpuMax - 1;
if (c)
fail (_("%d unused bits in i386_cpu_flags.\n"), c);