[aarch64] - Only use MOV for disassembly when shifter op is LSL #0

[binutils-gdb.git] / opcodes / i386-gen.c

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 3cbab3445bd79083201ad3e0e5ae45de5fc1d1dc..fdd6538ae4160ded5b0125b65474d69e58bcd87b 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -60,7 +60,7 @@ static initializer cpu_flag_init[] =
   { "CPU_I586_FLAGS",
     "CPU_I486_FLAGS|Cpu387|Cpu586" },
   { "CPU_I686_FLAGS",
-    "CPU_I586_FLAGS|Cpu686|Cpu687" },
+    "CPU_I586_FLAGS|Cpu686|Cpu687|CpuCMOV|CpuFXSR" },
   { "CPU_PENTIUMPRO_FLAGS",
     "CPU_I686_FLAGS|CpuNop" },
   { "CPU_P2_FLAGS",
@@ -111,6 +111,10 @@ static initializer cpu_flag_init[] =
     "Cpu387" },
   { "CPU_687_FLAGS",
     "CPU_387_FLAGS|Cpu687" },
+  { "CPU_CMOV_FLAGS",
+    "CpuCMOV" },
+  { "CPU_FXSR_FLAGS",
+    "CpuFXSR" },
   { "CPU_CLFLUSH_FLAGS",
     "CpuClflush" },
   { "CPU_NOP_FLAGS",
@@ -297,6 +301,10 @@ static initializer cpu_flag_init[] =
     "CPU_ANY_687_FLAGS|Cpu387" },
   { "CPU_ANY_687_FLAGS",
     "Cpu687|CpuFISTTP" },
+  { "CPU_ANY_CMOV_FLAGS",
+    "CpuCMOV" },
+  { "CPU_ANY_FXSR_FLAGS",
+    "CpuFXSR" },
   { "CPU_ANY_MMX_FLAGS",
     "CPU_3DNOWA_FLAGS" },
   { "CPU_ANY_SSE_FLAGS",
@@ -487,6 +495,8 @@ static bitfield cpu_flags[] =
   BITFIELD (Cpu486),
   BITFIELD (Cpu586),
   BITFIELD (Cpu686),
+  BITFIELD (CpuCMOV),
+  BITFIELD (CpuFXSR),
   BITFIELD (CpuClflush),
   BITFIELD (CpuNop),
   BITFIELD (CpuSYSCALL),
@@ -602,9 +612,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (JumpInterSegment),
   BITFIELD (FloatMF),
   BITFIELD (FloatR),
-  BITFIELD (Size16),
-  BITFIELD (Size32),
-  BITFIELD (Size64),
+  BITFIELD (Size),
   BITFIELD (CheckRegSize),
   BITFIELD (IgnoreSize),
   BITFIELD (DefaultSize),
@@ -685,7 +693,6 @@ static bitfield operand_types[] =
   BITFIELD (JumpAbsolute),
   BITFIELD (EsSeg),
   BITFIELD (RegMem),
-  BITFIELD (Mem),
   BITFIELD (Byte),
   BITFIELD (Word),
   BITFIELD (Dword),