/* Declarations for Intel 80386 opcode table
- Copyright (C) 2007-2021 Free Software Foundation, Inc.
+ Copyright (C) 2007-2022 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
02110-1301, USA. */
#include "opcode/i386.h"
-#ifdef HAVE_LIMITS_H
#include <limits.h>
-#endif
-
#ifndef CHAR_BIT
#define CHAR_BIT 8
#endif
CpuAVX512DQ,
/* Intel AVX-512 BW Instructions support required. */
CpuAVX512BW,
- /* Intel L1OM support required */
- CpuL1OM,
- /* Intel K1OM support required */
- CpuK1OM,
/* Intel IAMCU support required */
CpuIAMCU,
/* Xsave/xrstor New Instructions support required */
CpuTDX,
/* Intel AVX VNNI Instructions support required. */
CpuAVX_VNNI,
+ /* Intel AVX-512 FP16 Instructions support required. */
+ CpuAVX512_FP16,
/* mwaitx instruction required */
CpuMWAITX,
/* Clzero instruction required */
CpuTLBSYNC,
/* SNP instructions required */
CpuSNP,
+
+ /* NOTE: These last three items need to remain last and in this order. */
+
/* 64bit support required */
Cpu64,
/* Not supported in the 64bit mode */
unsigned int cpuavx512vl:1;
unsigned int cpuavx512dq:1;
unsigned int cpuavx512bw:1;
- unsigned int cpul1om:1;
- unsigned int cpuk1om:1;
unsigned int cpuiamcu:1;
unsigned int cpuxsave:1;
unsigned int cpuxsaveopt:1;
unsigned int cpuavx512_vp2intersect:1;
unsigned int cputdx:1;
unsigned int cpuavx_vnni:1;
+ unsigned int cpuavx512_fp16:1;
unsigned int cpumwaitx:1;
unsigned int cpuclzero:1;
unsigned int cpuospke:1;
unsigned int cpuinvlpgb:1;
unsigned int cputlbsync:1;
unsigned int cpusnp:1;
+ /* NOTE: These last three fields need to remain last and in this order. */
unsigned int cpu64:1;
unsigned int cpuno64:1;
#ifdef CpuUnused
Size,
/* check register size. */
CheckRegSize,
+ /* Instrucion requires that destination must be distinct from source
+ registers. */
+ DistinctDest,
/* instruction ignores operand size prefix and in Intel mode ignores
mnemonic size suffix check. */
#define IGNORESIZE 1
1: 0F opcode prefix / space.
2: 0F38 opcode prefix / space.
3: 0F3A opcode prefix / space.
+ 5: EVEXMAP5 opcode prefix / space.
+ 6: EVEXMAP6 opcode prefix / space.
8: XOP 08 opcode space.
9: XOP 09 opcode space.
A: XOP 0A opcode space.
#define SPACE_0F 1
#define SPACE_0F38 2
#define SPACE_0F3A 3
+#define SPACE_EVEXMAP5 5
+#define SPACE_EVEXMAP6 6
#define SPACE_XOP08 8
#define SPACE_XOP09 9
#define SPACE_XOP0A 0xA
/* SSE to AVX support required */
SSE2AVX,
- /* No AVX equivalent */
- NoAVX,
/* insn has EVEX prefix:
1: 512bit EVEX prefix.
unsigned int floatr:1;
unsigned int size:2;
unsigned int checkregsize:1;
+ unsigned int distinctdest:1;
unsigned int mnemonicsize:2;
unsigned int anysize:1;
unsigned int no_bsuf:1;
unsigned int vexsources:2;
unsigned int sib:3;
unsigned int sse2avx:1;
- unsigned int noavx:1;
unsigned int evex:3;
unsigned int masking:2;
unsigned int broadcast:3;
}
reg_entry;
-/* Entries in i386_regtab. */
-#define REGNAM_AL 1
-#define REGNAM_AX 25
-#define REGNAM_EAX 41
-
extern const reg_entry i386_regtab[];
extern const unsigned int i386_regtab_size;
-
-typedef struct
-{
- char *seg_name;
- unsigned int seg_prefix;
-}
-seg_entry;
-
-extern const seg_entry cs;
-extern const seg_entry ds;
-extern const seg_entry ss;
-extern const seg_entry es;
-extern const seg_entry fs;
-extern const seg_entry gs;
+extern const unsigned char i386_seg_prefixes[6];