THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
#define CGEN_ARCH m32r
/* Given symbol S, return m32r_cgen_<S>. */
-#define CGEN_SYM(s) CONCAT3 (m32r,_cgen_,s)
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define CGEN_SYM(s) m32r##_cgen_##s
+#else
+#define CGEN_SYM(s) m32r/**/_cgen_/**/s
+#endif
+
/* Selected cpu families. */
#define HAVE_CPU_M32RBF
+#define HAVE_CPU_M32RXF
#define CGEN_INSN_LSB0_P 0
#define CGEN_INT_INSN_P 1
-/* FIXME: Need to compute CGEN_MAX_SYNTAX_BYTES. */
+/* Maximum number of syntax elements in an instruction. */
+#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 15
/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
we can't hash on everything up to the space. */
#define CGEN_MNEMONIC_OPERANDS
-/* Maximum number of operands any insn or macro-insn has. */
-#define CGEN_MAX_INSN_OPERANDS 16
/* Maximum number of fields in an instruction. */
-#define CGEN_MAX_IFMT_OPERANDS 7
+#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 7
/* Enums. */
/* Enum declaration for machine type selection. */
typedef enum mach_attr {
- MACH_BASE, MACH_M32R
- , MACH_MAX
+ MACH_BASE, MACH_M32R, MACH_M32RX, MACH_MAX
} MACH_ATTR;
/* Enum declaration for instruction set selection. */
ISA_M32R, ISA_MAX
} ISA_ATTR;
+/* Enum declaration for parallel execution pipeline selection. */
+typedef enum pipe_attr {
+ PIPE_NONE, PIPE_O, PIPE_S, PIPE_OS
+} PIPE_ATTR;
+
/* Number of architecture variants. */
#define MAX_ISAS 1
#define MAX_MACHS ((int) MACH_MAX)
/* Enum declaration for m32r ifield types. */
typedef enum ifield_type {
- M32R_F_NIL, M32R_F_OP1, M32R_F_OP2, M32R_F_COND
- , M32R_F_R1, M32R_F_R2, M32R_F_SIMM8, M32R_F_SIMM16
- , M32R_F_SHIFT_OP2, M32R_F_UIMM4, M32R_F_UIMM5, M32R_F_UIMM16
- , M32R_F_UIMM24, M32R_F_HI16, M32R_F_DISP8, M32R_F_DISP16
- , M32R_F_DISP24
- , M32R_F_MAX
+ M32R_F_NIL, M32R_F_ANYOF, M32R_F_OP1, M32R_F_OP2
+ , M32R_F_COND, M32R_F_R1, M32R_F_R2, M32R_F_SIMM8
+ , M32R_F_SIMM16, M32R_F_SHIFT_OP2, M32R_F_UIMM4, M32R_F_UIMM5
+ , M32R_F_UIMM16, M32R_F_UIMM24, M32R_F_HI16, M32R_F_DISP8
+ , M32R_F_DISP16, M32R_F_DISP24, M32R_F_OP23, M32R_F_OP3
+ , M32R_F_ACC, M32R_F_ACCS, M32R_F_ACCD, M32R_F_BITS67
+ , M32R_F_BIT14, M32R_F_IMM1, M32R_F_MAX
} IFIELD_TYPE;
#define MAX_IFLD ((int) M32R_F_MAX)
HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
, HW_H_IADDR, HW_H_PC, HW_H_HI16, HW_H_SLO16
, HW_H_ULO16, HW_H_GR, HW_H_CR, HW_H_ACCUM
- , HW_H_COND, HW_H_PSW, HW_H_BPSW, HW_H_BBPSW
- , HW_H_LOCK, HW_MAX
+ , HW_H_ACCUMS, HW_H_COND, HW_H_PSW, HW_H_BPSW
+ , HW_H_BBPSW, HW_H_LOCK, HW_MAX
} CGEN_HW_TYPE;
#define MAX_HW ((int) HW_MAX)
M32R_OPERAND_PC, M32R_OPERAND_SR, M32R_OPERAND_DR, M32R_OPERAND_SRC1
, M32R_OPERAND_SRC2, M32R_OPERAND_SCR, M32R_OPERAND_DCR, M32R_OPERAND_SIMM8
, M32R_OPERAND_SIMM16, M32R_OPERAND_UIMM4, M32R_OPERAND_UIMM5, M32R_OPERAND_UIMM16
+ , M32R_OPERAND_IMM1, M32R_OPERAND_ACCD, M32R_OPERAND_ACCS, M32R_OPERAND_ACC
, M32R_OPERAND_HASH, M32R_OPERAND_HI16, M32R_OPERAND_SLO16, M32R_OPERAND_ULO16
, M32R_OPERAND_UIMM24, M32R_OPERAND_DISP8, M32R_OPERAND_DISP16, M32R_OPERAND_DISP24
, M32R_OPERAND_CONDBIT, M32R_OPERAND_ACCUM, M32R_OPERAND_MAX
} CGEN_OPERAND_TYPE;
/* Number of operands types. */
-#define MAX_OPERANDS ((int) M32R_OPERAND_MAX)
+#define MAX_OPERANDS 26
/* Maximum number of operands referenced by any insn. */
#define MAX_OPERAND_INSTANCES 11
/* Enum declaration for cgen_insn attrs. */
typedef enum cgen_insn_attr {
CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
+ , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_FILL_SLOT, CGEN_INSN_SPECIAL
, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_PIPE
, CGEN_INSN_END_NBOOLS
extern CGEN_KEYWORD m32r_cgen_opval_gr_names;
extern CGEN_KEYWORD m32r_cgen_opval_cr_names;
+extern CGEN_KEYWORD m32r_cgen_opval_h_accums;