/* m68hc11-opc.c -- Motorola 68HC11 & 68HC12 opcode list
- Copyright 1999, 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
+ Copyright 1999, 2000, 2002, 2005, 2007 Free Software Foundation, Inc.
+ Written by Stephane Carrez (stcarrez@nerim.fr)
-This file is part of GDB, GAS, and the GNU binutils.
+ This file is part of the GNU opcodes library.
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-2, or (at your option) any later version.
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-*/
+ You should have received a copy of the GNU General Public License
+ along with this file; see the file COPYING. If not, write to the
+ Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
#include <stdio.h>
#include "ansidecl.h"
#define OP_IX M6811_OP_IX
#define OP_IY M6811_OP_IY
#define OP_IND16 M6811_OP_IND16
+#define OP_PAGE M6812_OP_PAGE
#define OP_IDX M6812_OP_IDX
#define OP_IDX_1 M6812_OP_IDX_1
#define OP_IDX_2 M6812_OP_IDX_2
#define OP_D_IDX_2 M6812_OP_D_IDX_2
#define OP_DIRECT M6811_OP_DIRECT
#define OP_BITMASK M6811_OP_BITMASK
-#define OP_JUMP_REL M6811_OP_JUMP_REL
-#define OP_JUMP_REL16 M6812_OP_JUMP_REL16
+#define OP_BRANCH M6811_OP_BRANCH
+#define OP_JUMP_REL (M6811_OP_JUMP_REL|OP_BRANCH)
+#define OP_JUMP_REL16 (M6812_OP_JUMP_REL16|OP_BRANCH)
#define OP_REG M6812_OP_REG
#define OP_REG_1 M6812_OP_REG
#define OP_REG_2 M6812_OP_REG_2
{ "bvc", OP_JUMP_REL, 2, 0x28, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
{ "bvs", OP_JUMP_REL, 2, 0x29, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "call", OP_IND16, 4, 0x4a, 8, 8, CHG_NONE, cpu6812 },
- { "call", OP_IDX, 3, 0x4b, 8, 8, CHG_NONE, cpu6812 },
- { "call", OP_IDX_1, 4, 0x4b, 8, 8, CHG_NONE, cpu6812 },
- { "call", OP_IDX_2, 5, 0x4b, 9, 9, CHG_NONE, cpu6812 },
- { "call", OP_D_IDX, 2, 0x4b, 10, 10, CHG_NONE, cpu6812 },
- { "call", OP_D_IDX_2, 4, 0x4b, 10, 10, CHG_NONE, cpu6812 },
+ { "call", OP_IND16 | OP_PAGE
+ | OP_BRANCH, 4, 0x4a, 8, 8, CHG_NONE, cpu6812 },
+ { "call", OP_IDX | OP_PAGE
+ | OP_BRANCH, 3, 0x4b, 8, 8, CHG_NONE, cpu6812 },
+ { "call", OP_IDX_1 | OP_PAGE
+ | OP_BRANCH, 4, 0x4b, 8, 8, CHG_NONE, cpu6812 },
+ { "call", OP_IDX_2 | OP_PAGE
+ | OP_BRANCH, 5, 0x4b, 9, 9, CHG_NONE, cpu6812 },
+ { "call", OP_D_IDX
+ | OP_BRANCH, 2, 0x4b, 10, 10, CHG_NONE, cpu6812 },
+ { "call", OP_D_IDX_2
+ | OP_BRANCH, 4, 0x4b, 10, 10, CHG_NONE, cpu6812 },
{ "cba", OP_NONE, 1, 0x11, 2, 2, CHG_NZVC, cpu6811 },
{ "cba", OP_NONE | OP_PAGE2,2, 0x17, 2, 2, CHG_NZVC, cpu6812 },
{ "iny", OP_NONE |OP_PAGE2, 2, 0x08, 4, 4, CHG_Z, cpu6811 },
{ "iny", OP_NONE, 1, 0x02, 1, 1, CHG_Z, cpu6812 },
- { "jmp", OP_IND16, 3, 0x7e, 3, 3, CHG_NONE, cpu6811 },
+ { "jmp", OP_IND16 | OP_BRANCH, 3, 0x7e, 3, 3, CHG_NONE, cpu6811 },
{ "jmp", OP_IX, 2, 0x6e, 3, 3, CHG_NONE, cpu6811 },
{ "jmp", OP_IY | OP_PAGE2, 3, 0x6e, 4, 4, CHG_NONE, cpu6811 },
- { "jmp", OP_IND16, 3, 0x06, 3, 3, CHG_NONE, cpu6812 },
+ { "jmp", OP_IND16 | OP_BRANCH, 3, 0x06, 3, 3, CHG_NONE, cpu6812 },
{ "jmp", OP_IDX, 2, 0x05, 3, 3, CHG_NONE, cpu6812 },
{ "jmp", OP_IDX_1, 3, 0x05, 3, 3, CHG_NONE, cpu6812 },
{ "jmp", OP_IDX_2, 4, 0x05, 4, 4, CHG_NONE, cpu6812 },
{ "jmp", OP_D_IDX, 2, 0x05, 6, 6, CHG_NONE, cpu6812 },
{ "jmp", OP_D_IDX_2, 4, 0x05, 6, 6, CHG_NONE, cpu6812 },
- { "jsr", OP_DIRECT, 2, 0x9d, 5, 5, CHG_NONE, cpu6811 },
- { "jsr", OP_IND16, 3, 0xbd, 6, 6, CHG_NONE, cpu6811 },
+ { "jsr", OP_DIRECT | OP_BRANCH, 2, 0x9d, 5, 5, CHG_NONE, cpu6811 },
+ { "jsr", OP_IND16 | OP_BRANCH, 3, 0xbd, 6, 6, CHG_NONE, cpu6811 },
{ "jsr", OP_IX, 2, 0xad, 6, 6, CHG_NONE, cpu6811 },
{ "jsr", OP_IY | OP_PAGE2, 3, 0xad, 6, 6, CHG_NONE, cpu6811 },
- { "jsr", OP_DIRECT, 2, 0x17, 4, 4, CHG_NONE, cpu6812 },
- { "jsr", OP_IND16, 3, 0x16, 4, 3, CHG_NONE, cpu6812 },
+ { "jsr", OP_DIRECT | OP_BRANCH, 2, 0x17, 4, 4, CHG_NONE, cpu6812 },
+ { "jsr", OP_IND16 | OP_BRANCH, 3, 0x16, 4, 3, CHG_NONE, cpu6812 },
{ "jsr", OP_IDX, 2, 0x15, 4, 4, CHG_NONE, cpu6812 },
{ "jsr", OP_IDX_1, 3, 0x15, 4, 4, CHG_NONE, cpu6812 },
{ "jsr", OP_IDX_2, 4, 0x15, 5, 5, CHG_NONE, cpu6812 },