/* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200.
- Copyright 1989, 91, 92, 93, 94, 95, 1996 Free Software Foundation.
+ Copyright 1989, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation.
This file is part of GDB, GAS, and the GNU binutils.
{"cmpib", one(0006000), one(0177700), "#b;s", m68000up },
{"cmpiw", one(0006100), one(0177700), "#w;s", m68000up },
{"cmpil", one(0006200), one(0177700), "#l;s", m68000up },
-{"cmpil", one(0006200), one(0177700), "#l;s", m68000up },
{"cmpil", one(0006200), one(0177700), "#lDs", mcf5200 },
{"cmpmb", one(0130410), one(0170770), "+s+d", m68000up },
{"fmovecrx", two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat },
-{"fmovemx", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk>s", mfloat },
-{"fmovemx", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii<sDk", mfloat },
+{"fmovemx", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
+{"fmovemx", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
+{"fmovemx", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
+{"fmovemx", two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
+{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
+{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
+{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
{"fmovemx", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
-{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3>s", mfloat },
-{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id<sl3", mfloat },
-{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id<s#3", mfloat },
+{"fmovemx", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
+{"fmovemx", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
+{"fmovemx", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
{"fmoveml", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
{"fmoveml", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat },
target is a single %fpiar. */
{"fmoveml", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat },
-{"fmovem", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk>s", mfloat },
-{"fmovem", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii<sDk", mfloat },
-{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
{"fmovem", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
-{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3>s", mfloat },
-{"fmovem", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id<sl3", mfloat },
-{"fmovem", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id<s#3", mfloat },
-
+{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
+{"fmovem", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
+{"fmovem", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
+{"fmovem", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
+{"fmovem", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
+{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
+{"fmovem", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
+{"fmovem", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
+{"fmovem", two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
+{"fmovem", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
+{"fmovem", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
{"fmovem", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
+{"fmovem", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ss8", mfloat },
{"fmovem", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat },
-/* FIXME: see above */
-{"fmovem", two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*lL8", mfloat },
+{"fmovem", two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*sL8", mfloat },
{"fmulb", two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fmuld", two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
{"lsrl", one(0160210), one(0170770), "QdDs", m68000up | mcf5200 },
{"lsrl", one(0160250), one(0170770), "DdDs", m68000up | mcf5200 },
+/* NOTE: The mcf5200 family programmer's reference manual does not
+ indicate the byte form of the movea instruction is invalid (as it
+ is on 68000 family cpus). However, experiments on the 5202 yeild
+ unexpected results. The value is copied, but it is not sign extended
+ (as is done with movea.w) and the top three bytes in the address
+ register are not disturbed. I don't know if this is the intended
+ behavior --- it could be a hole in instruction decoding (Motorola
+ decided not to trap all invalid instructions for performance reasons)
+ --- but I suspect that it is not.
+
+ I reported this to Motorola ISD Technical Communications Support,
+ which replied that other coldfire assemblers reject movea.b. For
+ this reason I've decided to not allow moveab.
+
+ jtc@cygnus.com - 97/01/24
+ */
+
{"moveal", one(0020100), one(0170700), "*lAd", m68000up | mcf5200 },
{"moveaw", one(0030100), one(0170700), "*wAd", m68000up | mcf5200 },
{"moveml", one(0046300), one(0177700), "<sLw", m68000up },
{"moveml", one(0046300), one(0177700), "<s#w", m68000up },
/* FIXME: need specifier for mode 2 and 5 to simplify below insn patterns */
-{"moveml", one(0044320), one(0177700), "Lwas", mcf5200 },
-{"moveml", one(0044320), one(0177700), "#was", mcf5200 },
-{"moveml", one(0044350), one(0177700), "Lwds", mcf5200 },
-{"moveml", one(0044350), one(0177700), "#wds", mcf5200 },
-{"moveml", one(0046320), one(0177700), "asLw", mcf5200 },
-{"moveml", one(0046320), one(0177700), "asLw", mcf5200 },
-{"moveml", one(0046350), one(0177700), "dsLw", mcf5200 },
+{"moveml", one(0044320), one(0177770), "Lwas", mcf5200 },
+{"moveml", one(0044320), one(0177770), "#was", mcf5200 },
+{"moveml", one(0044350), one(0177770), "Lwds", mcf5200 },
+{"moveml", one(0044350), one(0177770), "#wds", mcf5200 },
+{"moveml", one(0046320), one(0177770), "asLw", mcf5200 },
+{"moveml", one(0046320), one(0177770), "as#w", mcf5200 },
+{"moveml", one(0046350), one(0177770), "dsLw", mcf5200 },
{"moveml", one(0046350), one(0177770), "ds#w", mcf5200 },
{"movepw", one(0000410), one(0170770), "dsDd", m68000up },
{"movepl", one(0000710), one(0170770), "Ddds", m68000up },
{"moveq", one(0070000), one(0170400), "MsDd", m68000up | mcf5200 },
+{"moveq", one(0070000), one(0170400), "#BDd", m68000up | mcf5200 },
/* The move opcode can generate the movea and moveq instructions. */
{"moveb", one(0010000), one(0170000), ";b$d", m68000up },
-{"moveb", one(0010000), one(0170000), "ms%d", mcf5200 },
+{"moveb", one(0010000), one(0170000), "ms$d", mcf5200 },
{"moveb", one(0010000), one(0170000), "nspd", mcf5200 },
-{"moveb", one(0010000), one(0170000), "osmd", mcf5200 },
+{"moveb", one(0010000), one(0170000), "obmd", mcf5200 },
{"movew", one(0030000), one(0170000), "*w%d", m68000up },
{"movew", one(0030000), one(0170000), "ms%d", mcf5200 },
{"movew", one(0030000), one(0170000), "nspd", mcf5200 },
-{"movew", one(0030000), one(0170000), "osmd", mcf5200 },
+{"movew", one(0030000), one(0170000), "owmd", mcf5200 },
{"movew", one(0040300), one(0177700), "Ss$s", m68000up },
{"movew", one(0040300), one(0177770), "SsDs", mcf5200 },
{"movew", one(0041300), one(0177700), "Cs$s", m68010up },
{"movel", one(0020000), one(0170000), "*l%d", m68000up },
{"movel", one(0020000), one(0170000), "ms%d", mcf5200 },
{"movel", one(0020000), one(0170000), "nspd", mcf5200 },
-{"movel", one(0020000), one(0170000), "osmd", mcf5200 },
+{"movel", one(0020000), one(0170000), "olmd", mcf5200 },
{"movel", one(0047140), one(0177770), "AsUd", m68000up },
{"movel", one(0047150), one(0177770), "UdAs", m68000up },
{"move", one(0030000), one(0170000), "*w%d", m68000up },
{"move", one(0030000), one(0170000), "ms%d", mcf5200 },
{"move", one(0030000), one(0170000), "nspd", mcf5200 },
-{"move", one(0030000), one(0170000), "osmd", mcf5200 },
+{"move", one(0030000), one(0170000), "owmd", mcf5200 },
{"move", one(0040300), one(0177700), "Ss$s", m68000up },
{"move", one(0040300), one(0177770), "SsDs", mcf5200 },
{"move", one(0041300), one(0177700), "Cs$s", m68010up },
{"swap", one(0044100), one(0177770), "Ds", m68000up | mcf5200 },
+/* swbeg and swbegl are magic constants used on sysV68. The compiler
+ generates them before a switch table. They tell the debugger and
+ disassembler that a switch table follows. The parameter is the
+ number of elements in the table. swbeg means that the entries in
+ the table are word (2 byte) sized, and swbegl means that the
+ entries in the table are longword (4 byte) sized. */
+{"swbeg", one(0045374), one(0177777), "#w", m68000up | mcf5200 },
+{"swbegl", one(0045375), one(0177777), "#l", m68000up | mcf5200 },
+
{"tas", one(0045300), one(0177700), "$s", m68000up },
#define TBL1(name,signed,round,size) \
{"trapv", one(0047166), one(0177777), "", m68000up },
-{"tstb", one(0045000), one(0177700), ";b", m68000up | mcf5200 },
-{"tstw", one(0045100), one(0177700), "*w", m68000up | mcf5200 },
-{"tstl", one(0045200), one(0177700), "*l", m68000up | mcf5200 },
+{"tstb", one(0045000), one(0177700), ";b", m68020up | mcf5200 },
+{"tstb", one(0045000), one(0177700), "@b", m68000 },
+{"tstw", one(0045100), one(0177700), "*w", m68020up | mcf5200 },
+{"tstw", one(0045100), one(0177700), "@w", m68000 },
+{"tstl", one(0045200), one(0177700), "*l", m68020up | mcf5200 },
+{"tstl", one(0045200), one(0177700), "@l", m68000 },
{"unlk", one(0047130), one(0177770), "As", m68000up | mcf5200 },
projects / binutils-gdb.git / blobdiff