[ARC] Fix support for double assist instructions.

[binutils-gdb.git] / opcodes / mips-dis.c

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index e1170b967ecc838d80322e03567c0ed8c476656d..e152876646131099027e6b5cc328c8274e926a94 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1,5 +1,5 @@
 /* Print mips instructions for GDB, the GNU debugger, or for objdump.
-   Copyright (C) 1989-2015 Free Software Foundation, Inc.
+   Copyright (C) 1989-2016 Free Software Foundation, Inc.
    Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
 
    This file is part of the GNU opcodes library.
@@ -157,18 +157,6 @@ static const char * const mips_cp0_names_r5900[32] =
   "c0_taglo",     "c0_taghi",     "c0_errorepc",  "$31"
 };
 
-static const struct mips_cp0sel_name mips_cp0sel_names_mipsr5900[] =
-{
-  { 24, 2, "c0_iab"                    },
-  { 24, 3, "c0_iabm"           },
-  { 24, 4, "c0_dab"                    },
-  { 24, 5, "c0_dabm"           },
-  { 24, 6, "c0_dvb"                    },
-  { 24, 7, "c0_dvbm"           },
-  { 25, 1, "c0_perfcnt,1"      },
-  { 25, 2, "c0_perfcnt,2"      }
-};
-
 static const char * const mips_cp0_names_mips3264[32] =
 {
   "c0_index",     "c0_random",    "c0_entrylo0",  "c0_entrylo1",
@@ -875,8 +863,8 @@ parse_mips_dis_option (const char *option, unsigned int len)
       mips_ase |= ASE_XPA;
       return;
     }
-  
-  
+
+
   /* Look for the = that delimits the end of the option name.  */
   for (i = 0; i < len; i++)
     if (option[i] == '=')
@@ -1709,7 +1697,7 @@ print_insn_mips (bfd_vma memaddr,
     {
       for (; op < &mips_opcodes[NUMOPCODES]; op++)
        {
-         if (op->pinfo != INSN_MACRO 
+         if (op->pinfo != INSN_MACRO
              && !(no_aliases && (op->pinfo2 & INSN2_ALIAS))
              && (word & op->mask) == op->match)
            {
@@ -2197,41 +2185,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
   else
     insn = bfd_getl16 (buffer);
 
-  if ((insn & 0xfc00) == 0x7c00)
-    {
-      /* This is a 48-bit microMIPS instruction.  */
-      higher = insn;
-
-      status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info);
-      if (status != 0)
-       {
-         infprintf (is, "micromips 0x%x", higher);
-         (*info->memory_error_func) (status, memaddr + 2, info);
-         return -1;
-       }
-      if (info->endian == BFD_ENDIAN_BIG)
-       insn = bfd_getb16 (buffer);
-      else
-       insn = bfd_getl16 (buffer);
-      higher = (higher << 16) | insn;
-
-      status = (*info->read_memory_func) (memaddr + 4, buffer, 2, info);
-      if (status != 0)
-       {
-         infprintf (is, "micromips 0x%x", higher);
-         (*info->memory_error_func) (status, memaddr + 4, info);
-         return -1;
-       }
-      if (info->endian == BFD_ENDIAN_BIG)
-       insn = bfd_getb16 (buffer);
-      else
-       insn = bfd_getl16 (buffer);
-      infprintf (is, "0x%x%04x (48-bit insn)", higher, insn);
-
-      info->insn_type = dis_noninsn;
-      return 6;
-    }
-  else if ((insn & 0x1c00) == 0x0000 || (insn & 0x1000) == 0x1000)
+  if ((insn & 0x1c00) == 0x0000 || (insn & 0x1000) == 0x1000)
     {
       /* This is a 32-bit microMIPS instruction.  */
       higher = insn;