{"r28", 28},
{"r29", 29},
{"r30", 30},
+ {"sstatus", 30},
{"r31", 31},
/* Control register names. */
OP_MATCH_ORI, OP_MASK_IOP, NIOS2_INSN_ORI, unsigned_immed16_overflow},
{"rdctl", "d,c", "d,c,E", 2,
OP_MATCH_RDCTL, OP_MASK_RDCTL, 0, no_overflow},
+ {"rdprs", "t,s,i", "t,s,i,E", 3,
+ OP_MATCH_RDPRS, OP_MASK_IOP, 0, unsigned_immed16_overflow},
{"ret", "", "E", 0,
OP_MATCH_RET, OP_MASK, 0, no_overflow},
{"rol", "d,s,t", "d,s,t,E", 3,
OP_MATCH_CUSTOM, OP_MASK_ROP, 0, custom_opcode_overflow},
{"wrctl", "c,s", "c,s,E", 2,
OP_MATCH_WRCTL, OP_MASK_WRCTL, 0, no_overflow},
+ {"wrprs", "d,s", "d,s,E", 2,
+ OP_MATCH_WRPRS, OP_MASK_RRT|OP_MASK_ROPX|OP_MASK_ROP, 0, no_overflow},
{"xor", "d,s,t", "d,s,t,E", 3,
OP_MATCH_XOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow},
{"xorhi", "t,s,u", "t,s,u,E", 3,