* elf64-alpha.c (elf64_alpha_check_relocs): Only put maybe_dynamic

[binutils-gdb.git] / opcodes / openrisc-dis.c

diff --git a/opcodes/openrisc-dis.c b/opcodes/openrisc-dis.c
index 6bbb0cbe7f2a7526562e8f4b9f9c7b357bc0497e..e6a7d6a9d8520c8850ded90729751ff9866128e8 100644 (file)
--- a/opcodes/openrisc-dis.c
+++ b/opcodes/openrisc-dis.c
@@ -75,8 +75,7 @@ void openrisc_cgen_print_operand
 
    This function could be moved into `print_insn_normal', but keeping it
    separate makes clear the interface between `print_insn_normal' and each of
-   the handlers.
-*/
+   the handlers.  */
 
 void
 openrisc_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
@@ -318,9 +317,13 @@ print_insn (cd, pc, info, buf, buflen)
   CGEN_INSN_INT insn_value;
   const CGEN_INSN_LIST *insn_list;
   CGEN_EXTRACT_INFO ex_info;
+  int basesize;
 
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
-  insn_value = cgen_get_insn_value (cd, buf, buflen * 8);
+  basesize = cd->base_insn_bitsize < buflen * 8 ?
+                                     cd->base_insn_bitsize : buflen * 8;
+  insn_value = cgen_get_insn_value (cd, buf, basesize);
+
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call
      read_insn, since the incoming buffer is already read (and possibly
@@ -447,11 +450,21 @@ default_print_insn (cd, pc, info)
    Print one instruction from PC on INFO->STREAM.
    Return the size of the instruction (in bytes).  */
 
+typedef struct cpu_desc_list {
+  struct cpu_desc_list *next;
+  int isa;
+  int mach;
+  int endian;
+  CGEN_CPU_DESC cd;
+} cpu_desc_list;
+
 int
 print_insn_openrisc (pc, info)
      bfd_vma pc;
      disassemble_info *info;
 {
+  static cpu_desc_list *cd_list = 0;
+  cpu_desc_list *cl = 0;
   static CGEN_CPU_DESC cd = 0;
   static int prev_isa;
   static int prev_mach;
@@ -482,18 +495,27 @@ print_insn_openrisc (pc, info)
 #ifdef CGEN_COMPUTE_ISA
   isa = CGEN_COMPUTE_ISA (info);
 #else
-  isa = 0;
+  isa = info->insn_sets;
 #endif
 
-  /* If we've switched cpu's, close the current table and open a new one.  */
+  /* If we've switched cpu's, try to find a handle we've used before */
   if (cd
       && (isa != prev_isa
          || mach != prev_mach
          || endian != prev_endian))
     {
-      openrisc_cgen_cpu_close (cd);
       cd = 0;
-    }
+      for (cl = cd_list; cl; cl = cl->next)
+       {
+         if (cl->isa == isa &&
+             cl->mach == mach &&
+             cl->endian == endian)
+           {
+             cd = cl->cd;
+             break;
+           }
+       }
+    } 
 
   /* If we haven't initialized yet, initialize the opcode table.  */
   if (! cd)
@@ -514,6 +536,16 @@ print_insn_openrisc (pc, info)
                                 CGEN_CPU_OPEN_END);
       if (!cd)
        abort ();
+
+      /* save this away for future reference */
+      cl = xmalloc (sizeof (struct cpu_desc_list));
+      cl->cd = cd;
+      cl->isa = isa;
+      cl->mach = mach;
+      cl->endian = endian;
+      cl->next = cd_list;
+      cd_list = cl;
+
       openrisc_cgen_init_dis (cd);
     }