rename ambiguous X-Form "L" fields to L,L1,L2,L3

[libreriscv.git] / openpower / isa / fixedarith.mdwn

diff --git a/openpower/isa/fixedarith.mdwn b/openpower/isa/fixedarith.mdwn
index f6503efde47ba7750e88edbaf957385a3c87aa6c..fe3350fed551dd01ae915b4aff3609b4a2b7efa0 100644 (file)
--- a/openpower/isa/fixedarith.mdwn
+++ b/openpower/isa/fixedarith.mdwn
@@ -4,8 +4,9 @@ D-Form
 
 * addi RT,RA,SI
 
-    if RA = 0 then RT <- EXTS(SI)
-    else           RT <- (RA) + EXTS(SI)
+Pseudo-code:
+
+    RT <- (RA|0) + EXTS(SI)
 
 Special Registers Altered:
 
@@ -17,8 +18,9 @@ D-Form
 
 * addis RT,RA,SI
 
-    if RA = 0 then RT <- EXTS(SI || 160)
-    else           RT <- (RA) + EXTS(SI || [0]*16)
+Pseudo-code:
+
+    RT <- (RA|0) + EXTS(SI || [0]*16)
 
 Special Registers Altered:
 
@@ -30,6 +32,8 @@ DX-Form
 
 * addpcis RT,D
 
+Pseudo-code:
+
     D <- d0||d1||d2
     RT <- NIA + EXTS(D || [0]*16)
 
@@ -46,6 +50,8 @@ XO-Form
 * addo RT,RA,RB (OE=1 Rc=0)
 * addo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- (RA) + (RB)
 
 Special Registers Altered:
@@ -62,6 +68,8 @@ XO-Form
 * subfo RT,RA,RB (OE=1 Rc=0)
 * subfo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- ¬(RA) + (RB) + 1
 
 Special Registers Altered:
@@ -75,6 +83,8 @@ D-Form
 
 * addic RT,RA,SI
 
+Pseudo-code:
+
     RT <- (RA) + EXTS(SI)
 
 Special Registers Altered:
@@ -87,6 +97,8 @@ D-Form
 
 * addic. RT,RA,SI
 
+Pseudo-code:
+
     RT <- (RA) + EXTS(SI)
 
 Special Registers Altered:
@@ -99,6 +111,8 @@ D-Form
 
 * subfic RT,RA,SI
 
+Pseudo-code:
+
     RT <- ¬(RA) + EXTS(SI) + 1
 
 Special Registers Altered:
@@ -114,6 +128,8 @@ XO-Form
 * addco RT,RA,RB (OE=1 Rc=0)
 * addco.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- (RA) + (RB)
 
 Special Registers Altered:
@@ -131,6 +147,8 @@ XO-Form
 * subfco RT,RA,RB (OE=1 Rc=0)
 * subfco.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- ¬(RA) + (RB) + 1
 
 Special Registers Altered:
@@ -148,6 +166,8 @@ XO-Form
 * addeo RT,RA,RB (OE=1 Rc=0)
 * addeo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- (RA) + (RB) + CA
 
 Special Registers Altered:
@@ -165,6 +185,8 @@ XO-Form
 * subfeo RT,RA,RB (OE=1 Rc=0)
 * subfeo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- ¬(RA) + (RB) + CA
 
 Special Registers Altered:
@@ -182,6 +204,8 @@ XO-Form
 * addmeo RT,RA (OE=1 Rc=0)
 * addmeo.  RT,RA (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- (RA) + CA - 1
 
 Special Registers Altered:
@@ -199,6 +223,8 @@ XO-Form
 * subfmeo RT,RA (OE=1 Rc=0)
 * subfmeo.  RT,RA (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- ¬(RA) + CA - 1
 
 Special Registers Altered:
@@ -213,6 +239,8 @@ Z23-Form
 
 * addex RT,RA,RB,CY
 
+Pseudo-code:
+
     if CY=0 then RT <- (RA) + (RB) + OV
 
 Special Registers Altered:
@@ -228,6 +256,8 @@ XO-Form
 * subfzeo RT,RA (OE=1 Rc=0)
 * subfzeo.  RT,RA (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- ¬(RA) + CA
 
 Special Registers Altered:
@@ -245,6 +275,8 @@ XO-Form
 * addzeo RT,RA (OE=1 Rc=0)
 * addzeo.  RT,RA (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- (RA) + CA
 
 Special Registers Altered:
@@ -262,6 +294,8 @@ XO-Form
 * nego RT,RA (OE=1 Rc=0)
 * nego.  RT,RA (OE=1 Rc=1)
 
+Pseudo-code:
+
     RT <- ¬(RA) + 1
 
 Special Registers Altered:
@@ -275,7 +309,9 @@ D-Form
 
 * mulli RT,RA,SI
 
-    prod[0:127] <- (RA) * EXTS(SI)
+Pseudo-code:
+
+    prod[0:127] <- MULS((RA), EXTS(SI))
     RT <- prod[64:127]
 
 Special Registers Altered:
@@ -289,9 +325,11 @@ XO-Form
 * mulhw RT,RA,RB (Rc=0)
 * mulhw.  RT,RA,RB (Rc=1)
 
-    prod[0:63] <- (RA)[32:63] *  (RB)[32:63]
+Pseudo-code:
+
+    prod[0:63] <- MULS((RA)[32:63], (RB)[32:63])
     RT[32:63] <- prod[0:31]
-    RT[0:31] <- undefined
+    RT[0:31] <- prod[0:31]
 
 Special Registers Altered:
 
@@ -306,7 +344,12 @@ XO-Form
 * mullwo RT,RA,RB (OE=1 Rc=0)
 * mullwo.  RT,RA,RB (OE=1 Rc=1)
 
-    RT <- (RA)[32:63] * (RB)[32:63]
+Pseudo-code:
+
+    prod[0:63] <- MULS((RA)[32:63], (RB)[32:63])
+    RT <- prod
+    overflow <- ((prod[0:32] != [0]*33) &
+                 (prod[0:32] != [1]*33))
 
 Special Registers Altered:
 
@@ -320,9 +363,11 @@ XO-Form
 * mulhwu RT,RA,RB (Rc=0)
 * mulhwu.  RT,RA,RB (Rc=1)
 
+Pseudo-code:
+
     prod[0:63] <- (RA)[32:63] *  (RB)[32:63]
     RT[32:63] <- prod[0:31]
-    RT[0:31] <- undefined
+    RT[0:31] <- prod[0:31]
 
 Special Registers Altered:
 
@@ -337,10 +382,19 @@ XO-Form
 * divwo RT,RA,RB (OE=1 Rc=0)
 * divwo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:31] <-  (RA)[32:63]
     divisor[0:31] <- (RB) [32:63]
-    RT[32:63] <- dividend / divisor
-    RT[0:31] <- undefined
+    if (((dividend = 0x8000_0000) &
+         (divisor = 0xffff_ffff)) |
+         (divisor = 0x0000_0000)) then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT[32:63] <- DIVS(dividend, divisor)
+        RT[0:31] <- undefined[0:31]
+        overflow <- 0
 
 Special Registers Altered:
 
@@ -356,10 +410,17 @@ XO-Form
 * divwuo RT,RA,RB (OE=1 Rc=0)
 * divwuo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:31] <- (RA)[32:63]
     divisor[0:31] <- (RB)[32:63]
-    RT[32:63] <-  dividend / divisor
-    RT[0:31] <- undefined
+    if divisor != 0 then
+        RT[32:63] <-  dividend / divisor
+        RT[0:31] <- undefined[0:31]
+        overflow <- 0
+    else
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
 
 Special Registers Altered:
 
@@ -375,10 +436,22 @@ XO-Form
 * divweo RT,RA,RB (OE=1 Rc=0)
 * divweo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:63] <- (RA)[32:63] || [0]*32
-    divisor[0:31] <- (RB)[32:63]
-    RT[32:63] <- dividend /  divisor
-    RT[0:31] <- undefined
+    divisor[0:63] <- [0]*32 || (RB)[32:63]
+    if (divisor = 0x0000_0000_0000_0000) then
+        overflow <- 1
+    else
+        result <- DIVS(dividend, divisor)
+        if (result[32:63] = 0) then
+            RT[32:63] <- result[0:31]
+            RT[0:31] <- undefined[0:31]
+            overflow <- 0
+        else
+            overflow <- 1
+    if overflow = 1 then
+        RT[0:63] <- undefined[0:63]
 
 Special Registers Altered:
 
@@ -394,10 +467,22 @@ XO-Form
 * divweuo RT,RA,RB (OE=1 Rc=0)
 * divweuo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:63] <- (RA)[32:63] || [0]*32
-    divisor[0:31] <- (RB)[32:63]
-    RT[32:63] <- dividend / divisor
-    RT[0:31] <- undefined
+    divisor[0:63] <- [0]*32 || (RB)[32:63]
+    if (divisor = 0x0000_0000_0000_0000) then
+        overflow <- 1
+    else
+        result <- dividend /  divisor
+        if (RA) < (RB) then
+            RT[32:63] <- result[0:31]
+            RT[0:31] <- undefined[0:31]
+            overflow <- 0
+        else
+            overflow <- 1
+    if overflow = 1 then
+        RT[0:63] <- undefined[0:63]
 
 Special Registers Altered:
 
@@ -410,10 +495,19 @@ X-Form
 
 * modsw RT,RA,RB
 
+Pseudo-code:
+
     dividend[0:31] <- (RA)[32:63]
-    divisor [0:31] <- (RB)[32:63]-
-    RT[32:63] <- dividend % divisor
-    RT[0:31 ] <- undefined
+    divisor [0:31] <- (RB)[32:63]
+    if (((dividend = 0x8000_0000) &
+         (divisor = 0xffff_ffff)) |
+         (divisor = 0x0000_0000)) then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT[32:63] <- MODS(dividend, divisor)
+        RT[0:31] <- undefined[0:31]
+        overflow <- 0
 
 Special Registers Altered:
 
@@ -425,10 +519,17 @@ X-Form
 
 * moduw RT,RA,RB
 
+Pseudo-code:
+
     dividend[0:31] <- (RA) [32:63]
     divisor [0:31] <- (RB) [32:63]
-    RT[32:63] <- dividend % divisor
-    RT[0:31 ] <- undefined
+    if divisor = 0x0000_0000 then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT[32:63] <- MODS(dividend, divisor)
+        RT[0:31] <- undefined[0:31]
+        overflow <- 0
 
 Special Registers Altered:
 
@@ -438,9 +539,11 @@ Special Registers Altered:
 
 X-Form
 
-* darn RT,L
+* darn RT,L3
 
-    RT <- random(L)
+Pseudo-code:
+
+    RT <- random(L3)
 
 Special Registers Altered:
 
@@ -455,8 +558,12 @@ XO-Form
 * mulldo RT,RA,RB (OE=1 Rc=0)
 * mulldo.  RT,RA,RB (OE=1 Rc=1)
 
-    prod[0:127] <- (RA) * (RB)
+Pseudo-code:
+
+    prod[0:127] <- MULS((RA), (RB))
     RT <- prod[64:127]
+    overflow <- ((prod[0:64] != [0]*65) &
+                 (prod[0:64] != [1]*65))
 
 Special Registers Altered:
 
@@ -470,7 +577,9 @@ XO-Form
 * mulhd RT,RA,RB (Rc=0)
 * mulhd.  RT,RA,RB (Rc=1)
 
-    prod[0:127] <- (RA) *  (RB)
+Pseudo-code:
+
+    prod[0:127] <- MULS((RA), (RB))
     RT <- prod[0:63]
 
 Special Registers Altered:
@@ -484,6 +593,8 @@ XO-Form
 * mulhdu RT,RA,RB (Rc=0)
 * mulhdu.  RT,RA,RB (Rc=1)
 
+Pseudo-code:
+
     prod[0:127] <- (RA) *  (RB)
     RT <- prod[0:63]
 
@@ -497,7 +608,9 @@ VA-Form
 
 * maddhd RT,RA.RB,RC
 
-    prod[0:127] <- (RA) * (RB)
+Pseudo-code:
+
+    prod[0:127] <- MULS((RA), (RB))
     sum[0:127] <- prod + EXTS(RC)
     RT <- sum[0:63]
 
@@ -511,6 +624,8 @@ VA-Form
 
 * maddhdu RT,RA.RB,RC
 
+Pseudo-code:
+
     prod[0:127] <- (RA) * (RB)
     sum[0:127] <- prod + EXTZ(RC)
     RT <- sum[0:63]
@@ -525,8 +640,9 @@ VA-Form
 
 * maddld RT,RA.RB,RC
 
+Pseudo-code:
 
-    prod[0:127] <- (RA) * (RB)
+    prod[0:127] <- MULS((RA), (RB))
     sum[0:127] <- prod + EXTS(RC)
     RT <- sum[64:127]
 
@@ -543,9 +659,18 @@ XO-Form
 * divdo RT,RA,RB (OE=1 Rc=0)
 * divdo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:63] <- (RA)
     divisor[0:63] <- (RB)
-    RT <- dividend / divisor
+    if (((dividend = 0x8000_0000_0000_0000) &
+         (divisor = 0xffff_ffff_ffff_ffff)) |
+         (divisor = 0x0000_0000_0000_0000)) then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT <- DIVS(dividend, divisor)
+        overflow <- 0
 
 Special Registers Altered:
 
@@ -561,9 +686,16 @@ XO-Form
 * divduo RT,RA,RB (OE=1 Rc=0)
 * divduo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:63] <- (RA)
     divisor[0:63] <- (RB)
-    RT <- dividend / divisor
+    if (divisor = 0x0000_0000_0000_0000) then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT <- dividend / divisor
+        overflow <- 0
 
 Special Registers Altered:
 
@@ -579,9 +711,21 @@ XO-Form
 * divdeo RT,RA,RB (OE=1 Rc=0)
 * divdeo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:127] <-  (RA) || [0]*64
-    divisor[0:63] <- (RB)
-    RT <- dividend / divisor
+    divisor[0:127] <- [0]*64 || (RB)
+    if divisor = [0]*128 then
+        overflow <- 1
+    else
+        result <- DIVS(dividend, divisor)
+        if result[64:127] = 0x0000_0000_0000_0000 then
+            RT <- result[63:127]
+            overflow <- 0
+        else
+            overflow <- 1
+    if overflow = 1 then
+        RT[0:63] <- undefined[0:63]
 
 Special Registers Altered:
 
@@ -597,9 +741,21 @@ XO-Form
 * divdeuo RT,RA,RB (OE=1 Rc=0)
 * divdeuo.  RT,RA,RB (OE=1 Rc=1)
 
+Pseudo-code:
+
     dividend[0:127] <-  (RA) || [0]*64
-    divisor[0:63] <- (RB)
-    RT <- dividend / divisor
+    divisor[0:127] <- [0]*64 || (RB)
+    if divisor = [0]*128 then
+        overflow <- 1
+    else
+        result <- dividend /  divisor
+        if (RA) < (RB) then
+            RT <- result[63:127]
+            overflow <- 0
+        else
+            overflow <- 1
+    if overflow = 1 then
+        RT[0:63] <- undefined[0:63]
 
 Special Registers Altered:
 
@@ -612,9 +768,18 @@ X-Form
 
 * modsd RT,RA,RB
 
+Pseudo-code:
+
     dividend <- (RA)
     divisor  <- (RB)
-    RT       <- dividend % divisor
+    if (((dividend = 0x8000_0000_0000_0000) &
+         (divisor = 0xffff_ffff_ffff_ffff)) |
+         (divisor = 0x0000_0000_0000_0000)) then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT       <- MODS(dividend, divisor)
+        overflow <- 0
 
 Special Registers Altered:
 
@@ -626,9 +791,16 @@ X-Form
 
 * modud RT,RA,RB
 
+Pseudo-code:
+
     dividend <- (RA)
     divisor  <- (RB)
-    RT       <- dividend % divisor
+    if (divisor = 0x0000_0000_0000_0000) then
+        RT[0:63] <- undefined[0:63]
+        overflow <- 1
+    else
+        RT       <- dividend % divisor
+        overflow <- 0
 
 Special Registers Altered: