add progress

[libreriscv.git] / openpower / isatables.mdwn

diff --git a/openpower/isatables.mdwn b/openpower/isatables.mdwn
index 9bb520c06b7bc4f54d6b66bed7d7e442f6dc8171..22583bf30b74119c25da8197cc6d82c651b06c7f 100644 (file)
--- a/openpower/isatables.mdwn
+++ b/openpower/isatables.mdwn
@@ -4,27 +4,54 @@ TODO
 
 Based on Anton Blanchard's microwatt decode1.vhdl
 
-## Major opcodes
+# Major opcodes
+
+decodes using f_in.insn(31 downto 26)
 
 [[!table format=csv file="openpower/isatables/major.csv"]]
 
-## Minor opcode 19
+# Minor opcode 19
+
+decodes using f_in.insn(5 downto 1)
+
+[[!table format=csv file="openpower/isatables/minor_19_00000.csv"]]
+
+decodes using f_in.insn(10 downto 1)
 
 [[!table format=csv file="openpower/isatables/minor_19.csv"]]
 
-## Minor opcode 30
+# Minor opcode 30
+
+decodes using f_in.insn(4 downto 1)
 
 [[!table format=csv file="openpower/isatables/minor_30.csv"]]
 
-## Minor opcode 31
+# Minor opcode 31
+
+decodes using f_in.insn(10 downto 1)
 
 [[!table format=csv file="openpower/isatables/minor_31.csv"]]
 
-## Minor opcode 58
+# Minor opcode 58
+
+decodes using f_in.insn(1 downto 0)
 
 [[!table format=csv file="openpower/isatables/minor_58.csv"]]
 
-## Minor opcode 62
+# Minor opcode 62
+
+decodes using f_in.insn(1 downto 0)
 
 [[!table format=csv file="openpower/isatables/minor_62.csv"]]
 
+# Extra opcodes
+
+These can match against the (full) row[0] spec: nmigen Case supports "-" as
+"don't care"
+
+[[!table format=csv file="openpower/isatables/extra.csv"]]
+
+# Fields
+
+These can be downloaded in plain text format here:
+<http://libre-riscv.org/openpower/isatables/fields.text>