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[libreriscv.git] / openpower / simple_v_spec.tex

diff --git a/openpower/simple_v_spec.tex b/openpower/simple_v_spec.tex
index b3fbc12a03cd96b2a718d0db0172370c10dca33e..b8b802f77ee32bf9efd74f147a9fb534a8992bf6 100644 (file)
--- a/openpower/simple_v_spec.tex
+++ b/openpower/simple_v_spec.tex
@@ -33,8 +33,10 @@
 }{}
 \PassOptionsToPackage{hyphens}{url} % url is loaded by hyperref
 \usepackage[unicode=true]{hyperref}
-\hypersetup{
-            pdfborder={0 0 0},
+\hypersetup{colorlinks=true,
+            linkcolor=blue,
+                filecolor=cyan,      
+                urlcolor=magenta,
             breaklinks=true}
 \usepackage[margin=0.9in]{geometry}
 \usepackage{color}
@@ -76,6 +78,18 @@
 \newcommand{\ErrorTok}[1]{\textcolor[rgb]{1.00,0.00,0.00}{\textbf{#1}}}
 \newcommand{\NormalTok}[1]{#1}
 
+% these come from:
+% https://gist.github.com/bgeron/72ebbacf5930537022079d9953f15713
+\usepackage{newunicodechar}
+\newcommand\DeclareUnicodeInv[2]{\DeclareUnicodeCharacter{#2}{#1}}
+
+\DeclareUnicodeCharacter{03A0}{\ensuremath{\Pi}}
+\DeclareUnicodeCharacter{2208}{\ensuremath{\in}}
+\DeclareUnicodeCharacter{03C0}{\ensuremath{\pi}}
+\DeclareUnicodeCharacter{221A}{$\sqrt{}$}
+\DeclareUnicodeCharacter{221B}{$\sqrt[3]{}$}
+\DeclareUnicodeInv{\ensuremath{\mathbb{Z}}}{2124}
+
 % indent all verbatim
 \catcode`\@=11
 \let \saveverbatime \@xverbatim
@@ -258,6 +272,8 @@ For questions, comments, and clarification, please contact the following:
 \input{tex_out/remap_appendix.tex}
 \chapter{Simple-V pseudocode}\hypertarget{svux2fpseudocode_simplev}{}
 \input{tex_out/pseudocode_simplev.tex}
+\chapter{Simple-V Analysis}\hypertarget{svux2fsv_analysis}{}
+\input{tex_out/sv_analysis.tex}
 
 \chapter{SVP64 Augmentation Table}\hypertarget{opcode_regs_deduped}{}
 \begin{landscape}
@@ -276,6 +292,9 @@ For questions, comments, and clarification, please contact the following:
 
 As explained in the Simple-V introduction
 these are all intentionally and specifically Scalar instructions.
+Each section is free-standing, has no connection, dependence or
+relationship to any other section, including no direct critical dependence
+either way on Simple-V.
 They have with almost no exceptions been specifically crafted to
 have a justification for their inclusion in the Power ISA as Scalar
 instructions purely on their own merit.
@@ -286,17 +305,23 @@ instructions purely on their own merit.
        \item Javascript(tm) rounding is present in ARM as fjcvtzs
        and would save an astounding 35 instructions with 5 branches.
        \item Whilst there exist CR bit manipulation and copying
-       instructions there are no CR Field maniulation instructions,
+       instructions there are no CR Field manipulation instructions,
        putting pressure on GPRs if several CR fits need to be analysed.
+       \item one single instruction, bmask, is proposed that covers
+       the whole of x86 BMI1 and AMD TBM, combined, and provides more.
 \end{itemize}
 
-All of these have nothing to do with Simple-V at all.
+All of these have nothing to do with Simple-V at all: they make
+the Power ISA better at modern general-purpose compute, bringing
+it up-to-date.
 
 That said: by a wonderful coincidence, should they be included, then
 Simple-V's capabilities increase significantly. For example the CRweird
 instructions combined with the bitmanip instructions, alongside 
 Vectorised Rc=1 turn CR Fields into
-extremely powerful Predicate masks.
+extremely powerful Predicate masks. bmask not only
+covers the BMI and TBM instructions of Intel and AMD it also
+includes the RVV set-before-first and set-after-first instructions.
 
 The clean and clear separation between Vectorisation Prefix and Scalar
 Suffix is what makes it possible for both Scalar-only and Scalable-Vectors
@@ -304,13 +329,13 @@ to benefit.  It also makes proposal much easier, as there is no
 inter-dependence.
 
 It is however important to note that the rationale for these instructions
-comes from a more general-purpose moderen computing paradigm that is
+comes from a more general-purpose modern computing paradigm that is
 outside of IBM's much more focussed and specialist traditional customer
 base. We deeply respect IBM's curator role of the Power ISA of the past 25
 years as much as we appreciate their courage in transferring that role
 to the OpenPOWER Foundation ISA Working Group.
 
-\chapter{SV Vector ops}\hypertarget{svux2fvector_ops}{}
+\chapter{SV Vector-assist Scalar ops}\hypertarget{svux2fvector_ops}{}
 \input{tex_out/vector_ops.tex}
 \chapter{CR Weird ops}\hypertarget{svux2fcr_int_predication}{}
 \hypertarget{cr_int_predication}{}
@@ -328,8 +353,8 @@ to the OpenPOWER Foundation ISA Working Group.
 \input{tex_out/big_integer.tex}
 \chapter{Transcendentals}\hypertarget{transcendentals}{}
 \input{tex_out/transcendentals.tex}
-\chapter{Acquire/Release Atomic Memory}\hypertarget{atomics}{}
-\input{tex_out/atomics.tex}
+%\chapter{Acquire/Release Atomic Memory}\hypertarget{atomics}{}
+%\input{tex_out/atomics.tex}
 
 \begin{appendices}
 \chapter{Big Integer Analysis}\hypertarget{svux2fbigintegerux2fanalysis}{}